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Introduction Is there a limit? Transistors CMOS building blocks Parasitics I The [un]desirables Parasitics II Building a full MOS model The CMOS inverter A masterpiece Technology scaling Smaller, Faster and Cooler Technology Building an inverter Gates I Just like LEGO The pass gate An useful complement Gates II A portfolio Sequential circuits Time also counts! DLLs and PLLs A brief introduction Storage elements A bit in memory
The pass gate 1
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An useful complement
The pass gate switch Regions of operation Pass gate delay
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A p-switch C
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out 1 0 t
in
out
PMOS:
current source Vout < |VTP| saturation Vout > VTP linear
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V out
(mA)
0.6 0.4 0.2 0 -0.2 -0.4 -0.6 0 2 4 6 Time (ns) 8 10 12 I D(pmos) I D(nmos)
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ID(nmos), ID(pmos)
t d C Req
N ( N + 1) 2
in
0V
1
0V
2
0V
3
0V
out
Warning:
A pass gate provides no power gain or buffering All the work is done by the previous gate It really looks like a simple switch
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Req N
out