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MCR8SD, MCR8SM, MCR8SN

Preferred Device

Sensitive Gate Silicon Controlled Rectifiers


Reverse Blocking Thyristors
Designed primarily for half-wave ac control applications, such as motor controls, heating controls, and power supplies; or wherever halfwave, silicon gatecontrolled devices are needed.
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Sensitive Gate Allows Triggering by Microcontrollers and other

Logic Circuits Blocking Voltage to 800 V OnState Current Rating of 8 A RMS at 80C High Surge Current Capability 80 A Rugged, Economical TO220AB Package Glass Passivated Junctions for Reliability and Uniformity Minimum and Maximum Values of IGT, VGT and IH Specified for Ease of Design Immunity to dv/dt 5 V/msec Minimum at 110C PbFree Packages are Available*
Rating Symbol VDRM, VRRM Value Unit V 400 600 800 8.0 80 26.5 5.0 0.5 2.0 40 to 110 40 to 150 A A A2sec W W A C C MCR8SD 1 2 PG(AV) IGM TJ Tstg 3 4 1

SCRs 8 AMPERES RMS 400 thru 800 VOLTS


G A K

MARKING DIAGRAM

MAXIMUM RATINGS (TJ = 25C unless otherwise noted)


Peak Repetitive OffState Voltage (Note 1) (TJ = 40 to 110C, Sine Wave, 50 to 60 Hz) MCR8SD MCR8SM MCR8SN On-State RMS Current (180 Conduction Angles; TC = 80C) Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, TJ = 110C) Circuit Fusing Consideration (t = 8.33 ms) Forward Peak Gate Power (Pulse Width 10 ms, TC = 80C) Forward Average Gate Power (t = 8.3 ms, TC = 80C) Forward Peak Gate Current (Pulse Width 10 ms, TC = 80C) Operating Junction Temperature Range Storage Temperature Range 2 3 A Y WW x G AKA

TO220AB CASE 221A09 STYLE 3

AY WW MCR8SxG AKA

IT(RMS) ITSM I2t PGM

= Assembly Location = Year = Work Week = D, M, or N = PbFree Package = Diode Polarity

PIN ASSIGNMENT
Cathode Anode Gate Anode

ORDERING INFORMATION
Device MCR8SDG MCR8SM MCR8SMG MCR8SN MCR8SNG Package TO220AB TO220AB (PbFree) TO220AB TO220AB (PbFree) TO220AB TO220AB (PbFree) Shipping 50 Units / Rail 50 Units / Rail 50 Units / Rail 50 Units / Rail 50 Units / Rail 50 Units / Rail

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

Preferred devices are recommended choices for future use and best overall value.

Semiconductor Components Industries, LLC, 2008

November, 2008 Rev. 4

Publication Order Number: MCR8S/D

MCR8SD, MCR8SM, MCR8SN


THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, JunctiontoCase JunctiontoAmbient Symbol RqJC RqJA TL Value 2.2 62.5 260 Unit C/W C

Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds

ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)


Characteristic OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (Note 3) (VD = Rated VDRM and VRRM; RGK = 1 kW) ON CHARACTERISTICS Peak Forward OnState Voltage (Note 2) (ITM = 16 A) Gate Trigger Current (Continuous dc) (Note 4) (VD = 12 V; RL = 100 W) Holding Current (Note 3) (VD = 12 V, Gate Open, Initiating Current = 200 mA) Latch Current (Note 4) (VD = 12 V, IG = 200 mA) Gate Trigger Voltage (Continuous dc) (Note 4) (VD = 12 V; RL = 100 W) Gate NonTrigger Voltage (VD = 12 V, RL = 100 W) DYNAMIC CHARACTERISTICS Critical Rate of Rise of OffState Voltage (VD = 67% VDRM, RGK = 1 KW, CGK = 0.1 mF, TJ = 110C) Critical Rate of Rise of OnState Current IPK = 50 A, Pw = 40 msec, diG/dt = 1 A/msec, Igt = 10 mA 2. Indicates Pulse Test: Pulse Width v 2.0 ms, Duty Cycle v 2%. 3. RGK = 1000 Ohms included in measurement. 4. Does not include RGK in measurement. dv/dt di/dt 5.0 15 100 V/ms A/ms TJ = 25C TJ = *40C TJ = 110C VTM IGT IH IL VGT VGD 5.0 0.3 0.2 25 0.5 0.6 0.65 1.8 200 6.0 8.0 1.0 1.5 V mA mA mA V V TJ = 25C TJ = 110C IDRM, IRRM 10 500 mA Symbol Min Typ Max Unit

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MCR8SD, MCR8SM, MCR8SN


Voltage Current Characteristic of SCR
+ Current Anode + VTM on state IRRM at VRRM IH

Symbol
VDRM IDRM VRRM IRRM VTM IH

Parameter
Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode

+ Voltage IDRM at VDRM Forward Blocking Region (off state)

P(AV), AVERAGE POWER DISSIPATION (WATTS)

110 TC , CASE TEMPERATURE (C) 105 100 95 90 85 80 75 0 1 dc 30 2 60 3 90 120 180 4 5 6 7 8

15 12 9 90 6 30 3 0 60 120 dc

180

IT(RMS), RMS ONSTATE CURRENT (AMPS)

IT(AV), AVERAGE ONSTATE CURRENT (AMPS)

Figure 1. Typical RMS Current Derating


IT, INSTANTANEOUS ONSTATE CURRENT (AMPS)

Figure 2. OnState Power Dissipation

100

GATE TRIGGER CURRENT ( m A) 3.5

TYPICAL @ TJ = 25C MAXIMUM @ TJ = 110C

100 90 80 70 60 50 40 30 20 10 0 40 25 10 5 20 35 50 65 80 95 110

10

MAXIMUM @ TJ = 25C

0.1

0.5

1.0

1.5

2.0

2.5

3.0

VT, INSTANTANEOUS ONSTATE VOLTAGE (VOLTS)

TJ, JUNCTION TEMPERATURE (C)

Figure 3. Typical OnState Characteristics

Figure 4. Typical Gate Trigger Current versus Junction Temperature

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MCR8SD, MCR8SM, MCR8SN


VGT, GATE TRIGGER VOLTAGE (VOLTS) 1000 IH, HOLDING CURRENT ( m A) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 40 25 10 5 20 35 50 65 80 95 110

100

10

1 40 25 10

20

35

50

65

80

95

110

TJ, JUNCTION TEMPERATURE (C)

TJ, JUNCTION TEMPERATURE (C)

Figure 5. Typical Holding Current versus Junction Temperature

Figure 6. Typical Gate Trigger Voltage versus Junction Temperature

1000 IL, LATCHING CURRENT ( m A)

100

10

1 40 25 10

20

35

50

65

80

95

110

TJ, JUNCTION TEMPERATURE (C)

Figure 7. Typical Latching Current versus Junction Temperature

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MCR8SD, MCR8SM, MCR8SN


PACKAGE DIMENSIONS
TO220 CASE 221A09 ISSUE AF
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 CATHODE ANODE GATE ANODE MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04

T B
4

SEATING PLANE

C S

Q
1 2 3

A U K

H Z L V G D N

R J

STYLE 3: PIN 1. 2. 3. 4.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION


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MCR8S/D

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