IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO.

2, FEBRUARY 2012 519

Analysis and Design of Active NPC (ANPC)
Inverters for Fault-Tolerant Operation of
High-Power Electrical Drives
Jun Li, Student Member, IEEE, Alex Q. Huang, Fellow, IEEE, Zhigang Liang, Student Member, IEEE,
and Subhashish Bhattacharya, Member, IEEE
AbstractCompared with neutral-point-clamped (NPC) invert-
ers, active NPC (ANPC) inverters enable a substantially increased
output power and an improved performance at zero speed for
high-power electrical drives. This paper analyzes the operation of
three-level (3L) ANPC inverters under device failure conditions,
and proposes the fault-tolerant strategies to enable continuous op-
erating of the inverters and drive systems under single and multiple
device open- and short-failure conditions. Therefore, the reliabil-
ity and robustness of the electrical drives are greatly improved.
Moreover, the proposed solution adds no additional components to
standard 3L-ANPCinverters; thus, the cost for robust operation of
drives is lower. Simulation and experiment results are provided for
verication. Furthermore, a comprehensive comparison for the re-
liability function of 3L-ANPC and 3L-NPC inverters is presented.
The results show that 3L-ANPC inverters have higher reliability
than 3L-NPC inverters when a derating is allowed for the drive
system under fault-tolerant operation. If a derated operation is
not allowed, the two inverters have similar reliability for device
open failure, while 3L-NPC inverters have higher reliability than
3L-ANPC inverters for device short failure.
Index TermsActive NPC (ANPC), electrical drives, fault toler-
ant, high power, multilevel inverter, reliability.
I. INTRODUCTION
M
ULTILEVEL inverters have found successful applica-
tions in medium-voltage high-power electrical drives,
such as mining, pumps, fans, and tractions [1][4]. Since mul-
tilevel inverters have a large number of power devices, any de-
vice failure may cause the abnormal operation of the electrical
drives, and require shutdown of the inverter and the whole sys-
tem to avoid further serious damage. However, in some critical
industrial processes with high standstill cost and safety-aspect
concern, a high reliability and survivability of the drive system
is very important [5], [6]. Therefore, fault-tolerant operation of
multilevel inverters has drawn lots of interest in recent years, and
Manuscript received September 16, 2010; revised January 21, 2011 and
March 2, 2011; accepted March 27, 2011. Date of current version January
9, 2012. Recommended for publication by Associate Editor J. O. Ojo.
J. Li is with the ABB U.S. Corporate Research Center, Raleigh, NC 27606
USA (e-mail: jun.li@us.abb.com).
A. Q. Huang, Z. Liang, and S. Bhattacharya are with the Department
of Electrical and Computer Engineering and Future Renewable Electric En-
ergy Delivery and Management Systems Center, North Carolina State Univer-
sity, Raleigh, NC 27695 USA (e-mail: aqhuang@ncsu.edu; zliang2@ncsu.edu;
sbhatta4@ncsu.edu).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TPEL.2011.2143430
several researchers have addressed the fault-tolerant issues for
the popular multilevel topologies, such as neutral-point-clamped
(NPC) inverters [7][17], ying capacitor inverters [18][20],
cascaded H-bridge inverters [21][23], and generalized invert-
ers [24]. In most fault-tolerant solutions, additional components
(such as power devices, fuses, or even phase legs) are required
to be added to standard multilevel inverters for fault-tolerant
operation. This will increase the cost and may even reduce the
reliability of the inverters and drive systems due to employing
more components. Moreover, both device open and short fail-
ure may occur in the inverters, depending on the characteristics
and failure mechanism of power devices; thus, a comprehensive
fault-tolerant scheme should consider both failure conditions.
Recently, three-level (3L) active NPC (ANPC) inverters were
proposed to overcome the unequal power loss distribution
among the semiconductor devices in 3L-NPC inverters, thus,
enabling a substantially increased output power and an im-
proved performance at zero speed for high-power electrical
drives [25], [26]. This paper analyzes the operation of 3L-ANPC
inverters under device failure conditions and proposes the fault-
tolerant strategies to enable continuous operation of the inverters
and drive systems for both single device open and short failure.
Further investigation shows that 3L-ANPC inverters can con-
tinue operating when multiple devices fail simultaneously in one
or even multiple phases. Therefore, the reliability and robustness
of the inverters and electrical drives are greatly improved. More-
over, since the proposed solution adds no additional components
to standard 3L-ANPC inverters, the cost for robust operation of
drives is lower. Simulation and experiment results are provided
for verication. Finally, a comprehensive comparison for the
reliability function of 3L-ANPC and 3L-NPC inverters is pre-
sented. The results show that 3L-ANPC inverters have higher
reliability than 3L-NPC inverters when a derating is allowed
for the drive system under fault-tolerant operation. If a derated
operation is not allowed, the two inverters have similar reliabil-
ity for device open failure, while 3L-NPC inverters have higher
reliability than 3L-ANPC inverters for device short failure.
II. FAULT-TOLERANT DESIGN OF 3L-ANPC INVERTERS
A. Operation Analysis of 3L-ANPC Inverters Under Device
Failure Conditions
Fig. 1 shows the circuit of a 3L-ANPC inverter. The relation
of switching states, switching sequence, and output voltage for
phase A of the inverter is given in Table I. In normal operation
0885-8993/$26.00 2011 IEEE
520 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
Fig. 1. Circuit of a 3L-ANPC inverter.
TABLE I
SWITCHING STATES, SWITCHING SEQUENCE, AND OUTPUT VOLTAGE OF A
3L-ANPC INVERTER
(no device failure occurs), one of the four zero switching states
(0U1/0U2/0L1/0L2) is selected to balance the power loss dis-
tribution among the devices in the inverter [25]. Under device
failure condition, due to the symmetrical structure of 3L-ANPC
topology, the failure of S
a 1
/D
a 1
and S
a 4
/D
a 4
has similar ef-
fects on the inverter, and this is also valid for the other pairs:
S
a 2
/D
a 2
and S
a 3
/D
a 3
, S
a 5
/D
a 5
, and S
a 6
/D
a 6
. Therefore, only
one from each pair of the devices in phase A will be analyzed
in the following fault analysis.
Fig. 2 shows the examples of the current ow path at dif-
ferent output voltage levels under the open failure of S
a 1
/D
a 1
,
S
a 2
/D
a 2
, and S
a 5
/D
a 5
, respectively. The positive current direc-
tion is dened as owing out of the phase. As seen, when S
a 1
open failure occurs at + state, if I
a
>0, as shown in Fig. 2(a),
then the phase output is connected to neutral-point (NP) of dc-
link instead of positive dc bus. In Fig. 2(c), S
a 2
open failure
occurs at 0U2/0U1 state when I
a
>0, then the phase output is
connected to negative dc bus rather than NP of dc-link. Fig. 2(d)
shows that S
a 5
open failure occurs at 0U2/0U1 state when I
a
<0, then the phase output is connected to positive dc bus instead
of NP of dc-link. Due to the incorrect output voltage, the output
current will become unsymmetrical and the NP of dc-link will
be unbalanced. When D
a 1
open fault occurs at + state and
I
a
< 0, as shown in Fig. 2(b), the condition is even worse since
the phase current I
a
becomes discontinuous due to the cutoff
of conduction path, then the induced voltage on load inductor
and loop inductor may cause overvoltage on the inverter and
Fig. 2. Examples of current ow path under single device open failure in 3L-
ANPC inverters: (a) S
a 1
open-fail, + state, I
a
> 0. (b) D
a 1
open-fail, + state,
I
a
< 0. (c) S
a 2
open-fail, 0U2/0U1 state, I
a
> 0. (d) S
a 5
open-fail, 0U2/0U1
state, I
a
< 0.
Fig. 3. Examples of current ow path under single device short failure in 3L-
ANPC inverters. (a) S
a 1
/D
a 1
short-fail, 0U1/0U2/- state. (b) S
a 2
/D
a 2
short-
fail, state. (c) S
a 2
/D
a 2
short-fail, 0L1 state. (d) S
a 5
/D
a 5
short-fail, +/0L1
state.
cause damage. For other device failure cases, the circuit can be
analyzed in the similar way.
Device short failure can cause even more serious problems
compared to open failure. The reason is that under short-failure
condition, the dc-link capacitors may be discharged through a
short-current conduction path directly, and some devices may
break down due to over current. Moreover, because the voltage
of one dc-link capacitor will drop to zero quickly, other de-
vices may have to withstand the full dc bus voltage and break
down due to overvoltage. If we assume that the capacitors and
devices can survive in this condition, the inverter output cur-
rents will become unbalanced. Fig. 3 shows the current ow
path under short failure of S
a 1
/D
a 1
, S
a 2
/D
a 2
, and S
a 5
/D
a 5
,
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 521
TABLE II
SOLUTION FOR SINGLE DEVICE OPEN FAILURE OF A 3L-ANPC INVERTER
respectively. When S
a 1
/D
a 1
short failure occurs, if the switch-
ing state commutates to 0U1/0U2/, as shown in Fig. 3(a),
the upper capacitor C
1
will be shorted by S
a 1
/D
a 1
and S
a 5
.
Fig. 3(b) and (c) shows that if S
a 2
/D
a 2
short failure occurs,
state forms a short-current path for lower capacitor C
2
, while
0L1 state provides a short-current path for upper capacitor
C
1
. If S
a 5
/D
a 5
short failure occurs at +/0L1 state, as shown
in Fig. 3(d), the condition is the same as Fig. 3(a).
B. Proposed Fault-Tolerant Strategies of 3L-ANPC Inverters
1) Single Device Open Failure of 3L-ANPC Inverters: Be-
sides the power loss balancing function, the ANPC switches
S
a 5
and S
a 6
can also provide a fault-tolerant ability for the in-
verter. The modied switching states and switching sequences
for the fault-tolerant operation under single device open fail-
ure are given in Table II. After device open failure is detected,
the 3L-ANPC inverter transits from normal operation into fault-
tolerant operation. Knowing the position of the failed device, a
newswitching sequence is selected to generate certain switching
state according to Table II.
As seen, if S
a 5
/D
a 5
or S
a 6
/D
a 6
fails open, the 3L-ANPC in-
verter is derived into a similar conguration as the conventional
3L-NPC inverter. The faulty phase is still able to output three
voltage levels, and the maximum modulation index and the out-
put voltage waveform quality are the same as normal operation.
Moreover, the device power loss balancing function can still be
implemented to some extent during fault-tolerant operation. For
example, if only S
a 5
fails, while D
a 5
is healthy, then besides the
0L1 and 0L2 switching states, the faulty phase can still gen-
erate 0U1 and 0U2 switching states when the phase current
is positive, which can be used for power loss balancing.
If any single device open failure occurs among S
a 1
/D
a 1
through S
a 4
/D
a 4
, the output terminal of the faulty phase needs
to be connected to the NP of dc-link. The modulation signals
also need to be modied in order to maintain the balanced three-
phase line-to-line voltages. In carrier-based SPWM modulation
of 3L-ANPC inverters, the references of the phase voltages in
normal operation are expressed by (1). In this paper, we assume
the maximummodulation index is 1 for linear modulation under
normal operation. It is worth to mention that if zero-sequence
component injection is used for SPWM modulation, the maxi-
mum modulation index can reach 1.15 under normal operation.
However, since zero-sequence component injection is not the
focus of this paper, we do not discuss this aspect in the follow-
ing sections. When the faulty phase can only output 0 voltage
level, instead of using the balanced phase voltages as the ref-
erence signals, we must modify the reference signals to ensure
that the line-to-line voltages are balanced in 3L-ANPC invert-
ers. Therefore, a new set of phase voltage references is provided
in (2). As seen, to avoid over modulation, the maximum modu-
lation index is limited to 0.577 during fault-tolerant operation,
which is 1/

3 of that in normal operation. Moreover, the free-

dom degree of zero-sequence component injection is also lost
for the SPWM modulation:

V
a
= msin (wt)
V
b
= msin
_
wt
2
3
_
V
c
= msin
_
wt +
2
3
_
(1)

V
a
= 0
V
b
=

3msin
_
wt +

6
_
V
c
=

3msin
_
wt +
2
3
+

6
_
(2)
where m is modulation index, V
a
, V
b
, and V
c
are phase voltage
references, and is fundamental frequency.
2) Single Device Short Failure of 3L-ANPC Inverters: For
device short failure, we need to avoid using the switching states
and switching sequences that can construct short-current path
for the dc-link capacitors. Two solutions are proposed here.
In solution I, the modied switching states and switching se-
quences are given in Table III. In this scheme, when S
a 1
/D
a 1
or
S
a 4
/D
a 4
has short failure, the faulty phase can still output three
voltage levels by choosing proper switching sequence; thus, the
output voltage and current of the inverter are almost the same
as those in normal operation. For the other device short-failure
cases, we can use the similar method as that for device open
failure to connect the faulty phase to the NP of dc-link, and
modify the reference signals as (2). Accordingly, the maximum
modulation index will be reduced to 0.577. However, the draw-
back of solution I is that certain devices have to withstand the
full dc bus voltage under S
a 1
/D
a 1
or S
a 4
/D
a 4
short-failure con-
dition. For example, when S
a 1
/D
a 1
fails short, overvoltage will
appear across S
a 2
/D
a 2
at state according to Table III. Simi-
larly, when S
a 4
/D
a 4
fails short, the voltage across S
a 3
/D
a 3
will
be full DC bus voltage at + state. For a standard 3L-ANPC
inverter, the voltage rating of the employed power devices is
lower than the dc bus voltage (theoretically, equal to half of the
dc bus voltage). For example, a 3L-ANPC inverter with 5-kV dc
bus voltage usually employs 4.5-kV power devices. Therefore,
522 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
TABLE III
SOLUTION I FOR SINGLE DEVICE SHORT FAILURE OF A 3L-ANPC INVERTER
TABLE IV
SOLUTION II FOR SINGLE DEVICE SHORT FAILURE OF A 3L-ANPC INVERTER
some devices may take the risk to break down due to overvoltage
during fault-tolerant operation with solution I.
To overcome the drawback of the rst solution, solution II is
proposed, as shown in Table IV. In this scheme, no matter which
device fails in short, the faulty phase is always connected to the
NP of dc-link, and the reference signals are modied according
to (2). By doing so, the maximum modulation index will be
reduced to 0.577 and the output power rating of the 3L-ANPC
inverter will be reduced. However, overvoltage will not appear
on any device, and it can be applied for any standard 3L-ANPC
inverter without special requirement on the voltage rating of the
inner devices. In this paper, we only focus on solution II.
C. Simulation and Experiment Verication
To verify the proposed fault-tolerant strategies, simulation is
implemented in MATLAB/Simulink. The simulation parame-
ters are: dc bus voltage V
dc
= 200 V, dc-link capacitors C
1
=
C
2
= 6.6 mF, carrier-based SPWM modulation, switching fre-
quency f
sw
= 1.5 kHz, modulation index = 0.8, fundamental
frequency f = 60 Hz, and inductive load (R = 2 and L = 4
mH). In simulation, we assume the fault occurs and is detected
at 0.05 s.
Figs. 46 show the NP voltage of dc-link and the load current
waveforms without and with the proposed control for single
device open failure on S
a 1
/D
a 1
, S
a 2
/D
a 2
, and S
a 5
/D
a 5
, respec-
Fig. 4. NP voltage and load current waveforms under S
a 1
/D
a 1
open failure.
(a) Without proposed control. (b) With proposed control.
tively. Figs. 7 and 8 showthe NP voltage of dc-link and load cur-
rent waveforms without and with the proposed control for single
device short failure on S
a 1
/D
a 1
and S
a 2
/D
a 2
, respectively.
The proposed fault-tolerant control strategies are veried on
a 5-kW 3L-ANPC inverter prototype. The power devices are
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 523
Fig. 5. NP voltage and load current waveforms under S
a 2
/D
a 2
open failure.
(a) Without proposed control. (b) With proposed control.
Powerex CM75DY-24 H IGBT modules. The controllers are TI
TMS320F2812 DSP and Altera FLEX10 KA FPGA. The main
experiment parameters are: dc bus voltage V
dc
= 70 V, dc-link
capacitors C
1
= C
2
= 12 mF, carrier-based SPWM modulation,
switching frequency f
sw
= 2 kHz, modulation index = 0.8,
Fig. 6. NP voltage and load current waveforms under S
a 5
/D
a 5
open failure.
(a) Without proposed control. (b) With proposed control.
fundamental frequency f = 50 Hz, and inductive load (R = 4
and L = 2.5 mH).
Figs. 911 show the NP voltage, output currents, faulty phase
voltage, and line-to-line voltage waveforms (fromtop to bottom)
without and with the proposed control for single device open
524 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
Fig. 7. NP voltage and load current waveforms under S
a 1
/D
a 1
short failure.
(a) Without proposed control. (b) With proposed control.
failure on S
a 1
/D
a 1
, S
a 2
/D
a 2
, and S
a 5
/D
a 5
, respectively. Figs. 12
and 13 showthe NPvoltage, output current, faulty phase voltage,
and line-to-line voltage waveforms (from top to bottom) with
the proposed control for single device short failure on S
a 1
/D
a 1
and S
a 2
/D
a 2
, respectively.
The simulation and experiment results show that with the
proposed control strategies, under S
a 5
/D
a 5
open-failure condi-
tion, 3L-ANPC inverters can still output three voltage levels.
Fig. 8. NP voltage and load current waveforms under S
a 2
/D
a 2
short failure.
(a) Without proposed control. (b) With proposed control.
Therefore, the faulty phase voltage, the line-to-line voltage, and
the output currents are almost the same as those in normal op-
eration. The NP voltage of dc-link is still balanced. When the
device failure occurs in S
a 1
/D
a 1
or S
a 2
/D
a 2
regardless of open
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 525
Fig. 9. Waveforms under S
a 1
/D
a 1
open failure. (a) Without proposed control.
(b) With proposed control.
or short failure, the output currents are still stable and continuous
by using the proposed control. However, the current amplitude
is reduced, which is limited by the maximum modulation in-
dex. The NP voltage ripple becomes slightly larger compared
to normal operation because the current of the faulty phase is
always connected to the NP of dc-link. However, the voltage
and current waveforms show that this NP voltage ripple will not
impact the proper operation of the 3L-ANPC inverters.
Fig. 10. Waveforms under S
a 2
/D
a 2
open failure. (a) Without proposed con-
trol. (b) With proposed control.
III. ANALYSIS FOR MULTIPLE DEVICE FAILURE OF 3L-ANPC
INVERTERS
In this section, we analyze the fault-tolerant ability of 3L-
ANPC inverters under multiple device open and short failure in
one or even multiple phases simultaneously.
526 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
Fig. 11. Waveforms under S
a 5
/D
a 5
open failure. (a) Without proposed con-
trol. (b) With proposed control.
A. Multiple Device Open Failure of 3L-ANPC Inverters
Table Vsummarizes the status of the devices and their impact
on the status of the faulty phase of 3L-ANPC inverters under
multiple device open-failure conditions. To describe the faulty
phase status, healthy means no device fails in the phase. No
reduction fault (NRF) means the faulty phase can still gener-
ate +, 0 and levels. NRF-2L means the faulty phase
Fig. 12. Waveforms under S
a 1
/D
a 1
short failure with proposed control.
Fig. 13. Waveforms under S
a 2
/D
a 2
short failure with proposed control.
can only generate + and levels. Reduction fault (RF)
means the faulty phase can only generate 0 level. For exam-
ple, if S
a 1
/D
a 1
through S
a 4
/D
a4
are all healthy, then even if S
a 5
and S
a 6
fail simultaneously, the faulty phase still has NRF
status. In another example, if S
a 2
/D
a 2
and S
a 5
/D
a 5
are healthy,
the faulty phase still has RF status even if all the other de-
vices in the phase fail together. According to the phase status
shown in Table V, we can summarize the possible fault-tolerant
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 527
TABLE V
OPERATION UNDER MULTIPLE DEVICE OPEN FAILURE (IN ONE PHASE) IN A
3L-ANPC INVERTER
TABLE VI
FAULT TOLERANT CAPABILITY OF A 3L-ANPC INVERTER UNDER MULTIPLE
DEVICE OPEN-FAILURE CONDITIONS
operations for a three-phase 3L-ANPC inverter under multiple
device open-failure conditions, as given in Table VI. Depending
on the phase status, the fault-tolerant operation can be classied
into three modes. For modes 1 and 2, they have the same max-
imum modulation index as normal operation. For mode 3, the
maximummodulation index is reduced to 0.577. Moreover, only
mode 1 allows the same waveform quality as normal operation.
To understand these operations, the analysis based on voltage
vector diagram of a 3L-ANPC inverter is used for explanation.
If the status of all three phases are either healthy or NRF,
then each phase still generates three output voltage levels +,
0, and . In the voltage vector diagram shown in Fig. 14(a),
all the voltage vectors are available; therefore, the 3L-ANPC
inverter can operate like normal operation. If NRF-2L exists
in the phase status, then considering the worst case, in which the
status of all three phases are NRF-2L, there are still six critical
voltage vectors available on the external limit of the vector dia-
gram, as shown in Fig. 14(b). Therefore, the inverter can operate
like a two-level inverter. The waveform quality is reduced but
the maximum modulation index is the same compared to the
normal operation.
When the status of one phase (e.g. phase A) is RF, then if
the status of the other two phases are healthy or NRF, the
available voltage vectors are shown in Fig. 14(c). As seen, the
six critical voltage vectors on the perimeter of the inner hexagon
are still available. Therefore, the fault-tolerant operation can be
obtained, while the maximum modulation index is limited to
0.577. Now, we consider an even worse case compared to the
aforementioned cases: if the status of the other two phases is
NRF-2L, then Fig. 14(d) shows the available four voltage
vectors under this condition. In fact, the equivalent circuit of the
3L-ANPC inverter under this operation mode is topologically
identical to the four-switch three-phase inverter, which has been
presented to achieve the fault-tolerant operation of a two-level
inverter in [6]. Therefore, the 3L-ANPC inverter is still able to
operate under this condition, while the maximum modulation
index is reduced to 0.577.
If the status of two phases (e.g. phases Aand B) are RF, then
even if the third phase is healthy, only three voltage vectors
are available, which are (0 0 ), (0 0 0), and (0 0 +). In this
case, the 3L-ANPC inverter cannot continue operating.
We notice that, in [8], another possible fault-tolerant oper-
ation was proposed for 3L-NPC inverters, which also applies
for 3L-ANPC inverters. This solution uses only one dc-link ca-
pacitor to generate a two-level voltage waveform. For example,
if S
a 1
/D
a 1
, S
b 1
/D
b 1
, and S
c 1
/D
c 1
fail together, then the faulty
phases can only generate 0 and output voltage levels
using the lower dc-link capacitor. Fig. 15 shows the available
voltage vectors. In this condition, the 3L-ANPCinverter can op-
erate like a two-level inverter, while the maximum modulation
index is reduced to 0.577. Similarly, instead of using the lower
dc-link capacitor, we can also use the upper dc-link capacitor
to achieve fault-tolerant operation of 3L-ANPC inverters when
S
a 4
/D
a 4
, S
b 4
/D
b 4
, and S
c 4
/D
c 4
fail together.
B. Multiple Device Short Failure of 3L-ANPC Inverters
Table VII summarizes the status of the devices and their
impact on the status of the faulty phase of 3L-ANPC invert-
ers under multiple device short-failure conditions. As seen, the
faulty phase can only generate 0 output voltage level under
any device short-failure condition, classifying the phase status
to be RF. For example, if S
a 1
/D
a 1
and S
a 4
/D
a 4
are healthy,
then even if all the other devices in the phase fail simultaneously,
the faulty phase still has the RF status. In another example,
as long as S
a 2
/D
a 2
, S
a 4
/D
a 4
, and S
a 5
/D
a 5
are all healthy, the
faulty phase still has the RF status even if all the other devices
in the phase fail together. According to the proposed control
strategies, Table VIII summarizes the fault-tolerant capability
of 3L-ANPC inverters under multiple device short-failure con-
ditions. It shows that only one phase status can be RF, while
the status of the other two phases must be healthy. The in-
verter will operate like a two-level inverter, while the maximum
modulation index is reduced to 0.577.
IV. RELIABILITY COMPARISON FOR 3L-NPC
AND 3L-ANPC INVERTERS
The circuit of a 3L-NPC inverter is similar to Fig. 1, except
that the NPCswitches S
5
and S
6
in each phase are removed. The
main components and their count for reliability calculation of the
two inverters are listed in Table IX. It is usually considered that
adding more devices will reduce the reliability of the inverter.
528 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
Fig. 14. Vector diagram of 3L-ANPC inverters under multiple device open failure conditions.
Fig. 15. Vector diagram of 3L-ANPC inverters using lower dc-link capacitor
for fault tolerant operation.
TABLE VII
OPERATION UNDER MULTIPLE DEVICE SHORT FAILURE (IN ONE PHASE) IN A
3L-ANPC INVERTER
TABLE VIII
FAULT TOLERANT CAPABILITY OF A 3L-ANPC INVERTER UNDER MULTIPLE
DEVICE SHORT-FAILURE CONDITIONS
In this section, we will carry out a comprehensive reliability
comparison for 3L-NPC and 3L-ANPC inverters.
A. Fault-Tolerant Operation of 3L-NPC Inverters
First, using the similar analysis approach for 3L-ANPC in-
verters, we summarize the fault-tolerant operation of 3L-NPC
inverters in the following.
1) For single device open failure, the phase status is: NRF-
2L for D
5
or D
6
failure, and RF for S
1
/D
1
, D
2
, D
3
, and
S
4
/D
4
failure. S
2
and S
3
must be healthy for fault-tolerant
operation.
TABLE IX
COMPONENTS AND THEIR COUNT OF 3L-NPC AND 3L-ANPC INVERTERS FOR
RELIABILITY CALCULATION
TABLE X
OPERATION UNDER MULTIPLE DEVICE OPEN FAILURE (IN ONE PHASE) IN A
3L-NPC INVERTER
TABLE XI
OPERATION UNDER MULTIPLE DEVICE SHORT FAILURE (IN ONE PHASE) IN A
3L-NPC INVERTER
2) For single device short failure, S
1
/D
1
and S
4
/D
4
must be
healthy for fault-tolerant operation. For any other device
failure, the phase status is RF.
3) Tables X and XI summarize the status of the devices and
their impact on the status of the faulty phase of 3L-NPC
inverters under multiple device open and short-failure con-
ditions, respectively.
4) Tables VI and VIII are still valid for 3L-NPC inverters.
B. Reliability Analysis Techniques
According to the MIL-HDBK-217F military standard [27],
the failure density function of a component is given by (3).
The reliability function of a component gives the probability of
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 529
TABLE XII
COMPONENT FAILURE RATES FOR RELIABILITY CALCULATION
survival until time t, given by (4)
f(t) = e
t
(t > 0) (3)
R(t) = 1
_
t
0
f(t)dt = 1 (1 e
t
) = e
t
(4)
where failure rate is the frequency at which a system or com-
ponent fails. It is usually given in failure in time (FIT), where 1
FIT is equal to one failure within 10
9
operating hours.
To evaluate the reliability function of an inverter consisting
of a number of components, depending on the complexity and
redundancy characteristics of the inverter, different computa-
tion methods can be used, such as series-connected system and
k-out-of-n: Gsystem[28], [29]. However, due to the complicated
fault-tolerant operation of 3L-NPC and 3L-ANPC inverters, our
approach is to aggregate the component and device failure rates
to evaluate the inverter overall reliability function, which means
the inverter reliability function should be derived from the sum
of all the possible fault tolerant operations. In this paper, the
inverter reliability is analyzed for a general purpose rather than
an accurate reliability engineering calculation. Some factors,
such as stress factor and temperature factor, are not consid-
ered. The components included for the reliability analysis are
switches and their gate drivers, antiparallel diodes, NPC diodes,
snubber/clamp circuit, and dc-link capacitors. The failure rates
of these components are listed in Table XII [30], [31]. Since
for any fault tolerant operation, the dc-link capacitors and the
snubber/clamp circuits must be healthy, they can be viewed as a
whole part, and its reliability function is given by the following:
Q = (e

4
t
)
2
(e

5
t
)
2
. (5)
The reliability function for 3L-ANPC and 3L-ANPC inverters
are derived in the following.
1) Reliability Function of 3L-NPC Inverters: First, we de-
ne that T
x|x=a,b,c
is the probability that all the devices in phase
x are healthy, as given by the following:
T
a,b,c
= (e

1
t
)
4
(e

2
t
)
2
(e

3
t
)
2
. (6)
1) For single device short failure:
S
x1
/D
x1
and S
x4
/D
x4
in all three phases must be healthy to
ensure the continuous operating of 3L-NPCinverters. We dene
X
x|x=a,b,c
as the probability that only one device fromS
x2
, D
x2
,
S
x3
, D
x3
, D
x5
, and D
x6
in phase x fails, as given by (7). Then,
the inverter reliability function is derived by (8)
X
a,b,c
= 2(1 e

1
t
)(e

1
t
)
2
(e

2
t
)
4
(e

3
t
)
2
+ 2(1 e

2
t
)(e

1
t
)
4
(e

2
t
)
3
(e

3
t
)
2
+ 2(1 e

3
t
)(e

1
t
)
4
(e

2
t
)
4
(e

3
t
) (7)
R = (T
a
T
b
X
c
+T
b
T
c
X
a
+T
a
T
c
X
b
+T
a
T
b
T
c
)Q. (8)
If output voltage reduction is not allowed during the fault-
tolerant operation, which means the maximummodulation index
is the same as normal operation, then all the devices in the in-
verter must be healthy. Therefore, the reliability function of the
inverter is derived by the following:
R = T
a
T
b
T
c
Q. (9)
2) For multiple device short failure:
For multiple device short-failure conditions, the failure can
only occur in one phase, while the other two phases must be
healthy. Therefore, we dene X
x|x=a,b,c
as the probability
that the status of phase x is RF in this case, as given by the
following:
X
a,b,c
=

T
1
T
2
T
4
D
5

D
6
+T
1
[

T
4
T
3
D
6

D
5
+T
4
(1 T
2
T
3
D
5
D
6
)] (10)
where T
m|m=14
is the probability that both devices in the
pair are healthy. For example, T
1
represents the probability that
both S
x1
and D
x1
are healthy.

T
m
= 1 T
m
represents the
probability that one or both devices in the pair fail. D
m|m= 16
is the probability that diode D
m
is healthy.

D
m
= 1 D
m
is
the probability that diode D
m
fails.
Therefore, (10) can be expressed by the following:
X
a,b,c
=
_
1 (e

1
t
)(e

2
t
)
_
(e

1
t
)
2
(e

2
t
)
2
(e

3
t
)(1 e

3
t
)
+
_
1 (e

1
t
)(e

2
t
)
_
(e

1
t
)
2
(e

2
t
)
2
(e

3
t
)(1 e

3
t
)
+ (e

1
t
)
2
(e

2
t
)
2
_
1 (e

1
t
)
2
(e

2
t
)
2
(e

3
t
)
2
_
.
(11)
Then, the inverter reliability function is the same as (8) by
substituting equation (11).
If output voltage reduction is not allowed during fault-tolerant
operation, the reliability function of the inverter is the same as
(9).
3) For single device open failure:
S
x2
and S
x3
in all three phases must be healthy for the suc-
cessful operation. We dene X
x|x=a,b,c
as the probability that
one device from S
x1
, S
x4
, and D
x1
through D
x6
in phase x fails,
530 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
as given by the following:
X
a,b,c
= 2(1 e

1
t
)(e

1
t
)
3
(e

2
t
)
4
(e

3
t
)
2
+ 4(1 e

2
t
)(e

1
t
)
4
(e

2
t
)
3
(e

3
t
)
2
+ 2(1 e

3
t
)(e

1
t
)
4
(e

2
t
)
4
(e

3
t
). (12)
Then, the inverter reliability function is the same as (8) by
substituting equation (12).
If output voltage reduction is not allowed during the fault-
tolerant operation, then D
x5
or D
x6
in phase x is allowed to fail,
while S
x1
, S
x4
, D
x1
through D
x4
in phase x must be healthy.
Accordingly, we need to modify (12) into the following:
X
a,b,c
= 2(1 e

3
t
)(e

1
t
)
4
(e

2
t
)
4
(e

3
t
). (13)
Then inverter reliability function is the same as (8) by substitut-
ing equation (13).
4) For multiple device open failure:
For multiple device open-failure conditions, it allows at most
one faulty phase to have RF status, while the status of the
other two phases can be healthy or NRF-2L. We dene
X
1|x=A,B,C
as the probability that all of S
x1
, S
x4
, D
x1
, and D
x4
in phase x are healthy equaling to (e

1
t
)
2
(e

2
t
)
2
, X
2|x=A,B,C
is the probability that all of S
x2
, S
x3
, D
x5
, and D
x6
in phase
x are healthy equaling to (e

1
t
)
2
(e

3
t
)
2
, and X
3|x=A,B,C
is
the probability that both D
x2
and D
x3
in phase x are healthy
equaling to (e

2
t
)
2
. T
x|x=a,b,c
is dened as the probability
that all of the devices S
x1
/D
x1
through S
x4
/D
x4
in phase x are
healthy, as given by the following:
T
a,b,c
= (e

1
t
)
4
(e

2
t
)
4
. (14)
Then, the inverter reliability function is shown in the following
by substituting equation (14):
R = [(1 A
1
A
3
)A
2
T
b
T
c
+ (1 B
1
B
3
)B
2
T
a
T
c
+ (1 C
1
C
3
)C
2
T
a
T
b
+T
a
T
b
T
c
]Q. (15)
However, (15) does not consider the fault tolerant operation,
in which only one dc-link capacitor is used to generate a two-
level waveform, as shown in Fig. 15. Therefore, we also need to
calculate the reliability function under this operating condition,
and exclude the common part fromthe reliability function in (15)
in order to avoid double counting. We dene T as the probability
that all the S
x4
, D
x4
, and D
x3
in the three phases are healthy
equaling to (e

1
t
)
3
(e

2
t
)
6
. P
x|x=a,b,c
is the probability that
all the devices S
x1
, D
x1
, and D
x2
in phase x are healthy equaling
to (e

1
t
)(e

2
t
)
2
.

Px|x = a, b, c is the probability that one or
more failure occur in S
x1
, D
x1
, and D
x2
in phase x equaling to
1 (e

1
t
)(e

2
t
)
2
. Then, the inverter reliability function can
be express by the following:
R = 2A
2
B
2
C
2
T(

P
a

P
b
P
c
+

P
b

P
c
P
a
+

P
a

P
c
P
b
+

P
a

P
b

P
c
)Q. (16)
TABLE XIII
POSSIBLE OPERATING CONDITIONS OF A 3L-ANPC INVERTER FOR MULTIPLE
DEVICE OPEN FAILURE
Therefore, the nal reliability function of the 3L-NPC inverter
under multiple device open-failure conditions should be the sum
of the results in (15) and (16).
If output voltage reduction is not allowed during the fault
tolerant operation, then the status of faulty phases cannot be
RF. This means all the devices S
x1
/D
x1
through S
x4
/D
x4
in
phase x must be healthy. Therefore, the reliability function of
the inverter is the same as (9) by substituting (14).
2) Reliability Function of 3L-ANPC Inverters: First, we de-
ne T
x|x=a,b,c
as the probability that all the devices in phase x
are healthy, as given by the following:
T
a,b,c
= (e

1
t
)
6
(e

2
t
)
4
(e

3
t
)
2
. (17)
1) For single device short failure:
3L-ANPC inverters can continue operating under any single
device short-failure condition with a reduced maximummodula-
tion index equal to 0.577. We dene X
x|x=a,b,c
as the probability
that one device fails in phase x, as given by the following:
X
a,b,c
= 6(1 e

1
t
)(e

1
t
)
5
(e

2
t
)
4
(e

3
t
)
2
+ 4(1 e

2
t
)(e

1
t
)
6
(e

2
t
)
3
(e

3
t
)
2
+ 2(1 e

3
t
)(e

1
t
)
6
(e

2
t
)
4
(e

3
t
). (18)
Then, the inverter reliability function is the same as (8) by
substituting (17) and (18).
If output voltage reduction is not allowed during the fault
tolerant operation, all the devices in the inverter must be healthy.
Therefore, the reliability function of the inverter is the same as
(9) by substituting (17).
2) For multiple device short failure:
For multiple device short failure, at least two phases must
have the healthy status, while the status of the other phase can
be RF. We dene X
x|x=a,b,c
as the probability that the status of
phase x is RF under multiple device short-failure conditions,
as given by (19). Then, the inverter reliability function is the
same as (8) by substituting (17) and (19)
X
a,b,c
=

T
1
T
2
T
4
T
5
+T
1
[

T
4
T
3
T
6
+T
4
(1 T
2
T
3
T
5
T
6
)].
(19)
If output voltage reduction is not allowed during the fault tol-
erant operation, then all devices in the inverter must be healthy.
LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 531
Fig. 16. Reliability function comparison for 3L-NPC and 3L-ANPC inverters for case 1. (a) ssf. (b) sof. (c) msf. (d) mof.
Fig. 17. Reliability function comparison for 3L-NPC and 3L-ANPC inverters for case 2. (a) ssf. (b) sof. (c) msf. (d) mof.
In this case, the reliability function of the inverter is the same as
(9) by substituting (17).
3) For single device open failure:
3L-ANPC inverters can continue operating under any single
device open-failure condition. Therefore, the reliability function
is the same as that for single device short-failure condition. If
output voltage reduction is not allowed during the fault tolerant
operation, then the status of the faulty phase must be NRF,
whose probability is given by the following:
X
a,b,c
= 2
_
1 e

1
t
_
(e

1
t
)
5
(e

2
t
)
4
(e

3
t
)
2
+ 2
_
1 e

3
t
_
(e

1
t
)
6
(e

2
t
)
4
(e

3
t
). (20)
Then, the inverter reliability function is the same as (8) by
substituting (17) and (20).
4) For multiple device open failure:
For multiple device open failure, according to Tables V and
VI, the possible combinations of the three-phase status for
the successful operation of 3L-ANPC inverters are shown in
Table XIII. The phase status 3L output means the phase can
generate all three voltage levels. 2L output means the phase
can only generate V
dc
/2. 0 means the phase can generate
zero level, but not all three voltage levels.
We dene T as the probability that S
x1
/D
x1
through S
x4
/D
x4
are all healthy in phase x, as given by the following:
T = S
1
S
2
S
3
S
4
D
1
D
2
D
3
D
4
= (e

1
t
)
4
(e

2
t
)
4
(21)
where S
m|m=16
is the probability that device S
m
is healthy,
and

S
m
= 1 S
m
is the probability that device S
m
fails.
The probability that the phase status is 3L output, 2L
output and 0 are given by (22)(24)
P
3L
= (

D
5
S
6

S
5
D
6
+

D
5
S
6
S
5
+D
5

S
5
D
6
+D
5
S
5
)T (22)
P
2L
= (

D
5

S
6
+

D
5
S
6

D
6

S
5
+D
5

D
6

S
5
)T (23)
P
0
= S
2
D
5
[D
2
S
5
(1 S
1
S
3
S
4
D
1
D
3
D
4
) +

D
2
S
3
D
6
+D
2

S
5
S
3
D
6
(1 S
1
S
4
D
1
D
3
D
4
)] +

S
2
S
6
D
3
[1 (1 D
2
S
5
) (1 S
3
D
6
)]
+S
2

D
5
S
6
D
3
(

S
3
S
5
D
2
+S
3
[

D
2
D
6
+D
2
_
1

D
6

S
5
_
(1 S
1
S
4
D
1
D
4
)]). (24)
Then, the inverter reliability function is expressed by the fol-
lowing:
R =
_
3P
0
(P
2L
+P
3L
)
2
+ (P
2L
+P
3L
)
3
_
Q. (25)
Similar to the reliability calculation of 3L-NPC inverters,
we also need to calculate the reliability function under the
532 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012
operating condition, as shown in Fig. 15, and exclude the com-
mon part from the reliability function in (25). We dene P
0
as the probability that the faulty phase can only generate 0 and
V
dc
/2 output voltage levels (the phase status is P
0
), as
given by (26). Then, for the fault tolerant operation, two phases
can have the P
0
status and the remaining phase has 3L
output status. Or, the status of all three phases is P
0
. There-
fore, the inverter reliability function for this type of operation is
given by (27)
P
0
= S
3
S
4
D
3
D
4
{S
2
D
5
[D
2
S
5
(1 S
1
D
1
)
+

D
2
D
6
+D
2

S
5
D
6
(1 S
1
D
1
)]
+

S
2
S
6
_
1

D
6
(1 D
2
S
5
)

+S
2

D
5
S
6
_

D
2
D
6
+D
2
_
1

D
6

S
5
_
(1 S
1
D
1
)
_
(26)
R = 2
_
3 P
2
0
P
3L
+P
3
0
_
Q. (27)
The nal reliability function of the 3L-ANPC inverter under
multiple device open-failure conditions is the sum of the results
in (25) and (27).
If output voltage reduction is not allowed during the fault
tolerant operation, then all the three phases can have the status
of either 2L output or 3L output. Therefore, the reliability
function is expressed by the following:
R = (P
2L
+P
3L
)
3
Q. (28)
C. Reliability Comparison of 3L-NPC and 3L-ANPC Inverters
Based on the calculation results of 3L-NPC and 3L-ANPC
inverters above, we plot and compare their reliability functions
calculated over a span of 20 years for single and multiple device
open- and short-failure conditions, respectively. Considering the
different requirement of electrical drive applications, the com-
parison is studied for two cases as follows.
Case 1: The reliability function includes all the possible fault
tolerant operations for 3L-NPC and 3L-ANPC inverters. In
this case, the maximum modulation index can be either the
same or lower compared to that in normal operation. The
comparison for the reliability of the two inverters is plotted
for single device short failure (ssf), single device open failure
(sof), multiple device short failure (msf), and multiple device
open failure (mof) in Fig. 16(a)(d), respectively.
Case 2: The reliability function only includes the fault tolerant
operations in which the maximum modulation index is the
same as that in normal operation. The comparison for the
reliability of the two inverters are plotted for ssf, sof,
msf, and mof in Fig. 17(a)(d), respectively.
For electrical drives, a reduced maximum modulation index
compared to normal operation is usually allowed during the
fault tolerant operation so that the drive system can continue
working, but at a lower speed or a derated output power. The
results of case 1 in Fig. 16 show that 3L-ANPC inverters have
higher reliability than 3L-NPC inverters for such applications.
For example, considering over a span of 16 years, 3L-ANPC
inverters have an increased reliability around 18%, 12.5%, 10%,
and 8.5%compared to 3L-NPCinverters for mof, msf, ssf,
and sof, respectively. For certain electrical drives, which do
not allow a reduced maximum modulation index during fault
tolerant operation, the results of case 2 in Fig. 17 show that
the two inverters have similar reliability for device open-failure
conditions. However, for device short-failure conditions, 3L-
NPC inverters have higher reliability than 3L-ANPC inverters.
V. CONCLUSION
Reliability and survivability of power electronics converter-
based electrical drives are very important in terms of safety and
economic cost. This paper analyzes the operation of 3L-ANPC
inverters for high-power drives under device failure conditions,
and proposes the fault tolerant strategies to enable continuous
operating of the 3L-ANPCinverters under both open- and short-
failure conditions for single and multiple device failure. The
analysis, simulation, and experiment results show that the re-
liability and robustness of the inverters and electrical drives
are greatly improved by using the proposed solution. Moreover,
since no additional components are added to standard 3L-ANPC
inverters, the cost for robust operation of drives is lower. Acom-
prehensive comparison for reliability function of 3L-ANPC and
3L-NPC inverters is investigated. The results show that 3L-
ANPC inverters, even though employing more semiconductor
devices, have higher reliability than 3L-NPC inverters when a
derating is allowed for the drive systems under fault tolerant op-
eration. If a derated operation is not allowed, the two inverters
have similar reliability for device open failure, while 3L-NPC
inverters have higher reliability than 3L-ANPC inverters for
device short failure.
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Jun Li (S07) was born in Liaoning, China, in 1981.
He received the B.S. degree in automation fromTian-
jin University, Tianjin, China, in 2004, the M.S. de-
gree in power electronics from Zhejiang University,
Hangzhou, China, in 2006, and the Ph.D. degree in
power electronics from North Carolina State Univer-
sity, Raleigh, in 2010.
He is currently a Senior R&D Engineer in ABB
U.S. Corporate Research Center, Raleigh. His re-
search interests include topology and control of
high-power multilevel converters for medium volt-
age drives and renewable energy generation.
Alex Q. Huang (S91M94SM96F05) received
the B.Sc. degree in electrical engineering from
Zhejiang University, Hangzhou, China, in 1983, the
M.Sc. degree in electrical engineering from Chengdu
Institute of Radio Engineering, Chengdu, China, in
1986, and the Ph.D. degree from Cambridge Univer-
sity, Cambridge, U.K., in 1992.
From 1994 to 2004, he was a Professor with the
Center for Power Electronics Systems, Virginia Poly-
technic Institute and State University, Blacksburg.
Since 2004, he has been a Professor of Electrical
Engineering at the North Carolina State University, Raleigh, where he is also
the Director of the Semiconductor Power Electronics Center and the Progress
Energy Distinguished Professor and the Director of the new National Science
Foundations Engineering Research Center for Future Renewable Electric En-
ergy Delivery and Management Systems. His research interests include power
management, emerging applications of power electronics, and power semicon-
ductor devices.
Zhigang Liang (S10) was born in Sichuan, China,
in 1981. He received the B.S. and M.S. degrees
in electrical engineering from Zhejiang University,
Hangzhou, China, in 2003 and 2006, respectively.
He is currently working toward the Ph.D. degree at
the Future Renewable Electric Energy Delivery and
Management (FREEDM) Systems Center, North Car-
olina State University, Raleigh.
From 2006 to 2007, he was a System Engineer
with Monolithic Power Systems, Inc., Hangzhou. His
research interests include high-efciency power con-
version, microinverters and module-integrated converters for photovoltaic ap-
plications, and energy management in dc microgrid.
Subhashish Bhattacharya (M85) received the B.E.
(hons.) degree from the Indian Institute of Technol-
ogy, Roorkee, India, in 1986, the M.E. degree in elec-
trical engineering from the Indian Institute of Sci-
ence, Bangalore, India, in 1988, and the Ph.D. degree
in electrical engineering from the University of Wis-
consin, Madison, in 2003.
From 1998 to 2005, he was with the Flexible AC
Transmission Systems and Custom Power Group,
Westinghouse Science and Technology Center,
Pittsburgh, PA. Since August 2005, he has been an
Assistant Professor in the Department of Electrical Engineering, North Car-
olina State University, Raleigh. He is a Faculty Member of the National Science
Foundations Engineering Research Center for Future Renewable Electric En-
ergy Delivery and Management Systems. His research interests include FACTS,
utility applications of power electronics, active lters, high-power converters,
converter control techniques, integration of energy storage to the grid, and ap-
plication of new power semiconductor devices.