Design of an Audio Delta - Sigma A/D Converter

Hari Prasath Venkatram

Contents I Introduction 1
140 Modulator Order Vs Peak SNR, OSR = 128 160

II Architecture

1
Peak SNR in dB 120

III Modulator Design - I CRFB - using MATLAB Toolbox 1 IV Modulator Design - II -CIFF using MATLAB Toolbox 2 V Switched-Capacitor Realization and kT/C Noise 3 V-A Switched-Capacitor Implementation . . . . 4 VI Spectre-Verication VIIDecimation Filter VII-A Hogenauer Filter Structure . . . . . . . . . VIII on-Ideal Eects N VIII-Ainite-DC Gain . . . . . . . . . . . . . F VIII-B andwidth and Slew-Rate . . . . . . . B VIII-C nalog-Noise . . . . . . . . . . . . . . A VIII-D apacitor Mismatch - D/A . . . . . . C VIII-D.1 uttery Randomization . . . B VIII-D.2 irst-Order Mismatch Shaping F VIII-E igital Truncation Errors . . . . . . . D IX Conclusion I. Introduction Parameter Value Signal BW 0-20 kHz Clock Freq 5.2 MHz Accuracy 18 bit II. Architecture The maximum oversampling ratio for the given signal bandwidth and the clock frequency is 128. For OSR of 128, several modulators were simulated with 1-4 bit quantizers. Modulator Order Vs Peak SNR for dierent Quantizers is shown in the gure 1. From the gure 1, the 3-order Modulator with 2 bit quantizer has a peak SNR of 122 dB. The 2-nd Order Modulator with 4-bit quantizer has a peak SNR of 116 dB. 3-rd Order Modulator with 2-bit quantizer was chosen to reduce the complexity of the quantizer used in the delta-sigma modulator. The SQNR for the chosen 3-rd Order Modulator is 122 dB. Thus, the design is thermal noise limited. The complexity of the Dynamic Element Matching Logic is reduced by the choice of a 2-bit quantizer. The . . . . . . . . . . . . . . . . . . . . . 4 9 9 9 9 12 12 12 12 13 13 14

100

80

60

1 bit Quantizer 2 bit Quantizer 3 bit Quantizer 4 bit Quantizer

40 1

3 4 Modulator Order

Fig. 1. Order Vs SNR, OSR = 128

Out-Of-Band Gain H = 2 was chosen to allow maximum input to the quantizer. The advantages of having a lowpass nature for the STF in the CIFB and CRFB modulator comes at the cost of large capacitors required for their realizations. After my initial design in MATLAB for CRFB, I found that the capacitors required are very large and hence changed the modulator architecture to CIFF which gives a reasonable values for the capacitors. The following section explains my initial CRFB design and then a CIFF design which was implemented in Spectre. III. Modulator Design - I CRFB - using MATLAB Toolbox Among the dierent architectural choices CIFB,CIFF,CRFB and CRFF, I initially chose CRFB for the following reasons [1]. The icker noise corner for deep-sub micron process are in the order of MHz range. Hence, the STF was chosen to have a maximally at lowpass nature to lter any out-band noise or tones. Further, NTF zero optimization was performed to improve SQNR by 8-dB when compared to NTF without zero optimization. This allows me to use a 4 level quantizer instead of a 9 level quantizer without zero optimization and reduce the digital logic required for dynamic element matching. Further, the dynamic-range scaled coecients were converted to rational fractions. The quantized coecients cause a peaking of 0.01 dB in the in-band and the overall peaking in the STF is less than 0.03 dB. Hence, I chose these quantized coecients to realize the capacitor ratios for the circuit-level implementation.

g1

x3

b1

Z-1 1 -Z
-1

x1

c1

Z-1 1 - Z-1

x2

c2

1 1 - Z-1

c3

a1

a2

a3

TABLE I Unscaled - CRFB Modulator Coefficients

SQNR Vs Amplitude , OSR = 128, H =2 140 130 120

i 1 2 3 i 1 2 3

ai 0.1617253168531 0.5797742477013 0.7504538491571 bi 0.1617253168531 0 0

gi 3.614248218646310e-04 0 0 ci 1 1 1

125

100 120 SQNR in dB 115 80 60 40 20 6 4 2 0

TABLE II Dynamic Range Scaled -CRFB Modulator Coefficients

120

100

80

60 40 Amplitude in dB

20

Fig. 2. Amplitude Vs SNR, OSR = 128

Imaginary Axis

i 1 2 3 i 1 2 3

ai 0.255504864607152 0.539232455621136 0.275531395915048 bi 0.255504864607152 0 0

gi 9.155624560380091e-04 0 0 ci 0.588702581665257 0.394757145709813 2.72366002670908

1 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6

Pole - Zero Plot

The choice of this modulator is not optimum in terms of practical realization. The capacitors required for realizing this modulator coecients are very large. Therefore, I changed my design to CIFF architecture. The following sections explain the similar design procedure for CIFF modulator. [1]

0.8 1 1 0.5 0 Real Axis 0.5 1

Fig. 3. Pole - Zero Map

TABLE III Dynamic Range Scaled -CRFB Quantized Modulator Coefficients

IV. Modulator Design - II -CIFF using MATLAB Toolbox Among the dierent architectural choices CIFB,CIFF,CRFB and CRFF, I chose CIFF for the following reasons. The Integrators process only the quantization noise, hence the linearity requirements for the integrators are less when compared to CIFB . Further, NTF zero optimization was performed to improve SQNR by 8-dB when compared to NTF without zero

i 1 2 3

ai 0.25 0.5 0.25

gi 0.001 0 0

bi 0.25 0 0

ci 0.6 0.4 2.7

NTF w/ and w/o Zero Optimization for 3-rd Order Modulator 0 20 40 60 80 100 120 140 3 10 w/ Zero Optimization w/o Zero Optimization

TABLE IV Unscaled - CIFF Modulator Coefficients

i 1 2 3 i 1 2 3 4

ai 1.330589521680359 0.741499597211506 0.161244452225379 bi 1 0 0 1

gi 3.613921648891427e-04 0 0 ci 1 1 1 -

dB

TABLE V Dynamic Range Scaled -CIFF Modulator Coefficients

2 1

10 10 Normalized Frequency

20 0 20 40 dB 60 80 100 120 140 0

Fig. 4. NTF - Frequency Response NTF and STF for 3-rd Order Modulator

NTF STF

i 1 2 3 i 1 2 3 4

ai 1.628625880702360 1.758748119141032 1.390005133904675 bi 0.817001336799664 0 0 1

gi 0.001313462352447 0 0 ci 0.817001336799664 0.516041354292258 0.275144669518540 -

60 80 100 120 140 1 1.5 2 2.5 3 3.5 x 10 0.1 0.2 0.3 Normalized Frequency
3

denominator. V. Switched-Capacitor Realization and kT/C Noise Considering the switch-ON resistance and the amplier noise in g 13, the total noise power across C1 is given by,
0.5

0.4

vc1 = 2

kT C1

1+

x 4 + 1 + x 3(1 + x)

, x = 2Ron gm1

Fig. 5. STF - Maximally Flat Response, NTF

optimization. This allows me to use a 4 level quantizer instead of a 9 level quantizer without zero optimization and reduce the digital logic required for dynamic element matching. However, The CIFF architecture requires a active adder before the quantizer. Further, the dynamic-range scaled coecients were converted to rational fractions. The quantized coecients and the modied NTF and STF are shown. The scaling of x3 and x2, leads to very small values of g. Therefore, x3 and x2 were aggressively scaled. I played around with the DR-scaled coecients to arrive at the quantized rational fractions. There is negligible change in the modulator performance even after the quantized coecients. The coecients of CIFF modulator at the summing node before the quantizer is realized using a switched-capacitor block. Therefore, the coecients are normalized with common-

The noise power can be minimized if x 1. Under these assumptions, the noise at the input of the rst-integrator is 2kT . The modulator maximum input signal is -2dBFS. C1 Assuming that the modulator has -3 dBFS signal and the thermal noise contribution is about 75%, the capacitance required to meet SNR of 110 dB with OSR of 128 is 4 2kT 10110/10 = 34.4pF 3 0.25 OSR

C1 =

(1)

TABLE VI Dynamic Range Scaled -CIFF Quantized Modulator Coefficients

i 1 2 3 4

ai 32/20 17/20 14/20 -

gi 0.001 0 0 -

bi 4/5 0 0 20/20

ci 4/5 1 1/4 -

Integrator Output States Un-Scaled Coe 30 20 10 0 0 DR-Scaled Coe 3 2 1 0 0 Quantized Scaled Coe 4 3 2 1 0 0 0.1 0.2 0.3 0.4 0.5 Normalized Input 0.6 0.7 0.8 0.9

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Fig. 12. Dynamic - Range Scaled State Outputs

u

g1 b1 b4

Z-1 1 - Z-1

x1

c2

Z-1 1 - Z-1

x2

c3

Z-1 1 - Z-1

x3 a3

a2 c1 a1 D/A

The noise contribution from the second and third integrators is very small and unit capacitors were used to realize the ratio required for the modulator coecients. The capacitor values and the switched-capacitor implementation is shown in g. 14 and g. 16. A. Switched-Capacitor Implementation The CIFF modulator was implemented in Spectre [2]. The three integrators(g(14)), active summer, quantizer(g(16)) and timing(g(15)) diagram are shown as follows, VI. Spectre-Verification The CIFF-3rd Order Modulator was simulated in Cadence using macro-models. The simulated model is a dif-

ferential version, whereas the single-ended version is shown in g 14 for simplicity. Voltage scaling was performed to transform the matlab-model to spectre. The input range was set to 1 Volt and the integrator swings were also restricted to 1 V. The artifacts that were noticeable in the modulator spectrum are the fth and seventh harmonics. This can be attributed to the non-linear quantizer model.The Spectre model deviates from the MATLAB PSD at regions close to fs /2. The Out-of-band Modulator spectrum is not at. I think this artifact was due to the niteswitch resitance and the non-linear variation of the switch resistance in the cadence model. Further, I used a mid-rise quantizer instead of mid-tread quantizer. The simulated modulator output spectrum is shown in the g 17. The time-domain simulation output is shown in g( 18).

X1

C7

1 C10 2 C8 2 1 + Y V 2

X2

Int / Sum

Capacitance(pF) C1 = Cd1,2= 50 pF , C2 = 62.5 pF C3 = C4 = 5 pF C5 = 0.3 pF, C6 = 1.2 pF C7 = 3.2 pF, C8 = 1.7 pF C9 = 1.4 pF, C10= C11 = 2 pF

X3

C9

C10

I-1

Vin+

I- 2 I-3 Active Summer

Total-Capacitance - 182.3 pF

Fig. 14. CIFF- SC-Sum and Quantizer

Timing Diagram 2 1 2 1 2 1 2 1 2

X1(n-1)

X1(n)

X1(n+1)

X1(n+2)

X1(n+3)

X1(n+4)

X2(n-1)

X2(n)

X2(n+1)

X2(n+2)

X2(n+3)

X2(n+4)

X3(n-1)

X3(n)

X3(n+1)

X3(n+2)

X3(n+3)

X3(n+4)

V(n)

V(n+1)

V(n+2)

V(n+3)

X1(n-1)

X1(n)

X1(n+1)

X1(n+2)

X1(n+3)

X1(n+4)

Fig. 15. CIFF- SC-Timing

Vdac1,2 2

C1,2

2 1 C2 C4

Vinx1 1 C3 2 1 + x2 2

C1

C6 1 C5 2 2 1 + x3

Fig. 16. CIFF- SC- Integrators

SQNR Vs Amplitude , CIFF, OSR = 128, H =2 140 120

NTF w/ and w/o Zero Optimization for 3-rd Order Modulator 0 20

100 SQNR in dB
40

80 60 40 20 120 100
dB 60 80 100 120

130 125 120 115 6 4 2 0 2 20 4 0 80 60 40 Amplitude in dB

140 3 10

10 10 Normalized Frequency

Fig. 6. Amplitude Vs SNR, OSR = 128

1 0.8 0.6 Imaginary Axis 0.4 0.2 0 0.2 0.4 0.6 0.8 1 Pole-Zero Plot of NTF

Fig. 8. NTF - Frequency Response, CIFF NTF and STF for 3-rd Order Modulator

20 0 20 dB 40 60 80 100 120 0
1 0.5 0 Real Axis 0.5 1

40 60 80 100 120 0.005 0.01 0.015

0.1

0.2 0.3 0.4 Normalized Frequency

Fig. 9. STF, NTF, CIFF

0.5

Fig. 7. Pole - Zero Map, CIFF

CIFF-Modulator Output 3 V U 2 20 Modulator Output 1 40 60 80 100 120 140 60 160 80 180 10 10

2 1 1

Cadence and MATLAB Model Verification

MATLAB Model Spectre Model Ideal NTF

7th Harmonic 5th Harmonic

Modulator Output Spectrum in dB

40

100

200 300 400 Normalized Input Points

500

10

Fig. 10. Modulator Input/Output - Time Domain Simulation

CIFF Modulator Spectrum 0 20 Modulator Output Spectrum in dB 40 60 80 100 120 100 140 150 160 180 200 0 200 0 2 4 6 8 x 10 0.1 0.2 0.3 Normalized Frequency 0.4
3

Normalized Frequency
Fig. 17. Spectre-Verication

0 50

Spectre-Modulator Output 0.8 0.5 0.6 0.4 State Outputs in V

Fig. 11. PSD - Simulated and Expected, CIFF

0.2 0 0.2 0.4 0.6 0.8 1 X1 X2 X3 Y

2 C2

1 Vin 2

C1

2 1 +

1 Vout CL
1.8 2 2.2 2.4 2.6 2.8 3 3.2 Time in second(s) 3.4 3.6 3.8 x 10
6

Fig. 18. State Outputs

Fig. 13. Integrator-Noise

VII. Decimation Filter

1

Decimated A/D Time-Domain Output at Nyquist Rate

The Decimation lter should satisfy the following criteria, The composite response of the NTF and the decimation lter should be a low-pass transfer function. The gain response should be at and supress harmonics at fs /OSR.

0.8 0.6 0.4 Amplitude in V 0.2 0 0.2 0.4 0.6 0.8 1 0

A. Hogenauer Filter Structure As a rst-cut design solution, a 4th order Hogenauer Sinc-Filter structure was implemented with downsampling of 128. The droop in the pass-band edge is around 15 dB. The lter response and decimated time domain output is shown in g VII-A and g 20 respectively.

0.5

1.5

2.5

3 x 10

3.5
3

Decimation Filter and NTF Response

0
15 dB Droop at bandedge

Fig. 20. Decimated time domain output

Decimation Filter

20

40

Hogenauer Sinc4 Filter Structure CIFF,3rd Order Modulator NTF SignalBand Edge Downsample by 128. Notches @ nfs/128, n = 1,2.....

Output

Sinc4 Filter

Magnitude in dB

1.28 MHz Elliptic - 8th Order Filter

32

40 kHz

60

80

Output

1 1 - Z-1

1 1 - Z-1

1 1 - Z-1

1 1 - Z-1 K = (1/128)4 K

100

120

Yout

1 - Z-1

1 - Z-1

1 - Z-1

1 - Z-1 128

140

Hogenauer Filter Structure

160 10
3

10 Normalized Frequency

10

Fig. 21. Decimation in 2-steps, Sinc4 ,Elliptic Filter

VIII. Non-Ideal Effects

Fig. 19. Sinc4 Hogenauer Structure

A. Finite-DC Gain The nite DC-gain for the non-inverting integrator is analyzed as follows [4],

Therefore, Decimation lter was designed in two-steps. First, A 4th order Sinc-lter was implemented with downsampling of 4 [3]. This was followed by a 8th order Elliptic lter with downsampling of 32 to give the data at the Nyquist rate. The Filter-response normalized to the sampling frequency fs is shown in the g 22. Note that there are two-dierent set of axes in the g 22. The decimation lter-block is shown in g 21. The entire A/D model was simulated in MATLAB and Cadence. The power-spectral density of Spectre-Model and Hogenauer decimated output is shown in g(24) and g(23) are shown below.

C1 Vo (z) = Vin (z) C2 (1 + A1 ) 1 + dc

Z 1
C1 C2 (A+1)

Z 1

Therefore, the zero is shifted from DC to C2C2 (A+1) 1 . If (A+1)+C the signal bandwidth is much higher than the above corner frequency, the eect of DC-gain on modulator output is minimal. This condition translates to Adc ( + 2) OSR. However, the derivation assumes the integrator is linear.

Normalized Frequency, f /fs 0 0 20 40 Magnitude in dB 60 80 100 120 140 160 0 80

th

0.1 0 8 Order Elliptic Filter, downsample by 32 NTF

Spectre-Model and Cumulate SNR 0 20 Modulator Spectrum in dB

40 Magnitude in dB

Band-Edge

Sinc , downsample by 4

40 60 80 100 120 140 160

-122 dB, 20 bit ENOB

120

0.05

0.1

0.15 0.2 0.25 0.3 0.35 Normalized Frequency, f /fs

0.4

0.45

0.5

180 10
3

10

Fig. 22. Decimation in 2-steps, Sinc4 ,Elliptic Filter

10 Frequency in Hz

10

Fig. 24. PSD-Spectre Model

A/D Spectrum after Decimation 0 20 40 Spectrum in dB 60 80 100 120 140 160 180 200 1000 2000 3000 4000 5000 Frequency in Hz 6000 7000
SNR = 133.8 dB ENOB = 21.94 bits

A/D Spectrum Cumulate SNR

1 -V/A

2 C2

Vin

C1

2 V +

C1 1 C1 Vin[n-1]

C2 C2 V[n-1](1+1/A)

Fig. 23. Decimated A/D Spectrum

2 C1 V[n-1/2](1/A) C2 V[n-1/2](1+1/A)

PSD of a 3rd-Order Sigma-Delta Modulator 0 20 40 60 80 PSD [dB] 100 120 140 160 180 200 10

A dc = 25 A dc = 38 A dc = 100 A dc = 500 A dc = 1000

10

10

10

Frequency [Hz]

Fig. 25. Finite DC-Gain Eect

SNR Vs DC-Gain 130 125 120 SNR in dB 115 110 105 100 95 90 25 30 35 40 45 50 DC-Gain in dB 55 60

Fig. 26. Finite DC-Gain Eect

B. Bandwidth and Slew-Rate The nite-bandwidth of the integrator causes a gainerror dependant on the bandwidth of the integrator [5]. However, If the bandwidth of the integrator is very-low the modulator might become unstable. When compared to the eect of slew-rate on modulator output , the bandwidth causes only a linear gain error. The slew-rate eect causes non-linearities at the modulator output. The integrator output histogram is shown in the gure 28. If the integrators are allowed to slew for only 20% of the Ts /2, the slew-rate requirement is 51 V/s. The Slew-rate causes non-linear distortion in the modulator output spectrum. Fig. 29. The output of the integrator is expressed as the follows, vo (kT + t) = vo (kT ) + C1 u(kT )(1 et/ ) C2 (1 + A1 ) dc
No of hits

Integrator Output Histogram 4000 2000 0 0.5 No of hits 4000 2000 0 0.4 0.3 0.2 0.1 0 x2 - state 0.1 0.2 0.3

0 x1 - state

0.5

No of hits

4000 2000 0 0.2 0.15 0.1 0.05 0 0.05 x3 - state 0.1 0.15 0.2

Fig. 28. integrator output histogram

Modulator Spectrum - Eect of Slew Rate 20 40 Power Spectral Density 60 80 100 120 140 160 10
4

1 The maximum rate of the above expression is CCu(kT ) . 2 Therefore, the integrator will slew if the above maximum rate is larger than the integrator slew-rate.

PSD Vs GBW, CIFF 20 Modulator Spectrum in dB 40 60 80 100 120 140

GBW = 4 MHz GBW = 5 MHz GBW = 10 MHz GBW = 15 MHz

SR = 1 V/ s SR = 5 V/ s SR = 40 V/ s

10 Frequency in Hz

Fig. 29. Slew-Rate Eect

160 180 10
4

10 Frequency in Hz

C(z) = D(z) =

Fig. 27. Gain-Bandwidth Eect

a2 z 1 a3 c3 z 2 + 1 z 1 (1 z 1 )2 1 a3 z 1 z 1

(3) (4) (5)

C. Analog-Noise Considering the switch-ON resistance and the amplier noise in g 13, the total noise power across C1 is given by, vc1 2 kT = C1 x 4 1+ + 1 + x 3(1 + x) , x = 2Ron gm1 B(z) vn2 (z) C(z) vn1 (z) = , = vo (z) 1 + B(z) vo (z) 1 + B(z) vn3 (z) vo (z) (6) = D(z) (7) 1 + B(z) (8)

By having larger gm Ron product, the contribution from the amplier can be reduced [1]. Further, the noise-transfer function from each integrator input to the output is calculated from the gure(30), as follows, a 2 c2 z c2 c3 a 3 z a1 z + + 1 z 1 (1 z 1 )2 (1 z 1 )3
1 2 3

The noise transfer function from the rst-integrator dominates the total noise power at the output of the modulator. D. Capacitor Mismatch - D/A D.1 Buttery Randomization Buttery randomization was implemented for a fourlevel D/A with 7 unary elements for 10-bit and 12-bit linear

B(z) =

(2)

g1 b1 b4

vn,1

Z-1 1 - Z-1

x1

c2 vn,2

Z-1 1 - Z-1

x2

c3 vn,3

Z-1 1 - Z-1

x3 a3 vn,4 a2

c1 a1 D/A

Fig. 30. CIFF-Noise

Thermometer-Coding 4 2
Smoothed Modulator PSD in dB DACMismatch and Butterfly Randomization (Signal Band)
10bit D/A 12bit D/A 10bit D/A w/ Butterfly Randomization

0 0 4 2 0 0

20

10 15 First-Order Shaping

20

40 60 80 100 120 140

10

15

20

Fig. 31. Element Selection Logic

feedback D/A Converter [5]. The modulator output spectrum is shown in g 33. The SNR determined by just the mismatch error and oversampling ratio is SNR = 3M 2 OSR x

0.5

1.5

2.5

3.5 x 10
3

Normalized Frequency

Fig. 32. Buttery Randomization

D.2 First-Order Mismatch Shaping First-Order Mismatch Shaping switching sequence is shown in the gure 31 and mismatch shaped 8-bit and 10bit linear feedback D/A. The rst-order mismatch shaping and DWA gives similar switching sequences [1]. E. Digital Truncation Errors For 120 dBFS truncation noise, the word lengths required for the Sinc-Filter are 2 1012 0.25/2 Word Length = 19 (9) 12 OSR For Second-Integrator 2 1012 0.25/2 Word Length = 12 (10) 12 OSR3 The Decimated A/D spectrum for dierent word-lengths is shown in g 34

First-Order Mismatch Shaping - CIFF 3rd Order Modulator Output

8b D/A

20 Smoothed PSD in dB 40 60 80 100 120 140 160

8b D/A, 1st Shaping ideal DAC 10b D/A 10b D/A, 1st Shaping

10 Normalized Frequency
Fig. 33. First-Order Shaped Modulator Spectrum

A/D Output Spectrum after Decimation with Sinc4 Filter 20 A/D Output Spectrum in dB 40 60 80 100 120 140 160 10
3

No Truncation Error 16-bit Word Length 20-bit Word Length 10-bit Word Length

10 Frequency in Hz

Fig. 34. A/D Spectrum - Digital Truncation Errors

Architecture Order OSR Bandwidth Clock Frequency Accuracy Peak SNR Max Input Amplitude Total Capacitance Quantizer Levels Adc Slew-Rate Bandwidth D/A Mismatch Decimation Register Length

CIFF 3rd 128 0-20 kHz 5.12 MHz 21 bits 122 dB 0.7 Vp 183.2 pF 5 100 25V /s 7 MHz 10-bit Hogenauer,Elliptic 19,12
TABLE VII Performance Summary

IX. Conclusion A 3rd order CIFF Audio-band Modulator was designed in cadence and MATLAB. Spectre macro-models were used for simulating the high-level modulator. The various nonideal eects like slew-rate, bandwidth, capacitor mismatch were analyzed using SIMULINK models. The performance summary is presented above. %Simulate SNR clear all; set(0,DefaultAxesFontSize,16,... DefaultAxesFontWeight,bold,... DefaultAxesFontName,times,... DefaultAxesLineWidth,2,... DefaultAxesGridLineStyle,:,... DefaultAxesMinorGridLineStyle,:,... DefaultLineLineWidth,2,... DefaulttextInterpreter,latex); nlev = 4; amp=[-120:5:-20 -17:1:0]; Nfft = 2^14; finhigh = 31/Nfft; finlow = 3/Nfft; t=[0:4*Nfft-1]; OSR=128; f0=0; % for order = 1:8 % for bit = 1:4 % nlev=2^bit; % H=synthesizeNTF(order,128,1,1.5,0); % [snr,amp]=simulateSNR(H,128,amp,0,nlev,1/(4*128),14); % snr_peak(order,bit)=max(snr); % end % end % i=1:8

References
[1] R. S. G. C. Temes, Understanding Delta-Sigma Data Converters. IEEE Press, 2005. [2] R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. Wiley Series on Filters, 1986. [3] E. Hogenauer, An economical class of digital lters for decimation and interpolation, Acoustics, Speech and Signal Processing, IEEE Transactions on, vol. 29, no. 2, pp. 155162, Apr 1981. [4] G. Suarez, M. Jimenez, and F. Fernandez, Behavioral Modeling of Switched Capacitor Integrators with Application to Modulators, vol. 2, Aug. 2006, pp. 709713. [5] F. Maloberti, Data Converters. Springer, 2007.

% for j=1:4 % plot(i,snr_peak(:,j)); % hold on % end

%Time Domain Simulation

u=0.5*(nlev-1)*sin(2*pi*finhigh*t); v=simulateDSM(u,H,nlev); H=synthesizeNTF(3,128,1,2,0); n=1:3000; H1=synthesizeNTF(3,128,0,2,0); figure [snr,amp]=simulateSNR(H,128,amp,0,nlev,finhigh,13); stairs(t(n),v(n),b); plot(amp,snr,r) hold on [peak_snr1,peak_amp1]=peakSNR(snr,amp); stairs(t(n),u(n),m); hold on [snr,amp]=simulateSNR(H,128,amp,0,nlev,finlow,13); plot(amp,snr) v1=v(end-2^14+1:end); [peak_snr,peak_amp]=peakSNR(snr,amp); spec=fft(v1.*hann(Nfft))/(Nfft*(nlev-1)/4); xlabel(Amplitude in dB) snr=calculateSNR(spec(1:ceil(Nfft/(2*OSR))+1),31); ylabel(SQNR in dB) NBW=1.5/Nfft; title(SQNR Vs Amplitude , OSR = 128, $H_{\infty}$=2) f=linspace(0,0.5,Nfft/2+1); axis([-120 0 10 140]) Sqq = 4*(evalTF(H,exp(2i*pi*f))/(nlev-1)).^2/3; grid on figure figure plot(f,dbv(spec(1:Nfft/2+1)),b); hold on plot(f,dbp(Sqq*NBW),m); %NTF Diagram [num,den,fs]=tfdata(H,v); %Stability of the modulator with quantizer gain [h,w]=freqz(num,den,linspace(1e-3,1,10000)); figure [num,den,fs]=tfdata(H1,v); l1 = 1- 1/Ga; [h1,w1]=freqz(num,den,linspace(1e-3,1,10000)); f=linspace(0,0.5,1000); semilogx(w,20*log10(abs(h)),w,20*log10(abs(h1))); z=exp(2i*pi*f); xlabel(Normalized Frequency); magl1=evalTF(l1,z); ylabel(dB); subplot(2,1,1),plot(f,dbv(magl1)); title(NTF w/ and w/o Zero Optimization for 3-rd Order Modulator) subplot(2,1,2),plot(f,180/pi*angle(magl1)); axis([1e-3 0.5 -140 10]); %Dynamic Range Scaling xlim = 0.6 [ABCDs umax]=scaleABCD(ABCD,nlev,f0,[3 3 3]) [a1 g1 b1 c1] = mapABCD(ABCDs,form) figure u1=0.01:0.01:0.82; for i=1:82 u=0.01*i*(nlev-1)*sin(2*pi*finhigh*t); [v xn xmax y] = simulateDSM(u,ABCD,nlev,zeros(3,1)); x1(i)=xmax(1,1); x2(i)=xmax(2,1); x3(i)=xmax(3,1); end u1=0.01:0.01:0.82; for i=1:82 u=0.01*i*(nlev-1)*sin(2*pi*finhigh*t); [v xn xmax y] = simulateDSM(u,ABCDs,nlev,zeros(3,1)); x4(i)=xmax(1,1); x5(i)=xmax(2,1); x6(i)=xmax(3,1); end

% Modulator Output and Spectrum % form=CIFF; [a,g,b,c]=realizeNTF(H,form); %b(2:end)=0; %Maximally flat STF; ABCD=stuffABCD(a,g,b,c,form); [Ha Ga] = calculateTF(ABCD); f=linspace(0,0.5,1000); z=exp(2i*pi*f); magHa=dbv(evalTF(Ha,z)); magGa=dbv(evalTF(Ga,z)); figure plot(f,magHa,b,f,magGa,r) xlabel(Normalized Frequency) ylabel(dB) title(NTF and STF for 3-rd Order Modulator); figure plotPZ(Ha,b) hold on xlabel(Real Axis) ylabel(Imaginary Axis) title(Pole-Zero Plot of NTF)

%Fractional Realizations

sv1 = simulateESL(v,mtf1,nlev); a2=[1.6 .875 0.7]; echo off b2=[0.8 0 0 1]; c2=[0.8 1 0.25]; T = 20; g2=0; figure ABCDf=stuffABCD(a2,g2,b2,c2,form); subplot(211); u1=0.01:0.01:0.82; plotUsage(thermometer(v(1:T),nlev)); for i=1:82 set(gcf,NumberTitle,off); u=0.01*i*(nlev-1)*sin(2*pi*finhigh*t); set(gcf,Name,Element Usage); [v xn xmax y] = simulateDSM(u,ABCDf,nlev,zeros(3,1)); title(Thermometer-Coding) x7(i)=xmax(1,1); subplot(212); x8(i)=xmax(2,1); plotUsage(sv1(:,1:T)); x9(i)=xmax(3,1); title(First-Order Shaping); end ideal = v; hold on % subplot(3,1,1),plot(u1,x1,b,u1,x2,r,u1,x3,g); DAC element values e_d = randn(nlev,1); hold on e_d = e_d - mean(e_d); subplot(3,1,2),plot(u1,x4,u1,x5,u1,x6) e_d = sigma_d * e_d/std(e_d); hold on ue = 1 + e_d; subplot(3,1,3),plot(u1,x7,u1,x8,u1,x9) hold on % Convert v to analog form, assuming no shaping thermom = zeros(nlev+1,1); lim1=ones(length(u1))*3; for i=1:nlev hold on thermom(i+1) = thermom(i) + ue(i); subplot(3,1,1),plot(u1,lim1,m) end conventional = thermom(v+1); hold on subplot(3,1,2),plot(u1,lim1,m) % Convert sv to analog form hold on dv1 = ue * sv1; subplot(3,1,3),plot(u1,lim1,m) %NTF and STF after fractional realization [Ha Ga] = calculateTF(ABCDf); f=linspace(0,0.5,1000); z=exp(2i*pi*f); magHa=dbv(evalTF(Ha,z)); magGa=dbv(evalTF(Ga,z)); figure plot(f,magHa,b,f,magGa,r) xlabel(Normalized Frequency) ylabel(dB) title(NTF and STF for 3-rd Order Modulator); figure plotPZ(Ha,b) hold on xlabel(Real Axis) ylabel(Imaginary Axis) title(Pole-Zero Plot of NTF) window = ds_hann(Nfft); spec = fft(ideal.*window)/(nlev*Nfft/8); spec0 = fft(conventional.*window)/(nlev*Nfft/8); spec1 = fft(dv1.*window)/(nlev*Nfft/8); figure; clf plotSpectrum(spec0,31,r); hold on; plotSpectrum(spec1,31,b); plotSpectrum(spec,31,g); sigma_d=1/1024 %v = (v+nlev-1)/2; % scale v to [0,M] mtf1 = zpk(1,0,1,1); %First-order shaping sv1 = simulateESL(v,mtf1,nlev+1); echo off

% Simulate ESL sigma_d=1/256 v = (v+nlev-1)/2; % scale v to [0,M] mtf1 = zpk(1,0,1,1); %First-order shaping

ideal = v; % DAC element values e_d = randn(nlev,1);

e_d = e_d - mean(e_d); e_d = sigma_d * e_d/std(e_d); ue = 1 + e_d; % Convert v to analog form, assuming no shaping thermom = zeros(nlev+1,1); for i=1:nlev thermom(i+1) = thermom(i) + ue(i); end conventional = thermom(v+1); % Convert sv to analog form dv1 = ue * sv1; window = ds_hann(Nfft); spec3 = fft(conventional.*window)/(nlev*Nfft/8); spec4 = fft(dv1.*window)/(nlev*Nfft/8);

plotSpectrum(spec3,31,m); plotSpectrum(spec4,31,c); axis([1e-3 0.5 -200 0]); x1 = 2e-3; x2=1e-2; y0=-180; dy=dbv(x2/x1); y3=y0+3*dy; plot([x1 x2 x2 x1],[y0 y0 y3 y0],k) text(x2, (y0+y3)/2, 60 dB/decade) hold off; grid; ylabel(PSD); xlabel(Normalized Frequency); legend(thermometer,rotation,ideal DAC);