MICROCONTROLLER

MICROCONTROLLER
3.1 INTRODUCTION:
A microcontroller is a computer on a chip. It is an integrated chip that is usually a part of an embedded system. It is a microprocessor that is meant to be more self contained, independent and yet function as a tiny, dedicated computer. It lays emphasis on high integration, low power consumption, self sufficiency and cost effectiveness.

It is typically designed using the CMOS (complementary metal oxide semiconductor) technology and has the following features:

a central processing unit discrete input and output pins serial input/output ports(UARTs) peripherals such as timers, counters RAM,ROM,EPROM,Flash Memory(EEPROM) Clock generator May include analog to digital converters In-circuit programming and debugging support

Memory (RAM/ROM)

Micro controller

I/O ports

Peripherals

3.2 ADVANTAGES:
Design with microcontrollers has the following advantages: It has low overall system cost as all the peripherals are integrated onto a single chip. The product size is small, therefore the product is handy. System design and troubleshooting is simple. Since the peripherals are integrated on the same chip, the system is reliable. Additional RAM and ROM can be easily interfaced as and when required. Microcontrollers with on-chip ROM provides a software security feature.

3.3 ATMEL 89C51:

ATMEL 89C51 is a low power, high performance CMOS 8 bit microcomputer with 4K bytes of flash programmable and erasable read only memory (PEROM).The device is manufactured using Atmels high density, non volatile memory technology and is

compatible with industry standard MCS-51 instruction set. It provides highly flexible and cost effective solution to many embedded control applications.

3.4 FEATURES OF ATMEL 89C51:

It has 4K bytes of in-system reprogrammable flash memory (1000 write/erase cycles). Fully static operation: 0-24 MHz Three level program memory lock 128 bytes internal RAM

32 programmable I/O lines(4 ports) Two 16 bit timers/counters Six interrupt sources Programmable serial channel Low power idle and Power down modes 8 bit CPU optimized for controlled applications 64 K of external program memory Full duplex UART Extensive Boolean processing capabilities

3.5 DESCRIPTION OF BLOCK DIAGRAM:

3.5.1 CENTRAL PROCESSING UNIT (CPU):

The microcontroller consists of 8 bit ALU with associated registers like register A, register B,Program status word(PSW),Stack pointer(SP) ,a 16 bit program counter(PC) and a 16 bit data pointer register(DTPR).

3.5.2 ARITHMETIC LOGIC UNIT(ALU): The ALU performs arithmetic and logic functions on 8 bit variables.An

important and unique feature of the microcontroller architecture is that the ALU can manipulate 1 bit as well as 8 bit data types. It performs the Operations over the operands held by the temporary registers TMP1 and TMP2.The temporary registers cannot be accessed by the user.

3.5.3 ACCUMULATOR (ACC): It is referred to as register A or Acc.It is an 8 bit register. It holds the source operand and stores the result of arithmetic operations. It is used as the source or destination register for logical operations. It is either explicitly or implicitly specified in instructions. the

3.5.4 B REGISTER: It is a special function register. It can be used to store one of the operands in multiply and divide instructions. For all other instructions it is used as a scratch pad.

3.5.5 PROGRAM STATUS WORD (PSW): It is one of the special function registers .It is an 8 bit register. It is a set of Flags that indicate the status of the microcontroller.

CY AC

FO RS1 RS0 OV --

CARRY BIT (CY):

This bit holds the carry bit in case of arithmetic operations. It also serves the purpose of accumulator in case of Boolean operations. It is set to one when there is a carry out from the D7 bit. It can also be rest or cleared through instructions.

AUXILLARY CARRY (AC): It is used in BCD operations usually. This bit is raised when a carry occurs from lower nibble to the higher nibble during arithmetic operations on BCD numbers.

FLAG 0(F0): Flag 0 is available to the user for general purpose.

REGISTER SELECT BITS (RS1 AND RS0): The two bits RS1 and RS0 are used to select one of the four available register banks As below: RS1 RS0 REGISTER BANK ADDRESS

0 0 1 1

0 1 0 1

0 1 2 3

00H-07H 08H-0FH 10H-17H 18H-1FH

OVERFLOW FLAG (OF): The overflow flag was created specifically for the purpose of informing the programmer that the result of the signed number operation is erroneous. If the result of an operation on signed numbers is too big for a register, an overflow has occurred and the programmer must be notified.

PARITY (P):

The parity bit reflects the number of 1s in the accumulator. P=0 implies that accumulator contains an even number of 1s. P=1 implies that the accumulator contains odd number of 1s. D1 bit is a user definable flag and is reserved for future use.

3.5.6 SPECIAL FUNCTION REGISTER BANK (SFR): It is a set of special function registers that can be addressed using their respective addresses allotted to them. The addresses lie in the range 80H-FFH.

3.5.7 INPUT-OUTPUT (I/O) PORTS (P0-P3): These four latches-drivers pairs have been allotted to the four parallel I/O ports. These latches have been allotted addresses in the special function register bank. Using these allotted addresses, the user can communicate with the ports.

3.5.8 BUFFER: It is a special function register and consists of two registers namely transmit buffer and the receive buffer. The transmit buffer receives data parallely and transmits serially. The receive buffer on the other hand is serial in parallel out register.

3.5.9 TIMING AND CONTROL UNIT: It derives the timing and control information required for the internal operation of the circuit and the control information required for controlling the external bus.

3.5.10 OSCILLATOR: It generates the basic timing clock signal required for the operation of the circuit using a crystal oscillator connected externally.

3.5.11 EPROM AND PROGRAM ADDRESS REGISTER:

These blocks provide on chip EPROM and a mechanism to internally address the EPROM.

3.5.12 RAM AND RAM ADDRESS REGISTER: They provide 128 bytes of RAM and a mechanism to internally address the RAM

3.6 PIN DESCRIPTION OF AT89C51:

1. Vcc(PIN 40): It is the supply voltage pin.

2. Vss (PIN 20): It is the return pin for the power supply .

3. RESET (PIN 9):

It is an input pin. It is active high i.e. normally low. Upon applying a high pulse to this pin, the microcontroller will reset and terminate all its activities. This is often referred to as a power on reset. Activating a power on reset will cause all values in the registers to be lost. The PC is loaded with 0 upon reset and the CPU fetches the first opcode from ROM location 0000. The reset can also be done manually. For the reset input to be effective, it must have a minimum duration of two machine cycles before it is allowed to go low.

XTAL1 AND XTAL2 (PINS 19 AND 18): The microcontroller requires an external oscillator to run it. Most often a quartz crystal

oscillator is connected to the inputs XTAL 1 and XTAL2.the crystal oscillator requires two capacitors of 30pf value. Typically, a 12MHz oscillator is used. The controller can be operated on an external clock also. In such cases, clock is fed to XTAL2 and XTAL1 is grounded.

5.EA/Vpp(PIN 31): EA stands for external access. It is an active low input pin and must be connected to either Vcc or ground. It cannot be left unconnected. For 89c51, it is connected to Vcc. When this pin is low, 89C51 accesses the external program memory. When the pin is high, the microcontroller accesses the internal memory.

6.PSEN (PIN 29): This is an active low output signal. It stands for program store enable. It acts as a strobe to read external program memory.

7. ALE/PROG (PIN 30): It stands for external latch enable. It is an output pin and is active high. This pin is used during external memory access. It is used for demultiplexing of address and data lines. When ALE is high, it indicates that bits are available on respective pins. The ALE pulses are sent at 1/6th of the oscillator frequency.This pin acts as PROG pin during on-chip programming.

8. PORT 0 (PINS 32-39): It is an 8 bit, bidirectional bit addressable I/O port. It plays a dual role and acts as multiplexed address-data lines during external memory access. When ALE=0, the port provides data D0-D7, when ALE=1, it has address A0-A7. To use the pins of port 0 as both input and output ports, each pin must be connected externally to a 10 K pull up resistor. With the external pull-up resistors connected upon reset, port 0 is configured as an output port. In order to make it an input port, the port must be programmed by writing 1 to all the bits.

9. PORT 1(PINS 1-8): It can be used as either input or output port. It is an 8 bit, bidirectional bit addressable port. It does not require any pull-up resistors like port 0 as it has pull-up resistors connected internally. Upon reset, port 1 is configured as an output port. To make it an input port, it is programmed by writing 1 to all its bits.

10. PORT 2(PINS 21-28): It can be used as input or output port. It is an 8 bit, bit addressable bidirectional port. It has internal pull up resistors so it does not require any external pull up resistors. Upon reset it is configured as an output port. It must be programmed as input by writing 1in all its bits. Port 2 is also designated as A8-A15, indicating its dual functions. Port 2 is used in conjunction with port 0 to provide the 16 bit address for the external memory. While p0 provides the lower 8 bits of the address, Port 2 provides the higher 8 bits of the address i.e. A8-A15.

11. PORT 3(PINS 10-17): It is an 8 bit bidirectional bit addressable port. It can be used as an input or output port. It doesnt require external pull up resistors. Although it is configured as an output port upon reset, it is not used that way.

Port 3 has the additional function of providing some important signals.P3.0 and P3.1 are used for the RXD and TXD serial communication signals.P3.2 and P3.3 are set aside for external interrupts.P3.4 and P3.5 are used for timer0 and timer1 respectively.P3.6 and P3.7 are used to provide the WR and RD (both active low) signals for external memory access.

3.7 RAM MEMORY SPACE ALLOCATION:

There are 128 bytes of RAM in the microcontroller. They are assigned addresses 00 to 7FH.they can be directly accessed as memory locations. These 128 bytes can be divided into three different groups as follows:

1. A total of 32 bytes from locations 00 to 1FH are set aside for register banks and the stack. 2. A total of 16 bytes fro locations 20H-27H are set aside for bit addressable read/write memory. 3. A total of 80 bytes from locations 30H to 7FH are used for read and write storage normally called as scratch pad.

Scratch pad 30-7FH

Bit addressable RAM (20-2F) Register Bank 3

18-1FH
Register bank 2 Register bank 1 (Stack) 10-1FH 08-0FH 00-07H Register bank 0

3.7.1 REGISTER BANKS:

32 bytes from 00 to 1FH are set aside for register banks and stacks. These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers R0-R7.the banks are numbered 0 to 3.each register is addressed by its name or by its RAM address. Bits RS0 and RS1 in the PSW determine which bank of registers is currently in use. Register banks that are not selected can be used as general purpose registers. Upon reset, bank 0 is selected.

3.8 PROGRAM MEMORY LOCK BITS:

The chip is provided with three lock bits .these bits can be programmed (P) or left unprogrammed (U).

LOCK BIT PROTECTION MODES:

PROGRAM LOCK BITS LB1 1 2 U P LB2 U U LB3 U U

PROTECTION TYPE

No program lock features MOVC instructions executed from external program fetching memory code are disabled from from

bytes

internal

memory.EA is sampled and latched on reset. further programming of flash is disabled. 3 4 P P P P U P Same as mode 2.verify is also disabled. Same as mode 3.external execution is also

disabled.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without reset, the latch assumes certain random value and holds the value until reset is activated. The latched value of EA has to match with the current logic level of the pin for the device to function properly. The lock bits prevent this match from occurring and hence the code within the microcontroller is secure.