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MOSCAP Fabrication

12th INUP Workshop at IIT Bombay

12th INUP Workshop at IIT Bombay

Why MOSCAP ?
The fabrication of the oxide of an MOS structure is one of the critical steps when fabricating MOSFETs MOSCAP is used as a diagnostic tool for determining the quality of the process used Electrical characterization and monitoring is critical for maintaining gate oxide uniformity Many electrical characterization techniques have been developed over the years to characterize gate dielectric quality. However, the most commonly used tool for studying gate oxide quality in detail is the Capacitance-Voltage (C-V) technique. CV test results offer a wealth of device and process information, including bulk and interface charges and many MOS device parameters.
12th INUP Workshop at IIT Bombay

What all we can get from CV of a MOSCAP ?


Oxide (dielectric) thickness Charges in the oxide Oxide breakdown strength Conductivity type Doping concentration Doping profile in the silicon Work function differences Interface trap densities Properties of electron and hole traps
12th INUP Workshop at IIT Bombay

MOSCAP Structure

Vgate

Top Metal Cross section view

What is the desired structure

Si - body

Top view

12th INUP Workshop at IIT Bombay

MOSCAP Fabrication
Steps involved
Wafer identification (2 Si wafer) Four probe measurement (optional) Cleaning of the wafer Oxidation Ellipsometry (optional) Metal dot deposition Foaming gas annealing Back side etching
12th INUP Workshop at IIT Bombay

Identification of starting Wafer


2 (diameter of the wafer) Si wafer P type or N type depends on desired structure Front side is shining while back side is rough P Type (100) Si wafer having flat in <110> direction Do the four probe measurement To confirm the type of the wafer To find the resistivity of the wafer

P type Si (100) <110>


( ) Planes { } Eq.Planes [ ] Directions < >Eq. Directions

In this experiment:

Four Probe 270m

12th INUP Workshop at IIT Bombay

Cleaning of the Wafer

Various types of cleaning procedures are available RCA cleaning ( Radio Corporation of America) is universally accepted Most rigorous cleaning procedure, Industry standard

RCA cleaning
Two step procedure: SC1 & SC2
HF (Hydrofluoric Acid) clean To remove any native oxide Wafer is dipped for about 30 Sec in 2% HF solution Glass beaker is not used for HF solution

Standard Clean 1 (SC1) To remove the organic contaminates NH4OH : H2O2 : H2O ( 1: 2:7) Solution is heated at 750C 800C for 10 minutes Again HF Clean To remove the oxide formed on the wafer after SC1
12th INUP Workshop at IIT Bombay

Cleaning of the Wafer (contd.)


Standard Clean 2 (SC2) To remove the heavy alkali ions and cations HCl : H2O2 : H2O ( 1: 2:7) Solution is heated at 750C 800C for 10 minutes

Again HF Clean

To remove the oxide formed on the wafer after SC1

Other cleaning procedures:


Piranha Cleaning Mixture of H2SO4 and H2O2 Removes the organic contaminates Less rigorous than RCA To remove the oxide Typical etch rate is about 110nm/min. SiO2 + 6Hf => H2 + SiF6 + 2H2O
12th INUP Workshop at IIT Bombay

BHF etch

Thermal Oxidation of the Wafer


Thermal Oxidation Wet oxidation Dry Oxidation Furnace Oxidation Rapid Thermal Oxidation

You will be doing


Furnace Oxidation Target Oxide Thickness is 10nm

12th INUP Workshop at IIT Bombay

Metal Dot deposition


Al is deposited by means of evaporation on the front side

Cross Section Top view

12th INUP Workshop at IIT Bombay

Back etching and Metallization


After the Al deposition Strip the back oxide by 2% HF Do the back metallization

12th INUP Workshop at IIT Bombay

Oxidation
Stable at high temp >900 C Good Si/SiO2 interface Silicon dioxide (SiO2) as a gate dielectric *SiO2 layer is formed on heating Si in O2 or H2O ambient The Deal- Grove model of Oxidation *It works well for predicting the oxide thickness for thermally grown SiO2 larger than 30nm

12th INUP Workshop at IIT Bombay

Oxide growth
Oxidation of Si proceed by either Si atom diffusing to the SiO2/gas interface or Oxygen molecules diffusing to Si/SiO2 interface
O2 SiO2 Si

At room temperature there is native oxide of thickness ~ 12.5nm due to the presence of oxygen in air
12th INUP Workshop at IIT Bombay

Dry Oxidation
The Si wafer is heated in the presence of oxygen Reaction Si + O2 -----> SiO2 It gives a dense oxide hence is suitable for Gate dielectric Thickness < 100 nm Beyond Deal - grove model requirement

12th INUP Workshop at IIT Bombay

Thickness limiting factor


For sufficiently thin oxide the tox (B/A) (t+) B/A is linear rate coefficient *It depends on orientation of Si, it is higher for (111) compared to (100) For sufficiently thick oxide tox2 B (t+) B is parabolic rate coefficient *It does not depend on Si orientation

12th INUP Workshop at IIT Bombay

Oxidation rate constant

Ref: Gary S.May, Simon M. Sze ,Fundamentals of Semiconductor fabrication


12th INUP Workshop at IIT Bombay

Wet Oxidation
Oxidization in the presence of water vapor Reaction Si + 2 H2O -----> SiO2 + 2 H2 Due to higher diffusivity of H2O as compared to O2, its oxidation rate is higher as compared to dry oxidation. Oxide grown are less dense Dielectric insulation and Masking

12th INUP Workshop at IIT Bombay

SiO2 thickness as a function of reaction time and temperature

Ref: Fundamental of semiconductor fabrication by May, S M Sze


12th INUP Workshop at IIT Bombay

Oxidation system

*double wall Furnace in which a cooling air stream is flow able to provide fast cooldown of a load of wafers
12th INUP Workshop at IIT Bombay

Process requirement
Dry Oxidation For Thickness ~ 15nm Time = 2 min Temperature = 1000 C for all three zone * Ramp up - Constant- Ramp down High purity O2 N2 for cleaning the inner side of furnace tube * N2 is an inert gas, it does not react

12th INUP Workshop at IIT Bombay

Process steps
Set temperature of all zone to 1000 C Wait till temperature reach the required set point Place wafer on boat vertically between two dummy wafers Face of the wafer should be opposite to gas flow Push the boat in oxidation chamber and close the door Set the oxygen flow time Than stop the oxygen flow and ramp it down Remove the wafer from chamber when process done Now do the thickness measurement using Ellipsometry

12th INUP Workshop at IIT Bombay

Thickness Measurement
It is a non-destructive and contact less measurement tool for the characterization of thin films. Measuring the change in polarization state of reflected or transmitted polarized light. The polarization of reflected light depends on the thickness and refractive index of the oxide layer

12th INUP Workshop at IIT Bombay

Procedure to measure thickness


Select model - In this step select and the no. of layers Simulation of the measurement

Measuring and editing the data -Assign optical functions to each layer
Fitting the SE data to the model using desired parameters as a variable to obtain the best fit.
12th INUP Workshop at IIT Bombay

Basic equation of ellipsometry


Light pass through the Polarization State Generator (PSG) * Sets polarization state for the light beam incident Reflected light is then re-polarized and detected by the Polarization State Detector (PSD) Ellipsometry fundamental equation for Measurement = (rp /rs) = tan () ei
*the

amplitudes after reflection are denoted by rp (parallel polarized ) and rs (perpendicular polarized)

Ellipsometry measures two parameters, which are conventionally denoted by (0- 90) and (0- 360) where tan () is the amplitude ratio upon reflection, is the phase shift
12th INUP Workshop at IIT Bombay

Following Parameters can be extracted


Thin film thickness Refractive index Absorption Index (extinction coefficient) Material composition Surface & Interface roughness Uniformity of films and layer stacks Band gap of material Reflectance Transmittance

12th INUP Workshop at IIT Bombay

References
Stephen A. Campbell, The science and engineering of Microelectronics fabrication Gary S. May, Simon M. Sze ,Fundamentals of Semiconductor fabrication Lecture slide by Prof. R. Rao H. G. Tompkins and E. A. Irene (Editors), Handbook of Ellipsometry Manual for Spectroscopic Ellipsometers , SENTECH instruments

12th INUP Workshop at IIT Bombay

Metallization PVD techniques

Application:
Contacts Interconnects
Metallization

Sputtering

Evaporation

Electric Field Sputtering Magnetron Sputtering

RF Sputtering Reactive Sputtering

E-beam Evaporation

Thermal Evaporation

12th INUP Workshop at IIT Bombay

Metal Sputtering
In sputtering, atoms are physically extracted out from a target.
1. Using an Electric field or Magnetron field or RF field metal target is bombarded with Ar+ ions are 2. Ar+ ions knock off the Metal atoms. They lands on the wafer and everywhere else
Ar+ Ar+ Ar+ Ar+

12th INUP Workshop at IIT Bombay

Sputtering (vs Evaporation)


Pros:
Sputtering can get better uniformity over a large size (from larger targets). There can be tighter (and easier) control over alloy composition. Pre-surface sputter cleaning of surface and deposition/ etching processes to control uniformity are possible.

Con:
Certain sputtering systems (glow discharge plasmas) require a medium level vacuum that can increase contamination over evaporation!

12th INUP Workshop at IIT Bombay

Evaporation (vs Sputtering)


Advantages: Highest purity (Good for Schottky contacts) due to low pressures. Disadvantages: Poor step coverage, forming alloys can be difficult, lower throughput due to low vacuum. Evaporation is based on the concept that there exists a finite vapor pressure above any material. The material either sublimes (direct solid to vapor transition) or evaporates (liquid to vapor transition).

12th INUP Workshop at IIT Bombay

Evaporator System

A. Coil heater B. Dimpled boat

Rotary A. Electric heating

Diffusio n

B. E-beam heating

12th INUP Workshop at IIT Bombay

Contact Patterning
Photolithography technique Shadow masking

Back side etching


Using Buffered HF 1:5, oxide on the back side of the wafer is etched out before metallization.
12th INUP Workshop at IIT Bombay

Forming Gas Anneal


Forming Gas Annealing (FGA) at 400oC for 30 min is performed for passivation. This will make Ohmic contact for Al contacts.

12th INUP Workshop at IIT Bombay

Thank you..!!!

12th INUP Workshop at IIT Bombay

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