10. Linear Digital ICs (17.1 17.

4)
! Comparator IC ! DAC , ADC ! 555 timer IC

EE2603-10

Comparator IC
Comparator IC = Two inputs of the IC are compared to each other as below: When V+ is more positive than V- Output Vo will go high to +VCC ( = V- is more negative than V+ ) When V- is more positive than V+ Output Vo will go low to VCC ( = V+ is more negative than V- )
VV+ -VCC +VCC VO

+10 0 +0.1 -10

+10 +0.1 0 -10

+0.1 +0.5

+10

VO=+10V

VO=-10V

VO=+10V

-10

Output is digital either +10 or -10

EE2603-10 2

+10

Reference
+1 -1 -10 VO

+10

When Reference is 0V (Zero-crossing Comparator)

Output is digital either +10 or -10

Input

-10

When V+ is more positive than 0 Output Vo will go high to +VCC When V+ is more negative than 0 Output Vo will go low to VCC
+10 +1 -1

Input
VO

+10

Output is digital either +10 or -10

-10

Reference

-10

When V- is more positive than 0 Output Vo will go low to -VCC When V- is more negative than 0 Output Vo will go high to +VCC
EE2603-10 3

When Reference is Non-0V (Reference-crossing Comparator)

+5 R1 -4 R2

+10 VO -10

+5 0 -4-5 +10

-5

Output is digital

-10

When V- is more positive than Vref -4 Output Vo will go low to -VCC When V- is more negative than Vref -4 Output Vo will go high to +VCC

EE2603-10

Comparator IC
Some improvements such as faster switching of output levels, preventing oscillation while crossing reference, and its output capable of driving a variety of loads are incorporated in IC Comparators such as 311-IC
+ VCC

When Strobed (pin 6= high) the output will follow the input
6 Balance/strobe

Output voltage polarity is the same as input voltage polarity

5 Balance 8

When Pause (pin 6=low) the output will always be high regardless of the input
7 output

2 non-inv input 3 inv input

Output voltage polarity is the reverse of input voltage polarity

4 - VCC

311 - IC output reference 1

Open-Collector Output to facilitate any output voltage level when the output is high

Output will go low to ref= -VCC or 0 according to connection of pin 1

EE2603-10 5

Example: Sketch the output waveform for the following 311 IC Comparator Circuit

+10
Output voltage polarity is the same as input voltage polarity
+1 -1

When Strobed (pin 6= high) the output will follow the input

6 strobe 7 311 - IC 1

output voltage level is +10 when the output is high

Input 2

+10

3
0

Reference
4 -10

Output will go low to ref = 0

EE2603-10

Example: Sketch the output waveform for the following 311 IC Comparator Circuit
+10
Output voltage polarity is the same as input voltage polarity
+1 -1

8 7 311 - IC 6 1

output voltage level is +10 when the output is high

Input 2

+10

Output
-10

Reference
4

High=Strobe

-10

-10

Output will go low to ref = -10

When Strobed (pin 6= high) the output will follow the input

Low=0

EE2603-10

339 IC
Four units of 311-IC wit common V+ (pin 3) and V- (pin 12) (output low is pin 12 voltage) Pull-up resistor needed at the output pins (1,2,13.14) to obtain output high.
3 5 4 7 6 9 8 11 10 2
+1 -1 5 4 +10 3 2

+10

7 6

output1
1

14

input1 ref1 ref2

9 8 11 10

14

13
+1

13

+10

output2
12

12

-1

input2
EE2603-10 8

Window Detector (Comparator with threshold inputs)

+10 5 4 +10 +5 +5 +1 0 7 6 9 3 2 +10 +5 5.1kW 1 +1 0

Comp.2
14

Vin

8 11 10

Output +9

13

+10 +1

Comp.1
12

input Vin > +5V +5 > Vin > +1V Vin < +1V

Comp.1 high high low

Comp.2 low high high

Output low high low +5V +1V Output low Output high Output low 9

EE2603-10

Digital to Analog Converters

Logic0 (0V) Logic1 (5V) 0 1 1 1 Logic1 (5V) Logic1 (5V) MSDigit

D / A Converter
LSDigit

Analog Decimal (7V)

Number

Most Significant Digit (MSD) 23 = 8 0 0

Intermediate Digit

Least Significant Digit (LSD) 20 = 1 1 1

Expressed Number 8+4+2+1=15 0111 0+4+2+1=7

Decimal Weight Binary Number Decimal Number

22 = 4 1 4

21 = 2 1 2

EE2603-10

10

R-2R Ladder D/A Converter (DAC)

R 2R 2R D0
LSD

R 2R D1

R 2R D2 2R D3
MSD

Analog voltage (decimal) output

Vo =

(D0 20 ) + (D1 21 ) + (D2 22 ) + (D3 23 ) +(DN 1 2N 1 ) V

2N

ref

Digital voltage (binary) input

D0 to D3 = 1 or 0

Vref = analog voltage of digit 1 N= N-bit binary word

R 2R 2R
D0=5V LSD

R 2R
D1=5V

R 2R
D2=5V

Analog voltage (decimal) output 2R

D3=0V MSD Vo=2.1875V

Vo =

(1 20 ) + (1 21 ) + (1 22 ) + (0 23 ) 5V = 2.1875V
16

D0=1 , D1=1 , D2 = 1 , D3=0

Vref = 5V

Digital voltage (binary) input

24 = 16 (4-bit binary word)

V 5 N bit DAC has a voltage resolution = ref = = 0.3125V N 2 24

0 1 1 1

EE2603-10

11

DAC using R-2R Ladder Switched Network

R Vref
0

R I2 2R
0 1 0

R I1 2R
1 0

D3 , D2 , D1, D0
I0 2R
1

Digital Inputs Io

I3 2R
1

2R Rf

Current Switches R 2R Ladder Vref Reference Current

D3
MSD

D2

D1

D0 SIn
LSD

Digital switch (binary) input

Vo Vo= ( n)xRf - SI

Vr 1 In = ef N n R 2

I0 to In = values
1kW I3 9V 0 0 MSD 1 2kW I2 2kW 1 1 1kW 1kW I1 2kW 1 1 LSD I0 2kW SIn 1 2kW Rf=1kW

Vref = reference voltage of DAC n = binary digit

N = N-bit binary word

Vo Vo= ( n)xRf - SI

9mA 9 1 I0 = 4 0 = = 0.5625mA 16 1k 2 9mA 9 1 and I1 = 4 1 = = 1.125mA 8 1k 2

Digital switch (binary) input

0 1 1 1

EE2603-10 Vout = ( Iout Rf ) = 3.9375mA 1k = 3.9375V 12

9mA 9 1 I2 = 4 2 = = 2.25mA and I3 = 0mA 4 1k 2 I = Iout = 0.5625 + 1.125 + 2.25 + 0 = 3.9375mA

Analog to Digital Converters

MSDigit Analog Decimal (7V) Logic0 (0V) Logic1 (5V) Logic1 (5V) Logic1 (5V)

A / D Converter
LSDigit

Digital Outputs Analog Input Comparator Integrator Control Logic Count Reset Clock Count Over Digital Counter

Vref

EE2603-10

13

Dual-slope A/D Converter (ADC)

Analog Input Comparator Integrator Control Logic

Digital Outputs Count Reset Clock Count Over

1110 Digital Counter

Vref
Recorded amplitude decreases at fixed rate Analog amplitude recorded during fixed time

Fixed time

0011

0111 1110

Digital count increase with larger decrease time 14

EE2603-10

Ladder-network A/D Converter (ADC)

Digital Outputs Analog Input Comparator Control Logic Count Reset Clock Ladder Network Digital Counter
Ladder (stair-case) analog output voltage Analog voltage

Stop Count

start count

stop count

1. When analog voltage > Ladder DAC output voltage, comparator opens the Control Logic to let the clock count the Digital Counter. Digital bits will increase at the output of Digital Counter. 2. When analog voltage = Ladder DAC output voltage, comparator closes the Control Logic to stop the clock of the Digital Counter. Digital bits will stop increasing at the output of Digital Counter. 3. If the clock is 1MHz, every step 1 will last 1s/Ladder step. For 12-bit Ladder DAC, there will be 212=4096 steps. Then one full count will last 4096s. Or during 1sec, there will be (1sec/4096x10-6sec) full counts = 244 full counts/sec
EE2603-10 15

555 timer IC
555 Timer
8

vcc

If pin 4 (Reset pin) is less than VCC, PNP BJT conducts and (R) becomes high to reset the Flip-flop
Reset 4 7 Discharge

Threshold 6 5k 5 Modulate 5k 2 Trigger 5k 1

R 2/3VCC S 1/3VCC

Discharge pin 7 is zero if Reset and floats if Set

3 output

Comparators RS-Flip-flop More positive applied to the positive Reset(R) or Set(S) with terminal (or more negative applied to logic high input the negative terminal will make output high EE2603-10

Output is zero if Reset and high (VCC) if Set

16

5. If Modulate pin 5 is connected to a dc source or to external resistor, pin 2 and pin 6 levels will be no longer 1/3 or 2/3 of VCC but will be changed to any other Threshold levels. 6

vcc
Reset Discharge R Q 7 4

5 Modulate 5k 2 Trigger 5k 1

5k 2/3VCC

S 1/3VCC

3 output

1. If Threshold pin 6 is more than 2/3 of VCC, R will be high and output Q is Set to zero Threshold pin 6 is less 2. If than 2/3 of VCC, there is no change at output Q

3. If Trigger pin 2 is less than 1/3 of VCC, S will be high and output Q is Set to VCC 4. If Trigger pin 2 is more than 1/3 of VCC, there is no change at output Q
EE2603-10 17

Astable Multivibrator (pulse generator)

vcc
RA
Discharge Threshold Trigger
VCC
(2/3)VCC

RB

7 6 2

VC

output
(1/3)VCC

tc

#1. Let pin 3 is set (=high). Pin 7 will float. Then C is charged to VCC through RA+RB=RCHA #2. But VC is never charged to VCC because when VC=just above (2/3)VCC pin 6 takes care and the output pin 3 will reset. #3. When pin 3 is reset(=low). Pin 7 will be zero. Then C is discharged to 0 through RB=RDISCHA #4. But VC is never discharged to 0 because when VC= just below (1/3)VCC pin 2 takes care and the output pin 3 will set. It repeats step #1 again. 18 EE2603-10

td

VCC

Pulse frequency

(2/3)VCC

VC

(1/3)VCC

tc

td

Charing VC = Vfinal + (Vinitial Vfinal )e 2 2 t / CRC VCC = VCC + VCC e c 3 3

2 1 t / CRC VCC = VCC + ( VCC VCC )e c 3 3 2 1 2 t / CRC tc = 1 + e c = ln = ln 2 tC = CRC ln 2 CRC 3 2 3

tc / CRC

Discharing VC = Vfinal + (Vinitial Vfinal )e 1 1 t / CRC 2 t / CRd VCC = VCC e d =e c 3 2 3

t / CR
d

t / CR 1 2 d VCC = 0 + ( VCC 0)e d 3 3 1 tc = ln = ln 2 td = CRd ln 2 CRC 2

d

T = tc + td =

1 1 1 1.44 1.44 f= = = = f T (RC + Rd )C ln 2 (RC + Rd )C (2RB + RA )C

EE2603-10

19

Example: Find the pulse frequency of the 555 Timer IC Pulse Generator shown below

vcc
RA=7.5kW RB=7.5kW C=0.1m F
7 6 2 1 8 3

output

f= = =

1.44 1.44 = (RC + Rd )C (2RB + RA )C (2 7.5 10 + 7.5 10 )0.1 10

EE2603-10
3

1 1 = T (RC + Rd )C ln 2

1.44

= 635Hz.

20

Monostable Multivibrator (timer)

vcc
R
Discharge Threshold Trigger Output
VCC
(2/3)VCC

7 6 2

output

VC

tc

tc=Pulse width

#1. Let pin 2 is high and pin 3 is low. Pin 7 will zero. Output is also zero. Then C is also discharged to 0 through pin 7 #2. When pin 2 is triggered to zero for a short time, Pin 3 will be high. Then pin 7 is floating. #3. Now C is charged to VCC through R. Output pin 3 is then high #4. But VC is never charged to VCC because when VC= just above (2/3)VCC pin 6 takes care and the output pin 3 will reset. And it stays stable at EE2603-10 reset all the time until another external trigger.

21

vcc
R C
7 6 2 1 Thigh Thigh 8 3

VCC
(2/3)VCC

output

VC

tc Thigh = tc=Pulse width

Charing VC = Vfinal + (Vinitial Vfinal )e tc / CR 2 VCC = VCC + ( VCC )e tc / CR 3

2 VCC = VCC + (0 VCC )e tc / CR 3 2 1 tc = 1 e tc / CR = ln = ln 3 tC = CR ln 3 CR 3 3

Example: Find the pulse width of the 555 Timer IC Monostable circuit, if R = 7.5k and C = 0.1F.

Pulse width = tC = CR ln 3 = 0.1 10 6 7.5 103 1.1 = 0.825ms

EE2603-10 22