c A.H.

Dixon

CMPT 250: Week 1 (Jan 7 - 11)

FORMAL SPECIFICATION OF DIGITAL SYSTEMS

A digital system is any system that can manipulate discrete elements of information. Given an informal description of the system requirements, it is necessary to identify more precisely the following aspects of the digital system before a formal design can be undertaken: All valid inputs that might be delivered to the system; All possible outputs that might be produced by the system; The need for memory to be provided if so, how much? How the outputs will be determined by the inputs and the current contents of memory; How memory is updated. These details can be specied in a number of dierent ways. To construct a satisfactory system, any such specication must provide a description that satises the following requirements: There is never more than one possible result for each given input and memory conguration. Such a system is said to be unambiguous. A result is dened for every possible valid input sequence and memory conguration. In such cases, the system is said to be complete. There are dierent ways of providing formal specications that satisfy these requirements. However, all digital systems can be dened in terms of three sets and two functions. Such a denition provides an abstract or Mathematical Model. Specically, a digital system can be dened by: 1. An Input Set (I) : The set of values that can be input. 2. An Output Set (O) : Range of values that can occur as outputs. 3. A set of States (S) : The set of all values that can be assigned to the collective memory elements of the machine. 4. An Output Function (f : S I O) : The set of transformations performed by the system (NOTE that an output depends on both the input and the current contents of memory). 5. A State Transition Function (g : S I S) : denes how memory is changed as a function of the current inputs and what was previously stored in memory. A digital system is said to be a combinational system if its outputs at any instant depend only on the current value of the inputs. That is, no memory is required. Otherwise it is called a sequential system A combinational system is dened by: 1. An Input Set (I) : The set of values that can be input. 2. An Output Set (O) : A set of values that can occur as outputs. 3. An Output Function (h : I O) : The set of transformations performed by the system. The function F can be dened by a function table, algebraic expression,

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CMPT 250: Week 1 (Jan 7 - 11)

algorithm, or other notation that completely and unambiguiously captures the desired behavior (hence the term behavioral description) A digital system is called a sequential system if its output at any instant depends on the current value of the inputs and the current content of all memory elements, collectively called the state of the machine.

EXAMPLE 1.1: A synchronous, positive edge-triggered digital system that generates the sequence 1, 0, 0, 0, 1, 0, 0, 0, 1, ... Each bit value is output on every rising edge of input, C, provided the input, up, is asserted. Input Set, I : The inputs consist of all valid sequences that can be assigned to the pair (C, up). Since the device is only enabled on the positive edge transition of C (denoted by ), there are two possible valid input pairs: (, 0) and (, 1). Output Set, O : Only one bit-value is output at a time, so the possible outputs are 0, or 1. State Set, S : The purpose of memory is to remember how many times up has been asserted (set to 1) since 1 was last output. This can be 0, 1, 2, or 3 times before a 1 must again be output. In this case the actual value stored in memory is not important; just that four dierent values be stored, corresponding to the four dierent cases. We can label these cases with the symbols S0, S1, S2, and S3. So the state set S = {S0, S1, S2, S3}. Output Function, f : S I O : This function can be expressed as a table that lists the output for each combination of state and input value: STATE 0 1 2 3 INPUT (, 0) (, 1) 1 0 0 0 0 0 0 1

State Transition Function, g : S I S : This function can be expressed as table a table that lists the next state for each combination of current state and input: STATE 0 1 2 3 INPUT (, 0) (, 1) 0 1 1 2 2 3 3 0

1.1

Behavioral Descriptions

Mathematical models of digital systems are examples of behavioral descriptions. A behavioral description is a formal representation of a digital system that denes, either explicitly or implicitly, the inputs, outputs, and states and describes the functions performed by the system. It does not provide any information on the internal structure of the system.

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CMPT 250: Week 1 (Jan 7 - 11)

Any description that provides information sucient to identify the three sets and two functions can be considered a behavioral description. For example, a component model is a common way to express a behavioral description. It consists of two parts: An entity denition that denes the input and output ports and so identies (at least partly) these sets. A functional specication that denes the output function, and if memory is involved, the state set and the state-transition function. A component model can be expressed as follows: 1. An entity denition is often represented by a graphic symbol or black-box diagram, called the entity, with input and output ports labelled so that it can be used as a component in a logic diagaram. 2. The behavior of the device represented by the entity can be provided in a variety of ways that include: algebraic expressions. function table (set of truth tables) itemizing the observed outputs for every possible input (combinational descriptions only) characteristic / output table. state-transition or state-machine diagram (SMD). function select table. This is a table where only the values of the control variables identify each row of the table, and the output is dened by an algebraic expression in terms of the data inputs, rather than by an explicit value. an algorithm that describes a computational procedure for obtaining the outputs. This algorithm may be expressed as an state machine diagram (SMD), or in a hardware description language (eg. VHDL).

EXAMPLE 1.2: Example 1.1 can be expressed as a component model using a State Machine Diagram for the functional specication: SMDs are really just state transition diagrams where additional labels, called Asserted Outputs , are attached to the states, and where the inputs are dened by Boolean Expressions, called Transition Conditions, rather than by binary sequences. Transition Condition: A Boolean function of the input variables with the property that it is true only for any assignment of values to the input variables that results in the transition along the arrow that is being labelled. Asserted Outputs: A list of all output variables that are to be asserted (that is, set to 1). By inference, those variables not included in the list are assumed to be set to 0. Transition Activation Condition: An input that controls the activation of any state transitions. That is, the transitions described by the state machine diagram can only occur when the transition activation condition is satised.

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CMPT 250: Week 1 (Jan 7 - 11)

Example 1.1 can be expressed as follows:

Entity Defintion: up c z

Functional Specification: c= up 0 up up 1 up 2 up up 3 up up z

NOTE: c = is the transition activation condition.

REGISTER TRANSFER NOTATION

it Register Transfer Language is a textual system for describing the behaviour of digital systems whose schematics are characterized by register and other components at an MSI (medium scale integration) and LSI (large scale integration) level of implementation. The use of a formal language is to dene conventions for the representation of digital system behaviour so that the description is precise and unambiguous. Among the important conventions are the following: 1. All register components and signal lines (buses) are labelled. Register labels begin with a capital letter, signal lines (buses) begin with a small letter. For example, R and PC are examples of register names, while ld and abus are examples of signal or bus names.

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2. The bit position within a register or bus is identied by an integer enclosed in parentheses. The numbering of bit positions in a bit-string can be from left to right or right to left, beginning with bit position 0. The most common convention, and that followed in the course will be from right to left, called little endian notation. WIth this notation, bit position 0 denotes the rightmost or least signicant bit. So, for example R(0) denotes the least signicant bit of the binary sequence stored in register R. Similarly abus(0) denotes the value of the least signicant bit on bus abus. 3. A sequence of bit positions within a register or bus is called a range. Ranges are dened by a pair of integers enclosed in parentheses. The left integer (the start position) is followed by a colon, followed by the right integer (the end position). To specify the least signicant 3 bits of the value in tt R, this can be expressed by R(3 : 0). 4. A register transfer statement assigns new values to registers, expressed as follows: <destination register> <expression> 5. A bus (signal) assignment statement assigns values to buses (signal lines), expressed as follows: <destination bus> = <expression> 6. A memory device is labelled according to the rules for registers. A location in memory (i.e. address) is expressed as follows: <memory label > [ <address source> ] Thus M[123] denotes the contents of memory M at address 123. As a second example, IM[R] denotes the contents of memory IM at the address given by the value in register R. Register transfer statements are commonly used in state machine diagrams to describe a particular computation that should take place when the digital system is in a given state. To do so, asserted output lists are allowed to include not only asserted external output variables but also register transfer statements and signal assignment statements. The following behavioural description denes an algorithm for performing unsigned multiplication of two 4-bit non-negative integers using the method of repeated addition: Entity Denition:

4 4

MPY clk rdy mpy d1 prod d2

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CMPT 250: Week 1 (Jan 7 - 11)

clk =

mpy S0 mpy agt0 S1 agt0 mpy S3 mpy

A < d1, agt0 = A > 0 B < d2, P < 0, rdy

S2

P < P + B, A < A 1 agt0 = A > 0

prod = P, rdy

HARDWARE DESCRIPTION LANGUAGES

A hardware description language is one where the entity denition and the functional specication can be expressed in formal textual notation, much as algorithms can be expressed in programming languages. VHDL is a hardware description language for describing electronic systems, either in terms of their behavior (hence called behavioral models) or in terms of their components and their interconnections (and so called structural models). VHDL is the abbreviation for VHSIC Hardware Description Language, where VHSIC stands for Very High Speed Integrated Circuit. Some of the features of VHDL include: 1. Textual notation to describe Hardware 2. Behavioral descriptions can be dened algorithmically 3. Structural properties (signals, propagation delays, component interfaces) can be described. 4. Behavioral descriptions can be combined with structural descriptions to create a model of the digital system. 5. Execution means simulation of the described digital system. 6. Capability of dening models that can generate fabrication hardware instructions.