2011 3rd International Conerence on Advanced Computer Control (CC 2011)

Dynamic Temperature-Aware Task Scheduling Based on Sliding Window Model for

MPSoCs
Luguang Wang, Zhiping Jia, Xin Li, Yang Li
School of Computer Science and Technology
Shandong University
Jinan, P.R. China
e-mail: wlgl9870101@gmail.com
Abstract-As the power density of modern chips increases
drastically, chips are prone to overheating. Thermal hot spots
increase cooling costs, negatively impact reliability and de
grade performance. A valid task scheduling can reduce chip's
average temperature and temperature variations. We propose
a dynamic temperature-aware task scheduling policy based on
sliding window model. This scheduling policy calculates the
probability of task allocation for each core according to cur
rent and historical temperatures of the core, and then the one
with the maximal probability is chosen to execute the ready
task. If multiple cores have the same probability, the scheduler
gives priority to the core that has the minimal average temper
ature of neighbor units. The experimental results show that
this scheduling policy can reduce hot spots, decrease spatial
and temporal temperature variations of all units, and thus
achieve a relatively lower average temperature and more ba
lanced temperature distribution.
Keywords-multiprocessor systems-on-chips(oCs); sliding
window; temperature-aware; mulcore task schedulng; HotSpot
1. INTRODUCTION
In recent years, increasing number of new embedded sys
tems demand high-performance and high-integrated proces
sors to meet their embedded design constrains. In this case,
multiprocessor systems-on-chips (MPSoCs) have been pro
posed as a promising solution. However, because of the fast
growing integration and the increasing number of processor
cores, the chip temperature soars drastically.
Thermal hot spots increase cooling costs, negatively im
pact reliability and degrade performance. Hot spots accele
rate failure mechanisms such as stress migration, and dielec
tric breakdown [I] . Because of the decrease of the efective
operating speed with high temperature, hot spots also afect
performance adversely. Addressing thermal hot spots alone
is not enough to achieve better reliability, and temperature
gradients in time and space determine device reliabilit at
moderate temperatures. Thermal cycling phenomenon can
cause accelerated package fatigue, plastic deformations of
materials and other permanent failures. Large spatial temper
ature variations across the chip may cause performance or
logic failures. For example, clock skew problems become
noticeable for spatial variations of even 15-20 degrees [2].
This research is sponsored by the Natural Science Foundation of
China (NSFC) under grant No. 90718032,60903031, and the In
dependent Innovation Foundation of Shan dong University
(IIFSDU) under grant No. 2009TS032.
978-1-4244-8810-0 /11/$26.00 2011 IEEE 98
Meikang Qiu
Dept. of Electrical and Computer Engineering
University of Kentucky
Lexington, UK 40506, USA
e-mail: mqiu@engr.uky.edu
Several thermal control techniques have been proposed
and applied in modem processors via hardware-based me
chanisms. Dynamic Frequency Scaling (DFS) and Dynamic
Voltage Scaling (DVS), as well as clock gating, are able to
efectively control processors' temperature and reduce ener
gy cost, but the performance overhead is signifcant. As
multi core systems become popular, some scheduling me
chanisms [4, 6, 9] have been studied to control temperature
and balance workload.
Most existing thermal-aware or temperature-aware sche
duling techniques focus on single factor. Sravrou and Tran
coso [3] proposes a thermal-aware scheduling based on tem
perature and cooling effciency of each core, neglecting the
efect of temperature variations in time and space. The prob
abilistic scheduling technique [4] focuses on the effect of
temporal and spatial temperature variations and uses average
temperature of one core to compute its probability. But the
temperature of a core will be afected by its neighbor units.
The temperature of one core and its neighbor units should be
considered at the same time.
In this paper, a sliding window model is intoduced to
denote historical temperatures of each core. A dynamic tem
perature-aware task scheduling policy, ProbHistory (ProbH),
is proposed to achieve better thermal profles. In this sche
duling, current and historical temperatures of each core are
used to calculate the probabilit of task allocation for the
core. Then the one with the maximal probability is chosen to
execute the ready task. If there are multiple cores have the
same probabilit, the scheduler gives priority to the core that
has the minimal average temperature of neighbor units. At
each task arrival, each core's new probabilit value is re
computed. Once the probabilities are updated, we choose the
suitable core to execute the ready task. The experimental
results show that our policy can achieve lower and more sta
ble temperatures.
The remainder of this paper is organized as follows. I
Section 2, we discuss the related work. The system model is
introduced in Section 3. In Section 4, we describe our sche
duling policy in detail. We provide the experimental metho
dology and evaluate the experimental results in Section 5.
Section 6 concludes the paper.
II. RELATED WORK
In single-processor systems, many power-aware schedul
ing techniques have been proposed with the focuses on vol
tage scheduling. A DVS method based on decomposing on
chip and off-chip workload is presented in [5]. In multi core
2011 3rd International Conrence on Advanced Computer Control (ICACC 2011)
systems, there are many complex power-aware scheduling
techniques with timing and perfmance constrains. In [6],
two DVS-based optimal algorithms are proposed, one for
uniprocessor and the other for multiprocessor DSP systems,
to minimize the expected total energy consumption while
satisfing the timing constraint with a guaranteed confdence
probability. In [7], MPSoC scheduling problem is solved
with the objectives of minimizing the data transfer on the bus
and guaranteeing deadlines for the average case, using ILP
(Integer Linear Programming) and constraint programming,
respectively.
As power-aware policies are not always sufcient to pre
vent temperature induced problems, thermal modeling and
management methods have been proposed. In order to reduce
peak temperature and avoid thermal emergency, a thermal
aware scheduling algorithm [8] is proposed for applications
with stochastic workloads. Paper [9] investigates how the
existing thermal management, power management and job
scheduling policies afect thermal behavior in 3D chip mod
els, and proposes a dynamic thermal-aware job scheduling
technique to reduce the fequency of hot spots, spatial gra
dients, and thermal cycles. HotSpot [10] is an accurate yet
fast and practical model based on an equivalent circuit of
thermal resistance and capacitances that correspond to mi
croarchitecture blocks and essential aspects of the thermal
package, which calculates transient temperature response
given the physical characteristics and power consumption of
units on the die. A feld-programmable gate array (FPGA)
based emulation famework [11] is presented for IC design
ers to explore a wide range of design alteratives for MPSoC
systems at cycle-accurate levels, while characterizing their
thermal behavior at a very fast speed with respect to MPSoC
architectural simulators. Michaud et al. [12] propose a new
migration method for temperature-constrained multi core
system, in which threads are exchanged whenever the simul
taneous occurrence of a cold and a hot core is detected. The
authors demonstrate that their method yields the same
throughput with heat-and-run thread migration (HTM) [13],
but requires much less migrations.
III. SYSTEM MODEL
A. Application Model
We consider a MPSoC with M units V = {Vi I i=l, 2, . . . ,
M} , including cores, caches and other special processing
units. The set of cores is expressed as C = {Ci I i=1, 2, . . . ,
N } , where N is the total number of cores. In this paper, the
units directly connecting with a unit f in the toorplan are
called f
'
S neighbor units. For example, the neighbor units of
Core 0 in Fig. l are L2 Cache 0, L2 Tag 0 and Core 2; the
neighbor units of Core 4 are Core 2, DRAM 0, L2 Tag 2 and
Core 6. The neighbor units set of core C (1 is
represented as Ai (Ai (;U), where the number of units in Ai is
represented as NAi We assume that MPSoC doesn't support
DVS.
Tasks discussed in this paper are non-preemptive. There
are no deadlines or dependence among tasks. We assume that
the MPSoC has one task arrival at most at a given time. The
task is called ready task.
99
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LZ LC6 M LZ LC6Z
HPMM
LZ gM
I-
LZ g Z
||LU|Ug6
LZ


L1U I LIO550I |HU
UUB T UUB
HPM T
LZ g T I- LZ g
JUUU
LZ LC6T LZ LC6
LO|6T LO|6 LO|6 LO|61
Figure I. .Floorplan of UltraSPARC Tl
B. Sliding Window Model
In order to record instantaneous temperatures of each
core when the last I tasks arrive, we defne a temperature
sliding window r This window is a two-dimensional storage
structure shown in Fig. 2 and is expressed as r= {Ti 11: i :L,
l:j :N} , where Ti is the instantaneous temperature of core
Cj when the i-th task arrives and L is the size of sliding win
dow. Moreover, we also defne TV = {TVi I 1: i :M} to
record the current temperature of each unit, where TU is the
current temperature of unit Vi.
In this paper, the highest temperature at which the
MPSoC chip can work normally is called threshold tempera
ture. Threshold temperature is denoted as Tthr and set at 85"C
in experiments. The chip cannot be bured immediately
when its temperature exceeds threshold temperature, howev
er, it should avoid this situation. When the instantaneous
temperature of a unit exceeds Tth" this instantaneous temper
ature is also named hot spot temperature.
Scheduling
Time1
-
L
Now
tim
e
7,1 7,2
l,1 l,2
7,1 7,2
1,1 1,2
Discrded
.
.
......
7,(N1) 7,N
......
l,(N1) l,N
......
7,(N1) 7,N
:
......
1,(N1) 1,N
-
Cores 1 N
Figure 2. . Structure of temperature sliding window
IV. DYNAMIC TEMPERATURE-AWARE TASK SCHEDULING
POLICY
In this section, we propose a dynamic temperature-aware
task scheduling policy based on sliding window model,
ProbH. This policy consists of two steps: (1) the probability
2011 3rd International Conerence on Advanced Computer Control (CC 2011)
of task allocation for each core is calculated by current and
historical temperatures of the core, (2) the core with the max
imal probability is chosen to execute the ready task. If mul
tiple cores have the same probability, the scheduler calcu
lates average current temperature of their neighbor units and
chooses the core with the minimal value.
In this paper, all scheduling decisions are based on tem
peratures measured in MPSoC chip. Modem chips typically
contain several thermal sensors, and these sensors can be
read by a continuous system telemetry infastructure for col
lecting and analyzing time series sensor data [14]. The tem
perature data are written to memory and read by the OS to be
processed on a regular basis, and then these data are passed
to the scheduler to guide scheduling.
A. Calculation of the Probabilit of Task Allocation
In temperature-aware task scheduling, the temperature of
each core is the key to schedule. Many existing temperature
aware task scheduling policies merely consider current tem
perature of each core while neglecting historical tempera
tures. In our policy, when calculating the probability of task
allocation of core Ci, the scheduler takes into consideration
both current temperature and historical temperatures of core
Ci.
In order to refect the indispensible role of threshold tem
perature T
th" the consideration of current temperature of core
Ci is divided into two parts. If Tu has reached or exceeded
T
thr
> the probability of task allocation of core Ci is dropped to
o. Otherwise, the probability of task allocation of core C is
calculated based on the ratio of Tu and threshold temperature
T
thr.
For the sake of higher accuracy, we take the effect of
temperature history into count. A temperature sliding win
dow r is used to record recent L temperatures of each core.
Existing task scheduling policies always calculate the aver
age temperature in a period of time, and then consider tem
perature history by the average temperature. In this paper,
diferent weights are allocated for historical temperatures
according to the distance fom current time. The nearer to the
current time, the bigger the weight is. To allocate weights
more reasonable and easier to control, we defne an attenua
tion function.
Attenuation Function 1: In temperature sliding window
r, the weight function of temperatures at k-th time is called
attenuation function. In this paper, attenuation function Y is
represented as
y(k)=Yk =p
k
(O<p<l,l:k:L) (1)
In Equation 1, L is current time, and p is attenuation base.
The weight of current temperature is equal to 1, i.e. Yr=1.
That is no attenuation. The weight of the oldest temperature
in sliding window is set to p
L
.
l
. As the attenuation base p is
important to weights, we evaluate the impacts of p in expe
riments (section V).
Using attenuation fnction Y, we defne temperature at
tenuation probability of core Ci.
Temperature Attenuation Probability TCPi of Core Ci:
In temperature sliding window r, the weighted average ratio
of the instantaneous temperatures of core Ci and the thre-
100
shold temperature T
thr
is called temperature attenuation
probabilit of core Ci .
Tk
i
L-Yk
TCP
=
kl
Th
r
i L
I
Yk
kl
(2)
where Yk= p
L
-
k
is the weight of the instantaneous tempera
ture of core Ci when the k-th task arrives in temperature slid
ing window r, O<Yk<Yk+t:1 and 1::.
Assuming the instantaneous temperatures of core Ci
when the last L tasks arrive are {Tli , TZi , T3i , ...... , Tn} in r,
the probability of task allocation of core Cis
p
=
{ 0 0Th"TCp>1 (3)
,
1- T T
L
i < T,h,' TCp: 1
where TCPi is temperature attenuation probability of core
Ci .
The calculation process of the probabilit of task alloca
tion is presented in Algorithm 1.
Algorithm 1 Task Allocation Probability Algorithm
Require: N, L, Tth" p, {Till:ig, 1-:N}
1: fork= 1 toLdo
2: calculate attenuation factor Yk
3:
4:
5:
6:
7:
8:
9:
10:
11:
12:
13:
14:
15:
16:
end for
L
calculate arithmetic sum Y =
I
Yk
kl
for each core Ci do
if Tu
:
T
thr
then
Pi =O
else
calculate Ti of core Ci
if Ti - 1 then
Pi =O
else
Pi = l-TCPi
end if
end if
end for
B. Choice of the Suitable Core
Afer calculation of the probability of task allocation of
each core, we choose the core with the maximal probability
to execute ready task. If multiple cores have the same proba
bility, we choose the suitable core based on the efect of
neighbor units' temperatures.
To those cores with the same probability, the scheduler
calculates the average current temperature of neighbor units
of each core. The average current temperature A of neigh
bor units of core Cj can be easily obtained by
I TU
k
AT

J
NA
J
(4)
where Aj is the neighbor units set of core Cj; NAj is the
number of neighbor units of core Cj. Then we choose the
2011 3rd International Conrence on Advanced Computer Control (ICACC 2011)
core with the minimal average current temperature to execute
ready task.
The choice process of the suitable core is presented in
Algorithm 2.
Algorithm 2 Core Choice Algorithm
Require: {Pillg} , TU, Ai , NAi
} : for i = I to N do
2:
3:
4:
5:
6:
7:
8:
9:
10:
11:
fnd the maximal probability Mix_P of Pi
count the number M of cores with Mix P
end for
if M=} then
choose the core with Mix _P to execute ready task
else
for each core Cj with Mix _P do
I TU
k
calculate AT

NA
j
end for
choose the core with the minimal AT to execute
ready task
12: end if
C Complexit Analysis of Algorithm
Algorithm 1 calculates all the probabilities of task alloca
tion of cores. It takes 0 (L) to compute temperature attenua
tion probability TCP of each core. Thus, the time complexity
of Algorithm 1 is 0 (N*L) , where N is the total number of
cores. This algorithm is a polynomial algorithm. Algorithm 2
chooses the suitable core to execute the ready task. It takes 0
(N) to fnd the maximal value of Pi and takes 0 (R*Q) to
chooses the suitable core, where R is the number of cores
with the same probability and Q is the maximal number of
neighbor units of each core. Thus, the time complexit of
Algorithm 2 is 0 (N+R*Q) . Because R and Q<, Algo
rithm 2 is also a polynomial algorithm.
V. EXPERMENTAL RESULTS
A. Experimental Methodolog
To evaluate the performance of the ProbH policy, we
used Hotspot 5.0 [15] as the thermal modeling tool and de
veloped a continuously operating dynamic scheduling simu
lator. Our simulation takes 20 minutes. The arrival time,
worst-case execution time and power of each job are known.
For characterizing the thermal package, we used the default
heat sink and spreader parameters. Steady-state temperature
values obtained through HotSpot 5.0 is used as the initial
temperature, and the sampling interval is 10 ms.
Our experiments are based on UltraSPARC Tl processor.
Fig.} demonstrates its toorplan [16].
Our policy is evaluated fom three aspects: the accumula
tive time of hot spot temperature, spatial temperature varia
tions and temporal temperature variations of the chip units.
To these three aspects, we defnite three corresponding eval
uation indexes: Hot Spot Time Ratio (HSTR), Spatial Varia-
101
tion Time Ratio (SVTR) and Temporal Variation Time Ratio
(TVTR).
Hot Spot Time Ratio is the percentage of the total time
when the highest temperature of MPSoC above Tthr Fig.3
presents the temperature variation of a chip. In Fig.3 (b),
HSTR of the chip is tTtl) + (t4-t3lt5.
Spatial Variation Time Ratio is the percentage of the total
time when the spatial temperature variation of MPSoC above
15C.
Temporal Variation Time Ratio is the percentage of the
total time when the temporal temperature variation of
MPSoC above } OC. The temporal temperature variation of
MPSoC is the maximum unit temporal temperature variation
of all units. For example, in Fig.3 (a) IT and IT2 is unit
temporal temperature variation of unit UI and unit U2 in a
time span respectively. Assuming IT < IT2 ' IT is the
temporal temperature variation of the MPSoC in this time
span.

.

O
O
c
O
|
'
E

._
" E
? o
71i----
I
I
I
I
I
I I
I I
I I
RB
(a) Temperture of unit UI and U2
I 2 3 4 Tu
(b) Maximum temperature variation
Figure 3o Temperature variation of a chip
We simulated three other scheduling algorithms to com
pare the performance of these policies, which includes (1)
Coolest, where the scheduler selects the coolest processor for
allocation; (2) Coolest-FLP, where the principle is same as
(I), but in addition the scheduler gives priorit to processors
that have "idle" neighbors; (3) AdaptRand [4], which up
dates probabilities of sending workload to cores based on an
analysis of the temperature history on the chip, and then the
core for allocating the current task is selected through gene
rating a random number. Next we present the experimental
evaluation of the scheduling techniques.
B. Experimental Results
FigA demonstrates the efect of attenuation base p on
performance of scheduling policy ProbH we proposed. With
the increasing of p, the attenuation velocity will gradually
decrease. FigA shows that either too large or too small p will
infuence the performance of ProbH. In order to get better
comprehensive performance, in our experiments we set p as
0.6.
5.

0.3 0. 0.5 0.6 0.7 0.8

Attcnuati0n b:|sc
Figure 4. Efect of attenuation base p
2011 3rd International Conference on Advanced Computer Control (ICACC 2011)
Figure 5. HSTR results
In Fig.5, we show the efciency in reducing hot spots of
the scheduling techniques. From these results we can observe
that the scheduling techniques of Coolest and Coolest-FLP
perform similarly in terms of reducing HSTR, and the per
formances of the scheduling techniques of AdaptRand and
ProbH are obviously better. This is due to the efect of ther
mal history. As the temperature of the chip cannot suddenly
change, the efect of thermal history is very important. As a
result of the consideration of the efect of historical tempera
tures of the core and neighbor units' temperatures, ProbH
can reduce the HSTR by around 30% with respect to Coolest.
Fig.6 shows thermal maps of MPSoCs (a) and (b), which
have been scheduled with Coolest and ProbH, respectively.
In thermal map (a), the cores with higher temperature are
adjacent to the cores with lower temperature directly. These
cause high spatial temperature diferences fequently. In
thermal map (b), the units' temperatures distribute more un
iformly. In comparison with Coolest, ProbH tpically
achieves a more uniform thermal
Figure 6. Thermal maps
In Fig.7, it show how each scheduling technique affects
spatial gradients. Coolest-FLP reduces SVTR dramatically in
comparison to Coolest, while they perform similarly in terms
of reducing HSTR. This is due to the effect of heat sharing.
Coolest-FLP exploits the fact that a signifcant amount of
heat transfer occurs among neighbor units, and active cores
with idle neighbors will result in lower and more evenly dis
tributed temperatures on the MPSoC. ProbH can also elimi
nate the large spatial gradients, and achieve very similar re
sults to AdaptRand, or even reduce t SVTR by around 75%
with respect to Coolest.
102
Figure 7. .SVTR results
CooIcst CooIest-FLP AuaptRanu ProbH
Figure 8. TVTR results
Fig.S shows how each scheduling technique affects tem
poral temperature fuctuations. We can observe that the
scheduling techniques of Coolest and Coolest-FLP perform
similarly in terms of reducing TVTR, and the performances
of the scheduling techniques of AdaptRand and ProbH are
better. Coolest and Coolest-FLP cannot effectively reduce
the temporal variations as AdaptRand and ProbH because
they do not consider the thermal history on each core. ProbH
can reduce TVTR by around 20% with respect to Coolest.
VI. CONCLUSIONS
We proposed a dynamic temperature-aware task schedul
ing policy based on sliding window model. This scheduling
policy calculates the probability of task allocation for each
core using current and historical temperatures. The core with
the maximal probability is chosen to execute ready task. If
multiple cores have the same probability, the scheduler gives
priorit to the core that has the minimal average temperature
of neighbor units. Experimental results show that this policy
provides 30% reduction in hot spots compared with existing
techniques. It also provides 75% and 20% reductions in spa
tial temperature variations and temporal temperature varia
tions respectively.
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