384-428-484 - Final Project Report With Addendum 1 - Lynam, Lesher, Levantino

VARIABLE FREQUENCY THREE PHASE PWM SYNCHRONOUS MOTOR CONTROLLER AND POWER SYSTEM
FRANK LYNAM ROBERT LESHER GREGORY LEVANTINO APRIL 29, 2011 ENGR 384 ENGR 428 ENGR 484
The goal of this project was to develop a sophisticated variable frequency pulse width modulation control signal to drive a power electronics system to power a three phase synchronous motor. Beyond that base premise, a current sensor to provide feedback has been implemented, impacting the field voltage generated. The entire system has an LCD screen with a keypad input and provides for smooth operation of the motor.
SUMMARY
Lynam, Lesher, Levantino
Summary ....................................................................................................................................................... 1 Table of Contents .......................................................................................................................................... 2 Table of Figures ............................................................................................................................................. 4 Software ........................................................................................................................................................ 5 PWM ......................................................................................................................................................... 5 General .................................................................................................................................................. 5 Signal Modulation ................................................................................................................................. 5 Speed Control........................................................................................................................................ 6 Speed Control Limitations ................................................................................................................. 7 Constant Peak Flux Density System .................................................................................................. 7 n-Value Transition Limitting .................................................................................................................. 8 Field Voltage Control ............................................................................................................................ 8 Field Voltage Control Limitations...................................................................................................... 8 HID ............................................................................................................................................................ 9 General .................................................................................................................................................. 9 LCD Data Output ................................................................................................................................... 9 OutputToLCD Function...................................................................................................................... 9 Speed Control System ......................................................................................................................... 10 RPM_Step........................................................................................................................................ 10 Speed Ramping Control .................................................................................................................. 10 Field Voltage Control System .............................................................................................................. 11 Current Sensing System .................................................................................................................. 11 Field Voltage Signal Communication .............................................................................................. 11 Writeout Function ............................................................................................................................... 12 Secondary Programs ............................................................................................................................... 12 PWM Base ........................................................................................................................................... 12 PWM Loop Tests ................................................................................................................................. 12 Miscellaneous ..................................................................................................................................... 12 Hardware .................................................................................................................................................... 13 Three Phase Synchronous Motor............................................................................................................ 13 Engr 384 Engr 428 Engr 484 Current Minimization .......................................................................................................................... 13 Page 2
TABLE OF CONTENTS
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Contant Voltage to Frequency Ratio................................................................................................... 13
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H-Bridge Inverter .................................................................................................................................... 14 MOSFET Selection ............................................................................................................................... 14 Gate Driver System ......................................................................................................................... 15 Component Selection.......................................................................................................................... 15 Simulation ........................................................................................................................................... 15 Construction........................................................................................................................................ 15 AC/DC Current Transducer...................................................................................................................... 16 Super Diode Precision Rectification and Filtering ............................................................................... 16 Testing ......................................................................................................................................................... 17 Initial Testing ........................................................................................................................................... 17 Gate Driver Voltage Issue.................................................................................................................... 17 Gate Driver Circuit Modification ..................................................................................................... 17 Phase Side Testing................................................................................................................................... 17 Further Issues ...................................................................................................................................... 18 Oscilloscope Grounding Issues............................................................................................................ 18 Phase Testing .......................................................................................................................................... 19 Further Oscilloscope Grounding Issues............................................................................................... 19 1 M Resistor and 60 Hz Noise....................................................................................................... 19 Output Inversion Issues .......................................................................................................................... 20 Motor Testing ......................................................................................................................................... 20
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Figure 1 - Interfacing Controllers ..................................................................................................................................... 5 Figure 2 - A PWM Signal ....................................................................................................................................................... 5 Figure 3 - Phases at 120 Separation............................................................................................................................... 6 Figure 4 - Complimentary Signals .................................................................................................................................... 6 Figure 5 - HID LCD Output ................................................................................................................................................... 9 Figure 6 - Typical V-Curve ................................................................................................................................................. 13 Figure 7 - H-Bridge Operation.......................................................................................................................................... 14 Figure 8 - EAGLE CAD PCB Traces .................................................................................................................................. 15 Figure 9 - Final PCBs ............................................................................................................................................................ 15 Figure 10 - Test System....................................................................................................................................................... 17 Figure 11 - Control and Output ........................................................................................................................................ 17 Figure 12 - Output and Compliment .............................................................................................................................. 18 Figure 13 - 60 Hz Ground Noise (Spikes) .................................................................................................................... 18 Figure 14 - Complimentary Outputs Showing Overlap .......................................................................................... 19 Figure 15 - Noisy Output (Spikes) .................................................................................................................................. 19 Figure 16 - Reading Minus Noise .................................................................................................................................... 20
TABLE OF FIGURES
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Note: All images of output waveforms included in this document are in error. This issue is discussed in the output inversion issues section at the end of the document.
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FIGURE 1 - INTERFACING CONTROLLERS
A PWM signal is comprised of pulses at high values and pulses at low values. The periodicity of this cycle of high and low values is called the carrier frequency. This carrier frequency can be modulated or unmodulated. An unmodulated PWM signal is effectively a buck chopper, where simply altering a static k value will provide a controllable DC output.
PWM is a method for generating an arbitrary output signal by creating unit blocks of on-state and off-state voltages in particular proportions. These on and off states can be coupled with additional information to allow multilevel PWM output, generating either a negative or positive value for an onstate signal as desired. This is called a three-level PWM system. In this project, we only developed a two-level PWM system, wherein an on-state output signal generated a positive pulse at Vs while an off-state output FIGURE 2 - A PWM SIGNAL signal generated a negative pulse at -Vs. The specifics of the hardware implementation are covered in detail in the Hardware section.
In this portion of this document, we will discuss the general theory behind pulse width modulation (PWM) signal generation and the particular method of implementation of the software which made this solution possible. Specific details will include all portions of the code involved. Additionally, the human interface device (HID) control code will be addressed and discussed in detail.
SOFTWARE
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PWM
GENERAL
The concept of this implementation is to provide a controllable modulation signal by varying the k value for each pulse output. By varying the k along a sine function, the carrier signal is modulated at a frequency much lower than itself to generate a sine wave output. As long as the modulation signal remains at a much lower frequency than the carrier signal, an inductive load can maintain continuity of current through the output pulses and turn that series of pulses into a meaningful waveform. As seen in figure 2 above, the carrier frequency of high and low pulses is much higher than the modulation frequency which determines the duty cycle of those pulses. The portion with wider tops represents the positive half cycle of the modulation signal, while the portion with wider bottoms represents the negative half cycle of the modulation signal. The code for this project (attached) used a pre-generated lookup table of values approximating a sine wave. These values were stored in the PWM_Base array which is defined by two aspects: A and T. A is the peak-peak amplitude of the waveform stored, and T is to the total number of entries stored in it. To ease communication issues discussed later, T and A were selected based on bitdepth. The T in the final implementation was 10 bits for a total of 1024 entries, with an A of 9 bits, for a Engr 384 Engr 428 Engr 484 Page 5
SIGNAL MODULATION
peak to peak amplitude of 512. The generation of the PWM_Base array and its associated variables will be discussed later on.
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As the control system will also be providing a buck signal for the field voltage (Vf) control, the code has been designed to output a fourth phase (or ph + 1 for ph < 3) at the same time it generates the three main line phases. This fourth phase does not progress through the PWM_Base reference array, but remains static as defined by an input signal from the HID controller. This will be discussed in more depth in the section on the Vf control communication system.
FIGURE 3 - PHASES AT 120 SEPARATION
The voltage at any time for each output phase is defined by a position in that reference table. By initially offsetting the three output phase reference values at 120 separation in the reference table, a three phase output can be generated. Arguably, an arbitrary number of phases can be generated simple by offsetting each subsequent phase after the first by (Phase Number 1) * T / (Phases). The code was written with this concept in mind, but due to hardware limitations, it is not presently feasible to output more than 3 phases.
Pulse generation is realized by looping no-op loops for a specified number of iterations and then turning on or off the appropriate pin outs. To accomplish this, the signals are first iterated one step (or more, as discussed in the speed control system section below), then sorted. The program uses a keyed selection sort with a time-filler operation for non-swap steps in the selection sort to maintain a constant time delay due to the sorting operation. This eliminates the need for a determinate delay for pulse synchronization and allows the system to operate at a maximum possible carrier frequency. After the phases are sorted, the program pauses with the no-op loop until the first phase needs to be swapped, then uses the sorted keys to swap the appropriate pins as per the pin-out reference array V_Pin. This cycle progresses through each of the phases in the sequence that they need to be switched in accordance with their reference value. A reference value of A will switch at the end of the cycle, while a reference value of 0 will switch at the beginning. The cycle loops until the value A is reached. This creates one pulse of the appropriate size for each phase.
FIGURE 4 - COMPLIMENTARY SIGNALS *SEE TABLE OF FIGURES NOTE
As this system uses non-determinate looping, only two options are readily available to realize speed control for frequencies higher than the maximum resolution frequency. Either the amplitude resolution must be reduced, or the periodic resolution must be reduced. Ideally, an equal reduction Engr 384 Engr 428 Engr 484 Page 6
Since the hardware selected is an H-bridge inverter, a complimentary signal must also be provided for the complimentary MOSFET pair. To prevent switch-time delay shorting of the power supply through both pairs of MOSFETs, the switching is ordered so that the compliment which needs to turn off always goes first. The shortest gap between these switching operations is that which occurs during the pulse generation loop. Fortunately, the natural operational delay of the TOGGLE function provides sufficient spacing between the transitions to prevent shorting the supply. This time is approximately 15 s.
SPEED CONTROL
Managing the output frequency in this manner also allows the simple production of an opposite phase sequence, corresponding to an opposite direction of rotation, by adding a negative value. This signal is realized through the use of a parity bit in the HID speed control signal. SPEED CONTROL LIMITATIONS
Periodic resolution reduction is realized through alteration of the PWM reference step each operating phase takes at the beginning of each pulse. Simply by increasing that step by one unit, the output frequency can be controlled. Going from a step of 1 to 2 reduces periodic resolution by half. Another step provides one third the original output resolution, providing three times the original frequency. Thus, a linear frequency control is realized through the inverse reduction in periodic resolution (f = 1 / T).
in both should provide evenly scalable resolution control, minimizing resolution loss. In practice, though, the loss of amplitude resolution (or variance in k over a cycle) is much more significantly pronounced on the output than loss of periodic resolution. For that reason, this system solely relies on periodic resolution reduction.
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A secondary effect of periodic resolution reduction is the generation of a low frequency floating neutral signal. If the periodic resolution were shrunk and appropriately concatenated for each speed control signal, an uneven portion would have to be removed from the end of the reference table as 1024 is not divisible by all numbers from 1 to 63. The removal of this portion would generate significant high frequency harmonic distortion even on a well filtered output, and would damage the quality of the fundamental output signal. To prevent this, the modulus operator was used to prevent exceeding the bitdepth of the periodic resolution in the time step code, with effectively similar code used for the negative speed values. The drawback of this solution is the generation of a very low frequency modulation on top of the primary modulation signal, due to uneven shifting of initial positions in the PWM_Base reference array. The drawback to this issue is the generation of a low frequency float signal in the effective neutral of the motor, which could cause efficiency losses. CONSTANT PEAK FLUX DENSITY SYSTEM
As discussed above, there are limitations to periodic resolution constriction. Primarily, when the speed control signal is high, the periodic bitdepth is low. For the purposes of this project, we arbitrarily determined that a minimum acceptable bitdepth would be 4 bits, or 16 pulses per cycle (8 pulses per half-cycle). To realize that bitdepth at our maximum speed, the speed control signal could only be T 4 bits, or 6 bits. This gives a maximum control signal of 64. Since the lowest value is used for a zero-frequency output, in practice we do not reach our minimum periodic resolution as the maximum speed value is only 63 (this output is shown in figure 2).
An ideal solution eliminating both of these concerns would be the use of multiple reference tables, or a reference table of sufficient resolution to preclude these concerns.
To prevent exceeding the rated peak flux density of the motor, a constant V/f system was implemented maintaining an output maximum pulse width proportional to speed. For present operation, maximum frequency output is ~30 Hz, allowing a maximum source voltage of ~60 V. The motor characteristics defining this limitation are discussed below. Engr 384 Engr 428 Engr 484 Page 7
The constant V/f system is realized by constricting the PWM transitions to a small portion of the carrier pulse, proportional to the speed control input signal. For a speed control input signal half of the maximum value, the maximum pulse width is half of the carrier signal pulse width. To account for resistive stator losses, a constant additional pulse width is added as well.
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A major concern with transistor switching is input capacitance and switching times. If the carrier signal is switching too rapidly for the components in the system, either due to their inherent input/output capacitances or due to their switching times, the PWM signal can be completely lost. To prevent this, a multiplier was included in the code for the carrier frequency. Testing showed that a maximum speed operation with a multiplier of 1 provided an ~1.5 kHz carrier frequency. An increase to 2 reduced that to ~1 kHz, but with no appreciable reduction in capacitive switching noise. This functionality is no longer in use for the PWM generation as the carrier frequency appears too low for this to be a reasonable concern. To provide for V curve current limiting control, as discussed in more detail below, a single phase of current is sampled and the field voltage is controlled to provide a minimum seeking control system. This signal is encoded by the HID controller and fed to the PWM controller. This system will be discussed in more detail later. Effectively, the HID controller provides a position in the PWM_Base reference array corresponding to the value that the current minimizing control system desires to be output to the field voltage.
N-VALUE TRANSITION LIMITTING
FIELD VOLTAGE CONTROL
The field voltage is then treated simply as another phase, and sorted and switched at the appropriate intervals. Its position is not iterated through the PWM_Base array, though. Managing the Vf signal in this manner is not only convenient, it is a necessity. As all 8 output signals (a, a, b, b, c, c, Vf, Vf) are generated concurrently, they must all be generated in a uniform manner. Transitioning Vf in the same loop as the three phases is the only way to allow this using linear, single-threaded system operation without interrupts. FIELD VOLTAGE CONTROL LIMITATIONS
As there are 10 bits of positions in the PWM_Base reference array, the Vf signal is boosted by the Vf_Scale multiplier to allow for use of the entire breadth of the array without using an excessive number of pins. The Vf control signal is a 7 bit signal, which means that the Vf_Scale factor must be 3 bits, or the value 8. As mentioned above, the generation of the PWM_Base array and associated variables will be explained in the discussion of the PWM Base program below.
A limitation to this method of field voltage control illustrates a limitation to the entire nondeterministic pulse generation methodology. When the field voltage control signal is the lowest signal, it switches first. When it is the second lowest, it switches second. When switching second, it not only must wait out the relatively deterministic no-op delay, but it also must wait out the switch transition delay of approximately 30 uS, and the main PWM cycling management delay. This means that while the three main line phases transition above and below the Vf signals position, the delay for the Vf signal becomes inconsistent, causing a very slight variation in k value generation from the Engr 384 Engr 428 Engr 484 Page 8
Vf output. This variation is well within the error of the simplistic Vf output control system, and is not presently deemed a meaningful limitation to system operation. The human interface device (HID) not only provides human control of the system, but also provides a delayed response speed ramping system and a minimum-seeking current sensing field voltage control system. As part of the HID necessities of this system, it interfaces with an LCD screen and, through the LCD serial interface, with a keypad. It also provides a sophisticated output listing current speed, target speed, new speed input, and the field voltage control signal.
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HID
An operational goal for this system was providing an intelligent speed control for a synchronous motor. To that end, some manner of input device would be required to indicate desired speed, and some manner of output would be required to indicate current status. Although a simple potentiometer for speed control and a simple binary LED output for status could have been used, we felt that the LCD system could provide much more usable information not only for operational use, but also for debugging. The LCD display output was, in fact, of vital use for debugging. Data output to the LCD screen is accomplished using a series of strings stored in memory and the OutputToLCD function we created. The strings stored in memory are only written to the LCD screen on initialization, and the cursor movement functionality is used to continually rewrite the values to the right of each string. To quickly describe the output as seen in figure 5, it is segregated into four lines, each with a variable and its value. First is Target RPM, then Current RPM, then New RPM, and lastly Vf Signal. All of these start at 0. The New RPM line is where keypad input is displayed. The operation of and software interaction with the keypad will not be discussed in detail. Upon pressing the # key on the keypad, whatever value that is in New RPM is shifted to Target RPM, and Current RPM slowly seeks to that based off of a speed control delay system discussed later. A key press is accompanied by a 225 ms pause while the ready indicator, LED 46, dims. The keypad input system allows only 3 digits of input, beyond 3 it loops the newer key presses and cycles out the older. The * key provides a negative sign. The Vf Signal system reads an analog input from a current sensor system and continually changes the Vf Signal value to attempt to minimize that signal. This will be discussed in further detail below. OUTPUTTOLCD FUNCTION
GENERAL
FIGURE 5 - HID LCD OUTPUT
LCD DATA OUTPUT
The OutputToLCD function provides an ASCII output string to the LCD based on a floating point value passed to the function. If that value is less than one, it is preceded by a negative sign. Only three digit values may be passed to this function. In the interest of simplicity, no error checking for this is done in this portion of the code. Engr 384 Engr 428 Engr 484 Page 9
ASCII output is realized by reading the value passed modulus ten and adding 48. The value is then divided by ten and the process is repeated until zero is reached, placing the next value into the next string location each time. These numbers are then reversed. If the value passed is negative, a note is made at the beginning of the function and the value is changed to be positive. Then, after the array has been generated and resorted, the values are all shifted a unit to the right and a negative sign, character 45, is placed in the first location. The passed variable is set as a floating point due to an earlier plan to incorporate the fractional ASCII characters to display fractional values in the output. This was deemed unnecessary due to the high unit step of the speed control system.
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As an important note for this interface system, the manner in which the input values are converted actually shifts the values appropriately to find the closest target speed discrete step quantity. If this were not done, it would always round down, causing unfortunate user interface issues where an input of 502 RPM provides a target RPM of 490 because the next discrete step value was 502.1 RPM. The present system has an excellent feel to its input response and we are extremely satisfied with it. RPM_STEP
The speed control system interface is effectively an inherent deception. In reality, the speed control variables are consecutive integer quantities, seen on the LED output on the microcontroller board. When passed to the OutputToLCD function, they are multiplied by the macro RPM_Step, which is the pre-calculated RPM step for each unit step in the speed control signal, as discussed below. This is all accomplished transparently to the user, allowing an easy and accessible interface.
SPEED CONTROL SYSTEM
0.432 Hz is 0.432 turns on the rotor per pole per phase per second. Converting that to full rotations per minute produces a unit step of approximately 12.95 RPM per unit step in the speed control signal. This value was used for the RPM_Step macro. SPEED RAMPING CONTROL
The RPM_Step macro was calculated from empirical data. The output waveforms were observed at several frequencies, and an approximation of the change in frequency for each unit step in the speed control signal was determined. We found that a single step in the speed control signal resulted in an increase of 0.432 Hz.
Additionally, this operation is performed only once every 12-19 cycles, dependent on current speed. As speed increases, the rate of change of speed increases. Our hope was to provide a more gradual transition at lower speeds, while allowing a more rapid control at higher speeds. In practice, our speed control transition time is already extremely generous and slow and completely unnecessary. It was still an interesting problem to solve, even though it never really existed. Engr 384 Engr 428 Engr 484 Page 10
The output frequency changes are not instantaneous. As we are attempting to control a synchronous motor, it would be foolish to immediately produce the requested output frequency. Instead, we have implemented a system wherein the current speed is only changed by one discrete unit at a time, seeking the target speed value.
The function of the field voltage control system is to search possible field voltage values which minimize the operating current draw of the machine. To understand the how this control methodology accomplishes its purpose, it is first important to discuss briefly the underlying interaction it is operating with. The magnitude of the generated voltage in a synchronous motor is proportional to the field voltage. The current draw becomes a vector difference between this generated voltage and the applied voltage. At some value of generated voltage, current is at unity with the applied voltage. An increase or decrease in generated voltage will pull the current off unity. As the real component of the current remains constant, any non-unity operation will result in a higher magnitude of current. Therefore, for some value of field voltage, current must be a minimum. For any other value, current must be higher.
The speed control seeking system does not provide a check against the maximum speed values. The initial assignment of the target speed from the RPM input system provides that check instead.
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FIELD VOLTAGE CONTROL SYSTEM
This control system is thus designed as minimum seeking. It is a continually changing control system, which means that it is constantly changing to try to find the minimum current draw. If the current reading is higher than the previous reading, it starts moving in the other direction. This allows it to continually seek out the most efficient current point. The current sensing system uses an analog input pin to read the value from a hall-effect sensor. This hardware, and the issues associated with its implementation, will be addressed in more detail later on. The microcontroller only allows certain pins to function as analog inputs. For a single pin analog reading, pin 19 must be used. This system has a rated accuracy within 0.05 V, and no compensation is done within the control code to correct for errors below that threshold. FIELD VOLTAGE SIGNAL COMMUNICATION CURRENT SENSING SYSTEM
The rate of change of the field voltage signal is the same as that of the speed signal. As this is very low, additional issues resulting from high rate of change of flux should not arise.
Since there is an overall 2 bit resolution loss, there are a significant number of gaps in the Vf signal. Additionally, the PWM Base program generates a non-linear reference array for the Vf_Ref system. The cause of this will be discussed in detail in the PWM Base section, but the problem which arises is that the unit step for the PWM system toward the middle of the Vf scale is significantly more than 2 bits. Engr 384 Engr 428 Engr 484 Page 11
The field voltage control signal is encoded by the Vf_Ref reference array. This array is generated by the PWM Base program to point to specific points within the PWM_Base array in the PWM controller corresponding to the desired Vf control signal. By simply seeking linearly through this array, the Vf system can output a complexly encoded signal which is readily interpreted by the PWM controller to correspond to a value scaled to A. Thus, with only a 7 digit signal, 10 digits are referenced and 9 digits are output.
The Writeout function simple performs a BYTEOUT task for an arbitrary number of bits. As both control signals use different numbers of bits, this function is very useful. It writes the bits by starting with a power of two that would fill the highest order bit and working down, subtracting the powers of two that are less than the passed value and outputting one for those bits. This system thus has a graceful failure mode, as values greater than the provided bit depth will provide the maximum output value rather than just the truncated lower bits. For the creation of these two systems, various test programs and secondary support programs were created. These will be discussed mostly in brief, with some length dedicated to the PWM Base program.
WRITEOUT FUNCTION
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SECONDARY PROGRAMS PWM BASE
It then sorts the values from the PWM_Base array with a simple keyed selection sort much like that in the pulse loop, and parses through them at T/V to generate the Vf_Ref encoding signal (reduced by the appropriate bitdepth) from the sorted key values. Appended to this are the Vf_Max and Speed_Max values for use in limit checking in the HID controller.
The PWM Base program provides the data for each controller to perform their necessary tasks. It takes inputs for the bitdepth of A, T, S and Vf and provides a PWM_Base array using the math.h c header. It then outputs the A and T values for use in the PWM controller, as well as the Vf_Scale factor which allows the Vf control signal to reference values throughout the PWM_Base array.
These two sets of data are segregated appropriately as c code and written to a text file. From there, they can be readily copied directly into the microcontroller code as required, providing exactly the data needed in exactly the format necessary.
The PWM Loop Tests program tests types of PWM loops to determine cycle speed. Since it operates on a desktop computer rather than a microcontroller, it handles a much larger pulse loop. Nevertheless, it provides a reasonable estimate of the relative speed on various methods of PWM signal generation. This program was used to select the keyed-sort method discussed above. In addition to the listed programs, three other test programs were used. Test HID Comms was a microcontroller program which provided a simple, controllable output on several pins. Shift Left Test was a test bed for the use of the shift left operator in complex situations, an operator which is much faster than division and saves time on the PWM generation system. Writeout Test was a program to test for off by one errors in the Writeout function in the absence of a microcontroller. Engr 384 Engr 428 Engr 484 Page 12
PWM LOOP TESTS
MISCELLANEOUS
The microcontroller output was used to power three H-bridge inverters. Each inverter requires a positive signal and a complimentary negative signal. The details, requirements and use of these signals will be discussed further below. The H-bridge inverters are each realized with four MOSFETs, each with a gate driver chip and circuit. The circuits were designed on EAGLE and etched specifically for this project. The intended three phase load was a synchronous motor. The stated purpose of this system is to drive a three phase synchronous motor. The motors available in the lab are rated for 120 V at 60 Hz, with a maximum current of 1.8 A at that voltage.
HARDWARE
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The theory of operation of a synchronous motor is that the stator generates a rotating magnetic field, which the static magnetic field on the rotor locks onto and follows. If started at 60 Hz, the rotating magnetic field is much too fast for the rotor to lock onto, thus the need for either an external starter or a variable frequency start. This system will provide both the three phase AC needed for the stator to generate a rotating magnetic field, and the DC necessary for the creation of the rotor flux.
THREE PHASE SYNCHRONOUS MOTOR
One of the major interactions in a synchronous motor is that of the rotor flux and the stator flux. The rotation of the rotor generates a counter electromotive force in the stator which opposes the terminal voltage at a phase angle. While the imaginary component of this force remains constant for a given set of operating conditions, the real component can be controlled by changing the magnitude of the rotor flux.
CURRENT MINIMIZATION
This is the central theory behind the concept of field voltage current minimization. When the real component of the generated voltage is equal to that of the terminal voltage, the input current draw is purely that required for the inductive load. As the generated voltage increases or decreases, the difference in voltage between it and terminal voltage develops an increased imaginary component to stator current, shifting along the V-curve as in figure 6. Thus it is possible to seek a minimum stator FIGURE 6 - TYPICAL V-CURVE current draw by continually changing the field voltage. Another issue for the proper operation of a three phase synchronous motor is avoiding flux saturation in the motor. If voltage is raised and frequency remains constant, more flux will be generated during each cycle. Once the flux generation reaches the saturation point of the magnetic material in the motor, the excess is purely lost in hysteresis. By maintaining a constant voltage to frequency ratio, this loss can be avoided. Of course, due to resistive losses in the system, a constant ratio is actually non-ideal and a small offset is increasingly necessary at lower frequencies. Engr 384 Engr 428 Engr 484 Page 13
CONTANT VOLTAGE TO FREQUENCY RATIO
This constant voltage to frequency ratio is achieved in this system by utilizing smaller portions of the carrier duty cycle for lower speed control values, as discussed in the constant peak flux density system discussion above. The rated voltage to frequency ratio is 120 V at 60 Hz, or 2 V / Hz. The system implemented provides a 100% pulse width at 30 Hz, and 50% (with small offset) at 15 Hz. This suggests a maximum operating load voltage of 60 V to prevent exceeding the rated voltage to frequency ratio of the machine. For testing purposes, this system was bypassed to provide a more readily visible output at lower frequencies. The selected method of converting the DC source power into an AC output was an Hbridge inverter. The purpose of an H-bridge inverter is to provide alternating paths for current flow across a load. A single switch in series with a source and a load can alternate power to that load, but cannot provide current flow in the opposite direction. A second switch connected from the same side of the source to the other end of the load would simply short the source to ground. To prevent that, another pair of switches must be placed on the ground side and switch synchronously with the FIGURE 7 - H-BRIDGE OPERATION source side pairs, as in figure 7.
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H-BRIDGE INVERTER
Thus, the mode of operation for an H-bridge inverter is to place two pairs of switches in parallel with a source, and then connect a load across their middle. The source side switch on one pair coupled with the ground side switch in the other provides one direction of current flow. Turn those off and turn on their compliment to provide the opposite direction of current flow. This is the reason the PWM system is designed to provide these two control signals in this manner. Its important here to note that the first pair should be turned off before turning on the second. Should both pairs be on at once, the system will have two lines shorting the source to ground, and the load will receive no power. The PWM control system provides an acceptable delay for this transition as discussed in the signal modulation section. This system allows a peak to peak AC voltage of double the DC input voltage for the system by using bidirectional current flow. A system with one switch turning on and off to produce a sine wave can only provide a peak to peak AC voltage equal to the input DC voltage. Additionally, this system provides a true AC output centered around the same ground as the DC input, alleviating some floating neutral issues, but not all, as discussed in the speed control limitations section.
The MOSFET selected for use in this project is a Fairchild Semiconductor FDB14N30, a 300 V rated N-channel MOSFET. The relatively high voltage rating allows for a hefty safety factor for voltage spikes due to reversing an inductive load. Unfortunately, it has a maximum gate charge of 25 nC and a minimum switching time of 20 ns, which is an instantaneous current of 1.25 A. This would well exceed the 10 mA peak current rating of our PIC-based microcontroller, potentially damaging it. Engr 384 Engr 428 Engr 484 Page 14
MOSFET SELECTION
The solution to this gate current spike problem is to provide an intermediate switching circuit. This will introduce a propagation delay, but it is hoped that good circuit selection can eliminate any signal distortion beyond a minimum phase shift. For this system, the Fairchild Semiconductor FAN73711 gate driver was selected. The FAN73711 datasheet offers a suggested single-leg design for both a sustain drive system and a regenerative drive system. As regenerative drive is beyond the scope of this project, we chose to implement the suggested sustain drive system with only minor alterations.
GATE DRIVER SYSTEM
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The suggested schematic lacked specific details as to component specifications, ratings and values. We discerned the circuits theory of operation and selected components based on our estimate of what values would make the circuit function. We chose a low resistance value for the power supply to the top of the leg, and 11 k for the remainder of the circuit. A typical 1N914 was selected for the power system, and 100 pF capacitors were chosen.
COMPONENT SELECTION
We were unable to find a Multisim model for the Fairchild components, but we did run simulations on a similar H-bridge system to test various values of reactive loading to discern the effects of various PWM carrier frequencies. Our results were discussed in detail in our initial project proposal, but ultimately we found that a higher PWM carrier frequency would require a lower reactance in the load to maintain continuity of current. This result met with our expectations from the simulation.
SIMULATION
properly discarded.
The remaining traces were scrubbed clean of the protective transfer medium and holes were drilled for component insertion. The boards were then hand-soldered, and poorly transferred traces were rerouted by hand. The process had an overall success rate of approximately 80%, and out of two boards created, only two circuits were deemed completely unserviceable. The total time spent solely on soldering together these boards was estimated to be over 13 hours. Engr 384 Engr 428 Engr 484
FIGURE 8 - EAGLE CAD PCB TRACES
The circuit was refined and drawn in EAGLE CAD, which was used to lay it out on a one-layer PCB design. After panelizing six legs onto a single board, the PCB design was printed and ironed on to a simple copper-faced PCB using a transfer medium. The excess copper was dissolved in ferric chloride, which was
CONSTRUCTION
FIGURE 9 - FINAL PCBS
Page 15
For the field voltage control system feedback, we selected an AC/DC current transducer rated for 0400 Hz, 20 A with a +/- 5 V output fed by a 24 V source. The intention was to select a transducer which would provide an RMS value output and feed that DC signal directly into an ADC pin on the microcontroller for use in the field voltage control system discussed above.
AC/DC CURRENT TRANSDUCER
April 29, 2011
Unfortunately, the transducer ordered provided a real time signal rather than an RMS signal, giving us a sine wave output. As our ADC sampling rate, as discussed above, is limited to our speed increment rate, it would be impossible to sample the transducer output at a high enough resolution to calculate true RMS, or even a running average. Several methods were attempted to solve this issue, but only one will be discussed here. Our best solution was to use a super diode precision rectifier to turn the AC signals into DC (or a negative DC current into a positive signal). Unfortunately, the expected maximum amperage of 2 A (a 40 V intended supply across ~20 ) would only provide a 0.5 V output on the transducer. This output is well below the cutoff voltage for the diode in the precision rectifier circuit. Assuming that this circuit had worked, we would have used a small parallel capacitor to filter the output, as the ADC input is of high impedance. Its important to also note that the precision rectifier does drop some portion of the signal, producing a linear distortion. Since the system is minimum seeking, this error would have been irrelevant for the proper operation of the feedback system.
SUPER DIODE PRECISION RECTIFICATION AND FILTERING
For this reason, we hoped to amplify the input to the precision rectifier through a simple inverting amplifier using a 741 op amp (the same op amp used in the successfully built and tested precision rectifier). After extensive testing, we were unable to get the 741 inverting amplifier to work at the low voltages available on the microcontroller board.
Page 16
FIGURE 10 - TEST SYSTEM
Once one leg was complete, we ran various tests to determine proper operation. It was at this time that we decided to reduce the power source resistance on the top gate driver from 10 k to 100 . After several rather frustrating hours of testing and replacement of faulty gate drivers, we were able to observe what we felt to be satisfactory circuit operation. This prompted the construction of further legs.
After assembly was completed, the units went through several steps of testing to verify proper operation of the circuit prior to assembly of the remaining circuits, proper operation of each completed circuit prior to interaction testing and proper interaction between the phases. At each phase of testing, various issues were encountered and resolved as discussed below.
TESTING
April 29, 2011
INITIAL TESTING
An issue encountered at this phase of testing was that an output voltage was observed even when no power supply was connected to the output. This voltage was coming through the gate driver circuit, as the gate drivers required their own 15 V control power. This power should have been prevented from reaching the inverted output, but possibly due to poor selection of components in the driver circuit we were observing that voltage on the output. After a frustrating fight with this issue, we opted to continue testing using 15 V both for the gate driver control and for the output power supply. It was recommended to us by an industry expert to modify the gate driver circuit by removing the series diode and resistor on the gate control power supply and the capacitor on the upper portion of the gate driver leg. This correction did not eliminate the issue. Conceptually, the diode there could prevent a higher voltage on the MOSFET output from damaging the gate control source, but the many other paths to the source in the gate circuit make that unlikely. Our relatively limited understanding of this control circuit unfortunately precludes us from eliminating this issue in the time available. We also attempted to operate the circuit with a 100 resistor as the series resistance against the gate, but had no success in getting the system to operate at all with that resistor. GATE DRIVER CIRCUIT MODIFICATION
GATE DRIVER VOLTAGE ISSUE
FIGURE 11 - CONTROL AND OUTPUT
Once two legs were complete with the same components, we ran another test to verify a single phase of system operation integrated with the microcontroller. The switching circuit and the MOSFETs were both connected to a single 15 V power source. Engr 384 Engr 428 Engr 484 Page 17
PHASE SIDE TESTING
Initial observations were poisoned by the 60 Hz ground connection inside the oscilloscope, but once the power source was properly grounded we were able to observe switching operations on the MOSFETs, controlled by the microcontroller through the gate driver. Both the a phase and the a phase were independently observed to provide the expected output, but were not connected across each other. After these observations were made, the remaining phases were soldered together and all appropriate interconnections were made.
April 29, 2011
FIGURE 12 - OUTPUT AND COMPLIMENT *SEE TABLE OF FIGURES NOTE
Once all the individual legs were completed, unit testing revealed that the b leg was only providing a constant 15 V output. As all other phases were operating properly, it was expected to be a control signal line issue, a soldering joint issue or a bad component issue. After carefully testing the control signal connectivity and finding it satisfactory, all solder joints in the b phase were redone. Of particular note both for the b phase and for the system in general, the power inputs and the output signal lines were extremely difficult to solder. The MOSFETs themselves proved to be extremely effective heat sinks, and our need to melt the solder into place was fighting against our fear of damaging the sensitive MOSFETs. Fortunately, our MOSFETs were less sensitive than we thought, and although we went through four different soldering irons before we found one with sufficient wattage to connect the input power line to the b phase MOSFET, the system did ultimately work once the soldering was redone. As an aside, it was extremely satisfying after several hours of failing to solder to that MOSFET to have all the solder on it suddenly start bubbling up and wetting properly when we put that heavy duty soldering gun on it. In the EE lab, there is only one DC power supply in the lab which is capable of grounding to the oscilloscope without interfering with the power supplys control system and developing an incorrect output voltage. In later testing, this power source was no longer available. An attempted solution to bypass this material deficiency was using an uncontrolled rectifier with a heavy capacitive filter, but this was unable to provide a reasonably consistent DC signal, likely due to the rapid generation of transformer losses in the uncontrolled rectifier power supply.
FURTHER ISSUES
OSCILLOSCOPE GROUNDING ISSUES
Another solution attempted was use of the controlled DC power supply in the motor control lab panel. This power supply was unable to produce a voltage low enough to power the gate driver circuit. For these reasons, we were prompted to attempt various creative solutions to eliminate this obstacle. These solutions will be discussed further below. Engr 384 Engr 428 Engr 484 Page 18
FIGURE 13 - 60 HZ GROUND NOISE (SPIKES)
This oscilloscope grounding issue became only the first of several major problems for the phase voltage testing portion. As the oscilloscope ground provided a direct connection to the DC source ground (although the DC source was not, in fact, grounded), connecting the oscilloscope across a phase resulted in a short on the power supply, providing our second major hurdle: the inability to directly read a full phase output.
PHASE TESTING
April 29, 2011
FIGURE 14 - COMPLIMENTARY OUTPUTS SHOWING OVERLAP
If the oscilloscope is not grounded to the same ground as the DC power supply, then the oscilloscope will have a significant, noisy 60 Hz poison signal, as shown in figure 13. This issue has often come up with projects, and until now we had been unable to come up with a better solution than just connecting the DC source to ground. Since the only source able to do that was unavailable, and no other types of supplies were able to produce as good an output as the DC sources, we were forced to find an alternative solution. The first method we attempted to read the output was to pass it through an RL filter from the motor control lab panel. This did not, in fact, eliminate the many obstacles to observing the out. It was easy and quick to hook up, though, and allowed us to eliminate that as a reasonable solution. The next method we attempted was to connect a transformer across the output. This solution was met with limited success, as the only output visible on the secondary of the transformer was a noise set of pulses corresponding to the amplified PWM control output. Although this fixed the oscilloscope grounding issue, the transformer did not provide a useful or meaningful output for us. 1 M RESISTOR AND 60 HZ NOISE
FURTHER OSCILLOSCOPE GROUNDING ISSUES
The third issue was that upon inspection, we discovered that the carefully developed PWM control signal which prevented shorting the legs, as discussed in both the H-bridge inverter and signal modulation sections above, was not working properly. There were significant and clear overlaps between the control signals on each side of all three phases, which would short the power supply to ground for approximately 10% of each duty cycle. This was not reflected on the ammeter output of the DC power supply, but the error was clear.
Our final solution was to simply add a resistance to ground. Since the oscilloscope we were using had a 1 M input impedance, we connected a 1 M resistor between the ground connection from the oscilloscope to the a phase and connected the positive side of the oscilloscope input to the a phase. This gave us the expected AC PWM output at 7.5 V peak, which is reasonable as the oscilloscope is now reading half of an even voltage divider. Engr 384 Engr 428 Engr 484
Unfortunately, although the output was correct, we were still observing a 60 Hz noise poisoning the displayed output. The eliminate this, we connected a second probe between the true ground and the DC supply negative terminal, which was serving as our circuit ground. This signal provided us
FIGURE 15 - NOISY OUTPUT (SPIKES)
Page 19
directly with the ground poisoning signal in the DC supply, the difference between the system ground and true ground.
April 29, 2011
FIGURE 16 - READING MINUS NOISE
The cause of this problem was not immediately obvious. We had taken every precaution in the generation of the control function to ensure this would not be an issue, and yet here it was. We assumed at first sight it was simply due to switching time delays in the MOSFETs or their driver circuits and discarded it as unsolvable. This was not the case. In reality, the cause of the problem was that the output signal generated by the MOSFET is opposite that of the PWM control signal, as the gate driver turns the MOSFET off when it receives a TTL 5 V on signal, and turns the MOSFET on when it receives a TTL 0 V off signal (the real transition points were observed as 3 V on and 2 V off). This is a simple software fix and will be implemented before the final presentation, but its very important to note as both an interesting issue which cropped up and due to its relevance regarding the oscilloscope outputs contained herein. All the images here reflect the erroneous, uncorrected outputs.
One of the major observations made after testing was complete today was the reason for the third problem discussed in the phase testing section. As discussed above and seen in figure 14, the output signals, instead of having necessary safety regions, overlapped. This caused a short to ground in every leg for the portion of the PWM cycle in which the two respective control signals overlap.
OUTPUT INVERSION ISSUES
By using the oscilloscope subtraction function, we were able to display the true phase voltage and observe an extremely noisy output. Fortunately, the only noise which remained was the PWM carrier signal, and not the 60 Hz outlet poison. The RL filter was again tested, but did not provide any output, likely due to either impedance matching issues with the oscilloscope or problems with the inductors. Weve used those filters in past labs and have had very limited success.
Each of us tested the rotor resistance in both directions by hand, but there was no consensus on whether either direction provided a meaningful difference in counter-torque or not. Ultimately, this portion of the experiment was inconclusive due to the power source limitations described in the gate driver voltage issue section. Engr 384 Engr 428 Engr 484 Page 20
As the stated purpose of this project is to drive a three phase motor, we felt it would be unreasonable not to attempt to do so. We connected the outputs to the appropriate connections on an induction motor in the lab, but did not observe movement. With the constant voltage to frequency ratio system disabled, the rated voltage to frequency ratio would theoretically be developed at 5 Hz (120 Vrms:60 Hz::10 Vrms:5 Hz), which corresponds to an output of 155 RPM. Even at this setting, we were unable to observe motion in the rotor.
MOTOR TESTING
M:\Computer_Control_Systems\Projects\Project 8\Report Code.c
Wednesday, April 20, 2011 4:11 AM
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// --- PWM Controller Code --// Older Versions Not Included
/***************************************************************************** * * Main PWM signal generator. * ***************************************************************************** * File Name: main.c * Processor: CS110000 * * Author Date Comment *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * OC Lynam, Frank 11 Apr 2011 PWM Driver, Test Version 7 * *****************************************************************************/ #include "CS110000.h"
// I wrote the whole program so that the ph constant defines the number of phases, just for fun. #define ph 3 // This is taken from the PWM_Base program // First Issue: This program is incomplete, f when complete? // Resolution: Improved Pulse function? We'll see // Second issue: Can't reliably encode Vf in PWM_Base with this low of resolution... maybe rework that system? // Resolution: Have PWM_Base do different outputs for each program, // using resolution of Vf as Vf control resolution // Using 18 and 19 for A and T provided ~ 60 Hz at old, 100% speed system // With new, < 15% speed pulse code, this is a new combined resolution of > 6x original resolution // Using A^2 + T^2 = Max Resolution, with New Max Resolution = 6 * Old Max Resolution // A and T can go up by a factor of 6 ^ (1/2), which is ~ 2.5 // This makes a new low-end resolution for the generation of 60 Hz have A = T = ~44 // For a 0.1 Hz PWM_Base, we would need 600 times the number of entries of the 44 unit resolution // This is valid for T * 600 or A * 600, using A * 600 ^ (1/2) and T * 600 ^ (1/2) // Note: 600 ^ (1/2) = 10 * 6 ^ (1/2) = ~25 // This allows A = 1100, T = 1100, thus using 10 bit: A = 1024, T = 1024 // Note: 10 bit is best for A, since that's used as an input for Vf, and a power of 2 would // maximize the utility of the parrallel interface there. This can allow T to scale up to 1192. // ((686*6*600-1024^2)^(1/2)) // --- Using delta j in Pulse function for speed control: // For Speed = 1 making .1 Hz, Speed = 600 will make 60 Hz. This allows for 10 bit speed control, or
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// design for less than 60 Hz and use 9 bit speed control. Or, design A and T for 9 bit // speed control to make 60 Hz. For reference, a calculation to find T will be listed based on // desired number of bits for A: // T = (686*6*600-2^(Number of bits for A * 2))^(1/2) // New note: T bit resolution must be > Speed control bit resolution. Preferably, much greater // Maybe reduce A to make T more? Play with it later. // Can't use bitdepth of speed control to find T, 600 speed control signal will produce 60 Hz (or so). // // // // // // // Let's assume that we need at least 2^n PWM signals per cycle at 60 Hz (Note: this n is not the n in the code below) That means 2^T = 2^S * 2^n = 2^(S + n) That leaves A = (686*6*600 - 2^(2*(S + n)))^(1/2) S = 6, n = 3, 2Â = 1485 S = 7, n = 3, 2Â = 1192 S = 6, n = 4, 2Â = 1192
// So, using S = 6, n = 4, T = 10, A = 10 should work. // Only 1 Hz resolution is possible. Incorporated delay should be adjusted for that. // --- Using delta V[i] in main loop for speed control: // Need an n value of at least 4, like above // Stepping faster through T instead of A, math should be the same // Try S = 6, n = 4, T = 10, A = 10 // Should provide better solution by reducing harmonics due to skewed A resolution at higher frequencies // Drawback: PWM pulse frequency remains constant as output freq goes up, instead of increasing // Ideal could be mixture of both? Maybe just do both and drop speed input bit depth by 1? // Try that later // // // // Note on speed and 60 Hz: S has to be 9 to make 60 Hz, 6 bit speed will only reach 7 or 8 Hz = 192 RPM. If S = 9, n = 4, T = 13, then 2Â = 8000i, which is not possible The highest possible bit depth for T is ln(686*6*600)/(2*ln(2)) = 10.6
// Right now, this code produces almost exactly 1 Hz with Speed = 4 // That's a resolution of 0.25 Hz, with a range of +/-15.75 Hz // --- Begin PWM_Base insertion for PWM controller --ROM int PWM_Base[] = {257, 259, 260, 262, 263, 265, 266, 268, 270, 271, 273, 274, 276, 277, 279, 281, 282, 284, 285, 287, 288, 290, 292, 293, 295, 296, 298, 299, 301, 302, 304 , 305, 307, 309, 310, 312, 313, 315, 316, 318, 319, 321, 322, 324, 325, 327, 328, 330, 331, 333, 334, 336, 337, 339, 340, 342, 343, 345, 346, 348, 349, 351, 352, 353, 355, 356 , 358, 359, 361, 362, 364, 365, 366, 368, 369, 371, 372, 373, 375, 376, 378, 379, 380, 382, 383, 384, 386, 387, 388, 390, 391, 392, 394, 395, 396, 398, 399, 400, 402, 403,
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91
92
93
94
95
96
97
98
99
100 101 102
404, 405, 407, 408, 409, 411, 412, 413, 414, 415, 417, 418, 419, 420, 422, 423, 424, 425 , 426, 427, 429, 430, 431, 432, 433, 434, 435, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462 , 463, 464, 465, 466, 467, 467, 468, 469, 470, 471, 472, 473, 473, 474, 475, 476, 477, 477, 478, 479, 480, 481, 481, 482, 483, 483, 484, 485, 486, 486, 487, 488, 488, 489, 490 , 490, 491, 491, 492, 493, 493, 494, 494, 495, 495, 496, 497, 497, 498, 498, 499, 499, 500, 500, 500, 501, 501, 502, 502, 503, 503, 503, 504, 504, 505 , 505, 505, 506, 506, 506, 507, 507, 507, 507, 508, 508, 508, 508, 509, 509, 509, 509, 510, 510, 510, 510, 510, 510, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511 , 511, 511, 512, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 510, 510, 510, 510, 510, 510, 509, 509, 509, 509, 508, 508, 508, 508, 507, 507, 507, 507 , 506, 506, 506, 505, 505, 505, 504, 504, 503, 503, 503, 502, 502, 501, 501, 500, 500, 500, 499, 499, 498, 498, 497, 497, 496, 495, 495, 494, 494, 493 , 493, 492, 491, 491, 490, 490, 489, 488, 488, 487, 486, 486, 485, 484, 483, 483, 482, 481, 481, 480, 479, 478, 477, 477, 476, 475, 474, 473, 473, 472, 471, 470, 469, 468, 467 , 467, 466, 465, 464, 463, 462, 461, 460, 459, 458, 457, 456, 455, 454, 453, 452, 451, 450, 449, 448, 447, 446, 445, 444, 443, 442, 441, 440, 439, 438, 437, 435, 434, 433, 432 , 431, 430, 429, 427, 426, 425, 424, 423, 422, 420, 419, 418, 417, 415, 414, 413, 412, 411, 409, 408, 407, 405, 404, 403, 402, 400, 399, 398, 396, 395 , 394, 392, 391, 390, 388, 387, 386, 384, 383, 382, 380, 379, 378, 376, 375, 373, 372, 371, 369, 368, 366, 365, 364, 362, 361, 359, 358, 356, 355, 353, 352, 351, 349, 348, 346 , 345, 343, 342, 340, 339, 337, 336, 334, 333, 331, 330, 328, 327, 325, 324, 322, 321, 319, 318, 316, 315, 313, 312, 310, 309, 307, 305, 304, 302, 301, 299, 298, 296, 295, 293 , 292, 290, 288, 287, 285, 284, 282, 281, 279, 277, 276, 274, 273, 271, 270, 268, 266, 265, 263, 262, 260, 259, 257, 256, 254, 252, 251, 249, 248, 246 , 245, 243, 241, 240, 238, 237, 235, 234, 232, 230, 229, 227, 226, 224, 223, 221, 219, 218, 216, 215, 213, 212, 210, 209, 207, 206, 204, 202, 201, 199, 198, 196, 195, 193, 192 , 190, 189, 187, 186, 184, 183, 181, 180, 178, 177, 175, 174, 172, 171, 169, 168, 166, 165, 163, 162, 160, 159, 158, 156, 155, 153, 152, 150, 149, 147, 146, 145, 143, 142, 140 , 139, 138, 136, 135, 133, 132, 131, 129, 128, 127, 125, 124, 123, 121, 120, 119, 117, 116, 115, 113, 112, 111, 109, 108, 107, 106, 104, 103, 102, 100 , 99, 98, 97, 96, 94, 93, 92, 91, 89, 88, 87, 86, 85, 84, 82, 81, 80, 79, 78, 77, 76, 74 , 73, 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52 , 51, 50, 49, 48, 47, 46, 45, 44, 44, 43, 42, 41, 40, 39, 38, 38, 37, 36, 35, 34, 34, 33 , 32, 31, 30, 30, 29, 28, 28, 27, 26, 25, 25, 24, 23, 23, 22, 21, 21, 20, 20, 19, 18, 18, 17, 17, 16, 16, 15, 14, 14, 13, 13, 12, 12, 11, 11, 11, 10, 10, 9, 9, 8, 8, 8, 7, 7, 6, 6, 6, 5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1 , 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 16, 17, 17, 18, 18, 19, 20, 20, 21, 21, 22, 23, 23, 24, 25, 25, 26, 27, 28, 28, 29, 30, 30, 31, 32, 33, 34, 34, 35, 36, 37, 38, 38, 39, 40, 41, 42, 43, 44, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 84, 85, 86, 87, 88, 89, 91, 92, 93, 94, 96, 97, 98, 99, 100, 102, 103, 104, 106, 107, 108, 109, 111, 112, 113, 115, 116, 117, 119, 120, 121, 123, 124, 125, 127, 128 , 129, 131, 132, 133, 135, 136, 138, 139, 140, 142, 143, 145, 146, 147, 149, 150, 152, 153, 155, 156, 158, 159, 160, 162, 163, 165, 166, 168, 169, 171, 172, 174, 175, 177, 178 , 180, 181, 183, 184, 186, 187, 189, 190, 192, 193, 195, 196, 198, 199, 201, 202, 204, 206, 207, 209, 210, 212, 213, 215, 216, 218, 219, 221, 223, 224, 226, 227, 229, 230, 232, 234, 235, 237, 238, 240, 241, 243, 245, 246 , 248, 249, 251, 252, 254, 256}; int A = 512, T = 1024, Vf_Scale = 8;
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// --- End PWM_Base insertion for PWM controller --// I declare these here so they don't end up being recreated everytime the Pulse function is called, save some cycles int j, k, Ret; // This is the extra looping since the sorted pwm is too fast for the ttl capacitance... 1 is 30 Hz with Speed = 64 // Approximations: 3 is 500 Hz carrier frequency, 2 is 1 kHz, 1 is 1.5 kHz int n = 2; int i; int Speed_Shift; // V is the position of each phase with respect to the PWM_Base array, int since it's bigger than 256 entires int V[ph + 1], Speed, PWM_Base_Ref[ph + 2], PWM_Base_Ref_2[ph + 4], PWM_Key[ph + 2], Direction; // The length of this needs to be 2 * (ph + 1), since I'm using the additonal phase for a Vf k signal // These were changed to the on-board LEDs for testing char V_Pin[] = {39, 40, 41, 45, 42, 43, 44, 46}; void Pulse(); void main(void) { // This creates the offsets for the phases... fortunately, as long as it's even bits, it's divisible by 3... // I have a truly marvelous demonstration of this proposition which this comment is too small to contain. for(i = 0; i < ph; i++) V[i] = (int)(i * T / ph); // STPIND(46, HIGH);
// This is the main control loop, which just pulses at max speed and increments the voltages across the base array for(;;) { // This variable is now used to jump faster in the main pulse generator... // Note: A <<3 is a fast way to multiply by 8, which makes 64 into 512, but is it needed? // Can use negative speed to realize reverse motion... does modulus work that way? - No! // Pins that work: // 8 - Y | 9 - Y | 10 - Y | 11 - Y | 12 - Y | 13 - Y | 14 - Y | 15 - Y | 16 - Y | 17 - Y | 18 - Y | 19 - Y | 20 - Y | 21 - Y | 22 - Y // 30 - Y | 31 - Y | 32 - Y | 33 - Y | 34 - Y/N? | 35 - Y/N? | 36 - Y //Speed = (GTPIND(30)<<2) + (GTPIND(31)<<1) + (GTPIND(32)); //Speed = ((GTPIND(30)<<5) + (GTPIND(31)<<4) + (GTPIND(32)<<3) + (GTPIND(33)<<2) + (GTPIND(34)<<1) + GTPIND(35)) * ((GTPIND(36)<<1) - 1);
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//for ( i = 0; i < 7; i++ ) // STPIND(39 + i, GTPIND(30 + i)); Speed = ((GTPIND(30) * 32) + (GTPIND(31) * 16) + (GTPIND(32) * 8) + (GTPIND(33) * 4) + (GTPIND(34) * 2) + GTPIND(35)) * ((GTPIND(36) * 2) - 1); // The Vf signal will be encoded by the HID cstamp, reducing the error in this PWM loop // It effectively has to be an inverse sine function, or if I want to be lazy I could have it sit between the two peaks V[ph] = ((GTPIND(8) * 64) + (GTPIND(9) * 32) + (GTPIND(10) * 16) + (GTPIND(11) * 8) + (GTPIND(12) * 4) + (GTPIND(13) * 2) + GTPIND(14)) * Vf_Scale; // Any delays resultant from operations in the control loop will simply provide a DC offset to the output, // assuming those delays are determinate, which at the time of writing this comment they are. Pulse(); } // Idea for speed control: Change the jumps in the pulse loop. Bigger jumps = fractionally higher speeds // With this, I can key the PWM_Base frequency at something like 0-1 Hz, and it would be something like // variable resolution speed control. Higher A and T bitdepth will allow even lower speed resolutions. // Another idea for speed control: Change the change in V[i] instead of changing delta j in the PWM loop. // This should allow a maximum output frequency of ~15 Hz without significantly sacrificing output resolution // in any one dimension. } void Pulse() { // Put this in here to allow multiple uses of pulse function in main loop to reduce impact of data input for(i = 0; i < ph; i++) { V[i] = (V[i] + Speed) % T; if ( V[i] < 0 ) V[i] += T; } // Might should go "High -> Low" then "Low -> High" for each swap so that the transistors are all off for // some miniscule period of time to prevent shorting the source... Or vice versa depending on the gate // controller, which seems to be active high but might not be. for(k = 0; k <= ph; k++) { PWM_Base_Ref[k] = PWM_Base[V[k]]; PWM_Key[k] = k;
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} /* Solution 1: * // Puts them in the starting position, k + ph + 1 is the opposing voltage signal, ph is the Vf signal for(k = 0; k <= ph; k++) { STPIND(V_Pin[k], LOW); STPIND(V_Pin[k + ph + 1], HIGH); } for ( j = 0; j < A; j+=1 ) for ( k = 0; k <= ph; k++ ) { STPIND(V_Pin[k], PWM_Base_Ref[k] >= j); STPIND(V_Pin[k + ph + 1], PWM_Base_Ref[k] < j); } for(k = 0; k <= ph; k++) { STPIND(V_Pin[k], LOW); } /**/ /* Solution 2: O-Scope testing suggests this is at least 10x faster than Solution 1 */ // The delay form this sort is insignificant on a desktop computer, but it may be significant on a cstamp... // It may offset the control loop delays and create a voltage gain offset instead of a DC offset, // or in addition to the DC offset. // This appears to have a significant impact on the control delay for large A... darn! for ( k = 0; k <= ph; k++ ) for ( j = k; j <= ph; j++ ) if ( PWM_Base_Ref[j] < PWM_Base_Ref[k] ) { i = PWM_Base_Ref[j]; PWM_Base_Ref[j] = PWM_Base_Ref[k]; PWM_Base_Ref[k] = i; // Using keys to remember which phase is which later i = PWM_Key[j]; PWM_Key[j] = PWM_Key[k]; PWM_Key[k] = i; } else { // This makes the sorting loop a determinate control delay i = PWM_Key[j]; PWM_Key[j] = PWM_Key[k];
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PWM_Key[k] = i; i = PWM_Key[j]; PWM_Key[j] = PWM_Key[k]; PWM_Key[k] = i; } // This formats the values to make the loop below smoother, and provides them with a constant V/F shift // Speed_Shift = (64 - (64 - (abs(Speed))) * 2 / 3); for ( i = 0; i <= ph; i++ ) PWM_Base_Ref_2[i + 1] = PWM_Base_Ref[i];// * Speed_Shift)>>6); PWM_Base_Ref_2[0] = 0; PWM_Base_Ref_2[ph + 2] = A;//((A * Speed_Shift)>>6); PWM_Base_Ref_2[ph + 3] = A; // This must be paired with a Speed-- down below //Speed++; // Puts them in the starting position, k + ph + 1 is the opposing voltage signal, ph is the Vf signal for(k = 0; k <= ph; k++) { STPIND(V_Pin[k], LOW); STPIND(V_Pin[k + ph + 1], HIGH); } // This goes until each spot it needs to stop and swap something... pretty straight forward stuff for ( k = 0; k <= ph; k++ ) { for(j = PWM_Base_Ref_2[k]; j < PWM_Base_Ref_2[k + 1]; j+=1); // Swaps the phase associated with this PWM_Base_Ref keyed original position TOGGLE(V_Pin[PWM_Key[k] + ph + 1]); //for(j = 0; j < 10; j++) // This is to protect the transistors from switching time shorts // This is a problem. Since the Vf signal is static and the others are time variant, Vf ends up with a nondeterminate delay // When Vf is lowest, it only waits for that for loop, but when it isn't, it waits for the for loop for effectively the same // number of cycles, but then it also has to wait for these cycles. If I remove the switch delay, maybe it'll be // less noticeable, and maybe the transistors will magically not explode. Ug. TOGGLE(V_Pin[PWM_Key[k]]); } for(j = PWM_Base_Ref_2[ph + 1]; j < PWM_Base_Ref_2[ph + 2]; j+=1); // Placing this here actuallizes the constant V/F for(k = 0; k <= ph; k++) { STPIND(V_Pin[k], LOW); STPIND(V_Pin[k + ph + 1], LOW);
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} //for(j = PWM_Base_Ref_2[ph + 2]; j < PWM_Base_Ref_2[ph + 3]; j+=1);
// This must be paired with a Speed++ up above //Speed--; /**/ }
// --- HID Controller Code ---
/***************************************************************************** * * Main entry into the application. * ***************************************************************************** * FileName: main.c * Dependencies: * Processor: CS110000 * Company: A-WIT Technologies Incorporated * * * * This is a main program Template * * * * Author Date Comment *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * Lesher, Robert 6 Apr 2011 LCD/HID Driver * *****************************************************************************/ #include "CS110000.h"
#define RPM_Step 12.95 // --- Begin PWM_Base insertion for HID controller --ROM int Vf_Ref[] = {94, 95, 96, 97, 93, 98, 99, 99, 100, 91, 101, 90, 89, 102, 103, 88, 104, 104, 105, 105, 85, 106, 107, 107, 108, 108, 109, 109, 110, 110, 111, 111, 112, 112, 113, 113, 114, 114, 115, 115, 116, 116, 117, 117, 118, 118, 119, 119, 120, 120, 121, 121, 122, 122, 123, 123, 124, 124, 125, 125, 126, 126, 127, 127, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18 , 18, 19, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 35, 29 , 30, 29, 30, 31, 32};
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int Vf_Max = 127, Speed_Max = 63; // --- End PWM_Base insertion for HID controller --void Writeout(int Output, char Pin, char Bits); void OutputToLCD(float i); void main(void) { /*Planned program diagram: Starting Check: -Turn on, check display (can comment out for real use) -Print out words on LCD -Initialize variables and speeds Repeat Loop: -Use ANALOGIN to receive signal from motor or SERIN from C Stamp 1 -Convert signal to current speed (ignore if signal from SERIN) -Print status and input on LCD Display -Get ready for input -Print input on screen if one shows up, continue on with loop -Upon send command (#), set input speed as new speed, then continue loop -Perform speed operations based on */ BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE k[12][2] = {"0","1","2","3","4","5","6","7","8","9","*","#"}; status1[] = "Target RPM:"; status1_L = 12; //Length of status 1 status2[] = "Current RPM:"; status2_L = 13; //Length of status 2 status3[] = "New RPM:"; status3_L = 9; //Length of string 3 status4[] = "Vf Signal:"; status4_L = 11; //Length of string 4 //Input from keypad //Setting buffer length (Do we need that fifth spot //Target speed. Refreshed when we get a //Current speed. Shows user the //
int key; int length = 5; for the null?) int tar_speed = 0; new input int cur_speed = 0; transition from old speed to new int new_speed = 0; int vf_signal = 0; int i = 0, j, l;
float Ia, Last_Ia; int Vf_Delta = 1, Vf_Position = Vf_Max / 3;
// //
int buffer; int RPM_Output, RPM_Input = 0;

-9-
//For receiving the input from the keypad
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// //
float Ia, Last_Ia; int Vf_Position = S / 2, Vf_Delta = 1;
//Clear screen LCDCMD_CS410000(11,0,0,0,0,0,0,0,0); right for some reason LCDCMD_CS410000(15,0,0,0,0,0,0,0,0); LCDCMD_CS410000(4,0,0,0,0,0,0,0,0); //Displays word set on the 1st, 2nd and 3rd LCDCMD_CS410000(1,0,0,0,0,0,0,0,0); LCDOUT_CS410000(status1,status1_L); LCDCMD_CS410000(2,21,0,0,0,0,0,0,0); LCDOUT_CS410000(status2,status2_L); LCDCMD_CS410000(2,41,0,0,0,0,0,0,0); LCDOUT_CS410000(status3,status3_L); LCDCMD_CS410000(2,61,0,0,0,0,0,0,0); LCDOUT_CS410000(status4,status4_L); while(TRUE) { //Beginning of infinite loop
//Clear screen - This doesn't always work //Turns backlight on //Turns off cursor lines //Sets cursor to home position //Prints out status message 1 //Sets cursor to 2nd line //Prints out status message 2 //Sets cursor to 3rd line //Prints out status message 2 //Sets cursor to 3rd line //Prints out status message 2
//These lines refresh speed values for each new loop (may actually have to clear the screen) //We might have to convert speeds to strings to display properly LCDCMD_CS410000(2,16,0,0,0,0,0,0,0); //Sets cursor to 1st line OutputToLCD(tar_speed * RPM_Step); LCDCMD_CS410000(2,36,0,0,0,0,0,0,0); OutputToLCD(cur_speed * RPM_Step); LCDCMD_CS410000(2,56,0,0,0,0,0,0,0); OutputToLCD(new_speed); LCDCMD_CS410000(2,76,0,0,0,0,0,0,0); OutputToLCD(Vf_Position); //Sets cursor to 2nd line
//Sets cursor to 3rd line
//Sets cursor to 3rd line
//Make 12(impossible) the ignore character, 11("#") the input character, and 10(*) the character to make the speed negative key=12; //Reset key STPIND(46, HIGH); //Lets us know it's ready for input key=LCDIN_CS410000(); //Get key ready for input //Use next line for debugging (?) // DEBUG("%d\r\n",key); //Inputting a number will increase new_speed if(key<10) { STPIND(46,LOW); //Lets user know input is being taken if ( new_speed < 0 ) new_speed=(new_speed*10-key)%1000; else
-10-
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new_speed=(new_speed*10+key)%1000; while ((key=LCDIN_CS410000())<10) PAUSE(225); //Prevent bounce STPIND(46,HIGH); //Lets user know it's ready for input } //The '#' key sets the input speed as the target speed, then clears the buffer and new speed if(key==11) { STPIND(46,LOW); //Lets user know input is being taken tar_speed = ((int)(abs(new_speed) + RPM_Step / 2) / RPM_Step) * (abs( new_speed) / new_speed); //Sets the input speed as target speed if ( tar_speed > Speed_Max ) tar_speed = Speed_Max; if ( tar_speed < -Speed_Max ) tar_speed = -Speed_Max; i = 1; new_speed = 0; //Resets input value LCDCMD_CS410000(2,56,0,0,0,0,0,0,0); //Resets cursor for input PAUSE(225); //Prevent bounce STPIND(46,HIGH); //Lets user know it's ready for input } //The '*' key resets the user input if(key==10) { STPIND(46,LOW); //Lets user know an operation is occurring new_speed = -1 * new_speed; PAUSE(225); //Prevent bounce STPIND(46,HIGH); //Lets user know it's ready for input } }
// Maybe use % (100 - cur_speed) to have gradient speed ramping? Maybe something even more sophisticated? i = (i + 1) % 19 - (Speed / 8); if ( i == 0 ) { // Provides some output STPIND(46,LOW);
// -- Gradual speed change code -if ( cur_speed > tar_speed ) cur_speed--; else if ( cur_speed < tar_speed ) cur_speed++;
// -- Minimum Ia seeking code --
// Continually seeks Ia by changing // This will read a voltage between 0 and 5 V into the float Ia with a
-11-
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accuracy of +/- 0.05 V. Ia = ANALOGIN(19, 1, 0, 0, 0); // This will obviously provide counter-corrective indications for dynamic loading, but the goal // isn't to provide an ideal PID loop, just to demonstrate digital control capability. /* Vf Control Normal Mode */ // Only change Vf_Delta if Ia is increasing if ( Ia > Last_Ia ) Vf_Delta = -1 * Vf_Delta; Last_Ia = Ia; /* */ /* Vf Control Test Mode * if ( Ia > 3 ) Vf_Delta = 1; else if ( Ia < 1 ) Vf_Delta = -1; else Vf_Delta = 0; /* */ // Limit testing if ( Vf_Position >= Vf_Max ) Vf_Delta = -1; if ( Vf_Position < 1 ) Vf_Delta = 1; // Only change Vf_Position if Ia is changing significantly Vf_Position += Vf_Delta; STPIND(46, HIGH); } Writeout(Vf_Ref[Vf_Position], 8, 7); Writeout(abs(cur_speed), 39, 6); if ( cur_speed == 0 ) STPIND(45, LOW); else STPIND(45, cur_speed/abs(cur_speed) + 1); }; }
// -- Writeout code -// Has graceful failure mode, where values > the max possible with the input bitdepth are output as all 1s
-12-
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// This is good, because the Vf_Ref generation often ends with 2^Vf_Bits which is too big for Vf_Bits bits void Writeout(int Output, char Pin, char Bits) { // This might do the same as the possible faster BYTEOUT function, but this way actually works consistently // Also, cycle speed is much less important for the HID loop int Ret = 0, k = 1, i; for ( i = 1; i < Bits; i++ ) k *= 2; for(i = Bits; i >= 0; i--) { STPIND(Pin + Bits - i, Output >= k); Output -= k * (Output >= k); k /= 2; } } /* //Everything found below is for when I've gotten the code down pat, and want to make it look good. For now, I'll leave them out } void key_input(int key) { LCDOUT_CS410000(k[key],1); //Print out numbers on LCD buffer[i]=LCDIN_CS410000(void) //send keypad input to buffer i++; } void reset { //Clear screen LCDCMD_CS410000(11,0,0,0,0,0,0,0,0); LCDCMD_CS410000(15,0,0,0,0,0,0,0,0); //Displays word set on the 1st, 2nd and 3rd LCDCMD_CS410000(1,0,0,0,0,0,0,0,0); LCDOUT_CS410000(status1,status1_L); LCDCMD_CS410000(2,21,0,0,0,0,0,0,0); LCDOUT_CS410000(status2,status2_L); LCDCMD_CS410000(2,41,0,0,0,0,0,0,0); LCDOUT_CS410000(status3,status3_L); }*/
//Clear screen //Turns backlight on lines //Sets cursor to home position //Prints out status message 1 //Sets cursor to 2nd line //Prints out status message 2 //Sets cursor to 3rd line //Prints out status message 2
void OutputToLCD(float Input) { char array[5] = {32, 32, 32, 32, 0}; int j = 0, k = 0, Sign = 1, i = Input;
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if ( i < 0 ) { Sign = -1; i *= -1; } while ( i > 0 ) { array[j]= i % 10 + 48; j++; i /= 10; } if ( j == 0 ) { j = 1; array[0] = 48; } for ( i = j - 1; i >= j / 2; i--) { k = array[i]; array[i] = array[j - i - 1]; array[j - i - 1] = k; } if ( Sign == -1 ) { for ( i = 0; i < 3; i++ ) array[3 - i] = array[3 - i - 1]; array[0] = 45; } LCDOUT_CS410000(array, 5); } //Do we need to make it a BYTE, and not an int?
// --- PWM Base ---
#include <stdio.h> #include <math.h> int main() { int PWM_Base[65535], PWM_Base_Key[65535]; int i, j, A, T, S, Vf; printf("PWM_Base generator.\n\n"); printf("A represents pk-pk bits of amplitude of signal, T is the period.\n"); printf("S is the speed control bits. Vf is the field control bits.\n"); printf("For better Vf communication efficiency, a power of 2 is ideal for S and A.\n"); printf("A should be divisible by 2. This program will still work if it's not.\n"); printf("T is functionally limited to 20. Speed control resolution has a maximum of A.\n"); printf("A: ");
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scanf("%i", &A); printf("T: "); scanf("%i", &T); printf("S: "); scanf("%i", &S); printf("Vf: "); scanf("%i", &Vf); A = pow(2, A - 1); T = pow(2, T); S = pow(2, S); Vf = pow(2, Vf); // // // // // Old Comment: pow(2, (bitsA - 1)) - 1, T = pow(2, bitsT) - 1; // Doing the amplitude and length in terms of bits lets me change one number and know it'll fit in whatever bit length I want. I have separate variables in case I don't want them to be the same at some point
FILE *fp; fp = fopen("PWM_Base.txt", "w"); // I store the sinewave in here so I can copy it to the microcontroller code // by hand easily. fprintf(fp, "PWM_Base insertion code for HID and PWM controllers.\n\n"); fprintf(fp, "// --- Begin PWM_Base insertion for PWM controller ---\n\n"); fprintf(fp, "ROM int PWM_Base[] = {"); for(i = 1; i < T; i++) { PWM_Base[i] = (int)(A*sin(2*M_PI*i/T) + A); PWM_Base_Key[i] = i; fprintf(fp, "%i, ", PWM_Base[i]); // This places the wave if(i==100*(i/100)) fprintf(fp, "\n"); // This eliminates a maximum line-length issue in the microcontroller IDE } PWM_Base[0] = A; fprintf(fp, "%i};\n\n", A); // Using "i < T" allows me to use this to close the line nicely // in the middle of the bit resolution taking up the entire band, 1 to 2 ^ bits - 1 fprintf(fp, "int A = %i, T = %i, Vf_Scale = %i;\n\n", A * 2, T, T / Vf); // So I don't have to remember... fprintf(fp, "// --- End PWM_Base insertion for PWM controller ---\n\n\n"); fprintf(fp, "// --- Begin PWM_Base insertion for HID controller ---\n\n"); fprintf(fp, "ROM int Vf_Ref[] = {"); for ( i = 0; i < T; i++ )
-15-
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for ( j = i; j < T; j++ ) if ( PWM_Base[i] > PWM_Base[j] ) { A = PWM_Base[i]; PWM_Base[i] = PWM_Base[j]; PWM_Base[j] = A; A = PWM_Base_Key[i]; PWM_Base_Key[i] = PWM_Base_Key[j]; PWM_Base_Key[j] = A; } fprintf(fp, "%i", PWM_Base_Key[0] / (T/Vf)); for ( i = T/Vf; i < T; i += T/Vf ) { fprintf(fp, ", %i", PWM_Base_Key[i] / (T/Vf)); if(i==(100*T/Vf)*(i/(100*T/Vf))) fprintf(fp, "\n"); } fprintf(fp, "};\n\n"); fprintf(fp, "int Vf_Max = %i, Speed_Max = %i;\n\n", Vf - 1, S - 1); fprintf(fp, "// --- End PWM_Base insertion for HID controller ---\n"); fclose(fp); printf("File written.\n\n"); system("PAUSE"); return 0; }
// --- PWM Loop Tests ---
#include <stdio.h> #include <stdlib.h> #include <windows.h> int main(int argc, char *argv[]) { unsigned int StartTime, EndTime, i, j, k, ph = 3, A = 10000000, PWM_Base_Ref[4], Ref_Duration, PWM_Key[4], PWM_Base_Ref_2[5]; double Dbl; printf("PWM System Tester\n\n"); printf("Approximates C Stamp operation based on nothing really empirical.\n"); printf("Sucessful test solution is < 100%% and has same output sequence.\n"); printf("Goal is < 10%%\n\nDetermining optimal delay setting - ");
-16-
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StartTime = GetTickCount(); for(j = 0; j < A; j++) for(k = 0; k <= ph; k++) if ( PWM_Base_Ref[k] == j ) for ( i = 0; i < 10; i++ ); EndTime = GetTickCount(); Dbl Dbl Dbl A = = A; /= (EndTime - StartTime); *= 5000; Dbl;
printf("Completed\nUsing %i cycles\n\n", A); srand(time(NULL)); for ( k = 0; k <= ph; k++ ) { Dbl = (double)rand(); Dbl /= RAND_MAX; Dbl *= A; PWM_Base_Ref[k] = Dbl; PWM_Key[k] = k; } printf("Start Existing System - "); StartTime = GetTickCount(); for(j = 0; j < A; j++) for(k = 0; k <= ph; k++) if ( PWM_Base_Ref[k] == j ) printf("%i ", k); EndTime = GetTickCount(); Ref_Duration = EndTime - StartTime; printf(" - Completed\n"); printf("mS: %i - %3i%%\n\n", EndTime - StartTime, 100 * (EndTime - StartTime) / Ref_Duration); printf("Start Test System 1 - "); StartTime = GetTickCount(); for ( k = 0; k <= ph; k++ ) for ( j = k; j <= ph; j++ ) if ( PWM_Base_Ref[j] < PWM_Base_Ref[k] ) { i = PWM_Base_Ref[j]; PWM_Base_Ref[j] = PWM_Base_Ref[k];
-17-
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PWM_Base_Ref[k] = i; i = PWM_Key[j]; PWM_Key[j] = PWM_Key[k]; PWM_Key[k] = i; } PWM_Base_Ref_2[0] = 0; for ( i = 0; i <= ph; i++ ) PWM_Base_Ref_2[i + 1] = PWM_Base_Ref[i]; PWM_Base_Ref_2[++i] = A; for ( k = 0; k < i; k++ ) { for(j = PWM_Base_Ref_2[k]; j < PWM_Base_Ref_2[k + 1]; j++); if ( k <= ph ) printf("%i ", PWM_Key[k]); } EndTime = GetTickCount(); printf(" - Completed\n"); printf("mS: %i - %3i%%\n\n", EndTime - StartTime, 100 * (EndTime - StartTime) / Ref_Duration); system("PAUSE"); return 0; }
// --- Shift Left Test ---
#include <stdio.h> #include <stdlib.h> int main() { char a = 1, i; for(i = 0; i < 6; i++) { printf("%i - ", a); a=a++<<1; } printf("%i\n\n", a); printf("%i =/= %i\n\n", (1<<4)+(1<<2), 1<<4+1<<2); printf("%i - %i\n\n", a==a, a+1==a); system("PAUSE"); return 0; }
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// --- HID Communications Test ---
#include
"CS110000.h"
void main(void) { // TYPE YOUR CODE HERE AFTER THIS LINE if ( GTPIND(38) ) { STPIND(36, HIGH); STPIND(33, HIGH); } else { STPIND(36, LOW); STPIND(33, LOW); } }
// --- Writeout Test ---
#include <stdio.h> #include <stdlib.h> int main(int argc, char *argv[]) { int Bits = 6, Output = 10; int Ret = 0, k = 1, i; for ( i = 0; i < Bits; i++ ) k *= 2; for(i = Bits; i >= 0; i--) { printf("Bit #%2i: %i - Output: %5i - k: %i\n", i, (Output >= k), Output, k); Output -= k * (Output >= k); k /= 2; } system("PAUSE"); return 0; }
-19-
VARIABLE FREQUENCY THREE PHASE PWM SYNCHRONOUS MOTOR CONTROLLER AND POWER SYSTEM
FRANK LYNAM ROBERT LESHER GREGORY LEVANTINO APRIL 28, 2011 ENGR 384 ENGR 428 ENGR 484
Communication between the two boards was accomplished via a passive parallel signal to eliminate wasteful serial communication which would drastically disrupt the cycling rate of the PWM generation microcontroller. Just by connecting pins from one controller directly to the other, communication can be achieved using simple STPIND and GTPIND. By outputting the binary value of a control signal on one controller, it can be directly and asynchronously read by the other. This additionally allowed for a more deterministic loop on the PWN controller. The field voltage control signal was read in on the PWM controller using a series of GTPIND commands for the appropriate pins and multiplied by the appropriate powers of 2. This signal was read across pins 8 through 14. The speed control and direction signal were input into the PWM controller across pins 30 through 26.
The particular pins on which the PWM output control signals were generated were pins 39 through 46. Pins 39 through 41 were the three primary phase signals, with 42 through 44 as their complements. Pins 45 and 46 were the VF control signal and its complement. How these PWM control signals were generated is discussed in great detail in the signal modulation section of the main document. The gate driving circuit was connected directly to these pins as appropriate.
ADDENDUM 1 COMMUNICATIONS SYSTEMS
The field voltage control signal was output from the HID controller using the Writeout function described in the main document on pins 8 through 14. The PWM speed control signal was similarly output from the HID controller on pins 39 through 44, with a direction control signal on pin 45. Obviously, the grounds between the two boards had to be connected as well. These communication lines were connected via a custom, seven-wire cable with hand-soldered header connections.

384-428-484 - Final Project Report With Addendum 1 - Lynam, Lesher, Levantino

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VARIABLE FREQUENCY THREE PHASE PWM SYNCHRONOUS MOTOR CONTROLLER AND POWER SYSTEM

Lynam, Lesher, Levantino

April 29, 2011

Lynam, Lesher, Levantino

Contant Voltage to Frequency Ratio................................................................................................... 13

April 29, 2011

Engr 384 Engr 428 Engr 484

Lynam, Lesher, Levantino

April 29, 2011

Engr 384 Engr 428 Engr 484

Lynam, Lesher, Levantino

FIGURE 1 - INTERFACING CONTROLLERS

April 29, 2011

Lynam, Lesher, Levantino

April 29, 2011

FIGURE 4 - COMPLIMENTARY SIGNALS *SEE TABLE OF FIGURES NOTE

Lynam, Lesher, Levantino

April 29, 2011

Lynam, Lesher, Levantino

April 29, 2011

N-VALUE TRANSITION LIMITTING

FIELD VOLTAGE CONTROL

Lynam, Lesher, Levantino

April 29, 2011

FIGURE 5 - HID LCD OUTPUT

LCD DATA OUTPUT

Lynam, Lesher, Levantino

April 29, 2011

SPEED CONTROL SYSTEM

Lynam, Lesher, Levantino

April 29, 2011

FIELD VOLTAGE CONTROL SYSTEM

Lynam, Lesher, Levantino

April 29, 2011

SECONDARY PROGRAMS PWM BASE

PWM LOOP TESTS

Lynam, Lesher, Levantino

April 29, 2011

THREE PHASE SYNCHRONOUS MOTOR

CONTANT VOLTAGE TO FREQUENCY RATIO

Lynam, Lesher, Levantino

April 29, 2011

Lynam, Lesher, Levantino

GATE DRIVER SYSTEM

April 29, 2011

FIGURE 8 - EAGLE CAD PCB TRACES

FIGURE 9 - FINAL PCBS

Lynam, Lesher, Levantino

AC/DC CURRENT TRANSDUCER

April 29, 2011

SUPER DIODE PRECISION RECTIFICATION AND FILTERING

Engr 384 Engr 428 Engr 484

Lynam, Lesher, Levantino

FIGURE 10 - TEST SYSTEM

April 29, 2011

GATE DRIVER VOLTAGE ISSUE

FIGURE 11 - CONTROL AND OUTPUT

PHASE SIDE TESTING

Lynam, Lesher, Levantino

April 29, 2011

FIGURE 12 - OUTPUT AND COMPLIMENT *SEE TABLE OF FIGURES NOTE

OSCILLOSCOPE GROUNDING ISSUES

FIGURE 13 - 60 HZ GROUND NOISE (SPIKES)

Lynam, Lesher, Levantino