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Introduction to Spice for Electronics 315 CJ Fourie

Background Spice (for Simulation Program with Integrated Circuit Emphasis) is a very powerful electric circuit simulation program that can compute the response of electrical circuits in time and frequency. The first version of Spice was developed in the early 1970s at Berkeley, California. Circuit data were entered by entering node lists as text. All Spice programmes still use this basic engine, sometimes with a few modifications. We will use a free version of the Spice3f4 engine from Berkeley, which now runs under MS Windows. Spice is big business, and coupled to schematic entry software and printed circuit board or integrated circuit layout software, Spice packages sell for anything from US$10 000 to US$1 million per license. Commercial versions from Orcad or Avant! are good to use, because they add PCB layout capability. Since the circuits handled in this course are not very large or complex, we can describe them adequately with text entries. This also aids understanding of Spice. For demonstrations in lectures and practical sessions, the NioCAD software suite will be used for schematic circuit entry. Design technique Spice circuits are designed and constructed just as any other design project. The key is to keep notes (on paper) and start small. If text entry mode is used, the best is to draw the circuit diagram on paper, number the nodes, and then build the text circuit file. Starting small, and simulating regularly, reduces the chance for errors and makes it easier to debug non-working circuits.

Structure of a simulation file


CJ Fourie Demonstration of audio amplifier

First line is always the title


*Inputs Vin 1 0 sin(0 10 1k 0) Cin 1 2 1u *Rail voltages VCCplus 6 0 15 VCCminus 4 0 -15 *Output / load Cout 8 10 1m Rload 10 0 8 *Amplifier Q1 Q2 Q3 Q4 R1 R2 R3 R4 4 6 6 4 6 9 7 3 2 2 5 9 5 4 8 8 5 Q2N2905A 9 Q2N2219A 7 TIP41C 3 TIP42C 1500 1500 1 1

Comment lines start with * or $

V is a voltage source, and Vin therefore a source with name in. It is connected between nodes 1 and 0 (ground), and gives a sinusoidal signal.

Q is a BJT. The node sequence is C, B, E. The 4th parameter is the name of the transistor model used. Every non-standard model used HAS to be declared. The models of 4 BJTs are included here. The + tells Spice that a line is continued.

* 2N2219A NPN-transistor (TO5-package) .model Q2N2219A NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9 Ne=1.307 + Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 + Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 + Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10) * 2N2905A PNP-transistor (TO5-package) .model Q2N2905A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 + Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 + Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 + Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) * TIP41C NPN hodrywingtransistor (TO220-package) .model TIP41C NPN(Is=457.5f Xti=3 Eg=1.11 Vaf=50 Bf=156.7 Ise=1.346p Ne=1.34 + Ikf=3.296 Nc=.5961 Xtb=2.2 Br=7.639 Isc=604.1f Nc=2.168 + Ikr=8.131m Rc=91.29m Cjc=278.7p Mjc=.385 Vjc=.75 Fc=.5 Cje=433p + Mje=.5 Vje=.75 Tr=1.412u Tf=37.34n Itf=35.68 Xtf=1.163 Vtf=10 + Rb=.1) * TIP42C PNP hodrywingtransistor (TO220-package) .model TIP42C PNP(Is=66.19f Xti=3 Eg=1.11 Vaf=100 Bf=137.6 Ise=862.2f + Ne=1.481 Ikf=1.642 Nc=.5695 Xtb=2 Br=5.88 Isc=273.5f Nc=1.24 + Ikr=3.555 Rc=79.39m Cjc=870.4p Mjc=.6481 Vjc=.75 Fc=.5 + Cje=390.1p Mje=.4343 Vje=.75 Tr=235.4n Tf=23.21n Itf=71.33 + Xtf=5.982 Vtf=10 Rb=.1) *Simulations .tran 10u 10m 0 5u .end

.tran calls a transient analysis. The parameters indicate that data step size is 10 s, stop time = 10 ms, start time = 0 s.

The file MUST end with .end.

General comments: A Spice model is built with elements that are connected between nodes. For example, a resistor is connected between 2 nodes, while a BJT needs 3 nodes (B, C and E). When a file is created, it is advisable to sketch the circuit diagram first, and then to fill in node numbers on the sketch (your choice). The ground, or common node MUST ALWAYS BE 0. The circuit diagram of which the Spice-file is given above, is shown in Fig. 1.
0 Vccplus = 15 V 6

R1 1500

Q3 TIP41C

Q1 2N2905A

4 Cin = 1 uF 1 2 Vccplus = 15 V Vin = sin (0 10 1k 0) 6 Vccminus = -15 V

R3 1 Cuit 1mF 8 10

R4 1

Rluidspreker 8 3 0

0 Q2 2N2219A

Q4 TIP42C

R2 1500

Vccminus = -15 V

Figure 1: Circuit for a simple Class-AB amplifier.

General Elements The most general elements in Spice circuits are: R n1 n2 value Resistance between nodes n1 and n2, with resistance = value. E.g. R5 3 2 10 (R5 between nodes 3 and 2, with resistance = 10 ) C n1 n2 value Capacitor between nodes n1 (positive) and n2, with capacitance = value.

E.g.

Cin 1 2 10u (Cin between nodes 1 and 2, with capacitance 10 F)

L n1 n2 value Inductor between nodes n1 and n2, with inductance = value. E.g. L1 3 8 100m D n1 n2 model Diode between nodes n1 (anode) and n2, with model = model. E.g. D1 6 0 1N4148 Q n1 n2 n3 model Bipolar junction transistor between nodese n1 (collector), n2 (base) and n3 (emitter), with model = model. E.g. Q3 6 5 7 TIP41C M n1 n2 n3 n4 model = MOSFET between nodes n1 (drain), n2 (gate), n3 (source) en n4 (substrate). Model = model. Optional extra parameters are W and L, for gate width and length. E.g. M1 3 1 4 4 VN10KM W=700u L=100u V n+ n- value Independent voltage source, positive terminal at n+. Value can be a DC value, or a statement for a sinusoidal signal, pulse train piece-wise linear function, E.g.: Vcc 1 0 5mV (the m is for milli, and the V for legibility. Spice ignores everything after the m, except when it is meg for 106. This source delivers 5 mV DC.) Vee 1 0 DC 12 (the DC is optional. This source delivers 12 V DC.) Vin 1 0 AC 1V 0 (This source delivers a small signal (AC) with amplitude 1 V and phase 0 degrees. V1 1 0 sin(0 10m 1k 0) (The brackets are optional. This source sets up a sinusoidal voltage signal, with (1) average (DC) value of 0 V, (2) amplitude of 10 mV, (3) frequency of 1 kHz and (4) phase offset of 0 degrees.) V2 1 0 pulse v1 v2 tdelay trise tfall pulsewidth period (PULSE specifies a pulse train. V1 is the minimum voltage, and V2 the maximum. Tdelay is the delay before the signal starts, trise the rise time, tfall the fall time, pulsewidth the time that the signal equals V2, and period the repetition period.) (E.g. V2 1 0 pulse 0 10m 0 10u 10u 40u 100u.) Vi 1 0 PWL t1 v1 t2 v2 (PWL means piece-wise linear, and is used to construct irregular signals out of small linear sections. T1 is the start time, and v1 the corresponding voltage. T2 is time 2, and V2 its corresponding voltage, etc.) I n+ n- value Independent current source. Positive current flows out of n+. The functions are the same as for V. X n1 n2 n3 model Subcircuit. More about this later.

Simulation commands to Spice Spice supports many types of simulation. The simplest ones, most often used, are: Transient analysis (calculates response of circuit in time) .TRAN datastep stoptime starttime maxsimstep DC analysis (Spice changes the values of one or two DC sources in small steps, and recalculates the circuit Q-point each time) .DC variable1 startvalue stopvalue stepsize (variable2 startvalue stopvalue stepsize) (The section in brackets is optional) AC analysis (calculates the frequency response of a circuit, and generates bode diagrams) .AC type np fstart fstop waar: type = type of frequency sweep, e.g. LIN, DEC or OCT. np = number of points (for LIN), or points per decade (for DEC), or per octave (for OCT). fstart = start frequency. fstop = stop frequency. Operating point (Spice calculates the Q-point, or static voltages and currents in a circuit) .OP (The results are dumped to the listing file) Subcircuits Circuit models can get uncontrollably large if every element is fit into the main circuit. When a specific of a circuit is repeated often (like an op-amp), such a circuit can be declared as a subcircuit. A subcircuit is called with X. The general form is: Xyyy n1 n2 nn subname Subcircuit (name yyy) connected to n1 to nn, with circuit model = subname. E.g. X1 14 13 6 4 13 LM358N (X1 is an LM358 op-amp, with: noninverting input: node 14 inverting input: node 13 positive rail voltage: node 6 negative rail voltage: node 4 output: node 13 The subcircuit is declared in the simulation text file in a block that starts with .SUBCKT, followed by the model name and connections. The entire subcircuit is then declared just as if it were the main circuit; complete with model declarations if necessary. At the end of the subcircuit model, the .ENDS statement is used to let Spice know that what follows belongs to the main circuit again. Node numbering in the subcircuit starts from 0 again, and has NO RELATION to any node numbers in the main circuit.

Lastly, more subcircuits can be declared inside one subcircuit, as long as each has its own .ENDS statement (just as procedures within procedures in computer programs). We always declare op-amps as subcircuits, although Spice programs inherently support (native subcircuits) the most common op-amps. Manufacturers of op-amps supply models themselves, and these often model most of the op-amp limitations such as bandwidth, offset voltages and currents, etc. DC sweep example: BJT transistor IC-VCE characteristics The circuit schematic, Spice netlist and simulation results for a BJT circuit analysis are shown.

Figure 2: Schematic diagram for Spice dc sweep example. .title BJT dc characterisation V0 1 0 dc 5 V1 2 0 dc 5 Q0 1 2 0 2N2219A 1.0 ic=0,0 temp=27.0 .dc v0 0 5 0.05 v1 0 1 0.1 .end

The Spice commands to load, run and plot the results of the simulation file, titled l1_bjtcharact2.cir are: > source bjtcharact2.cir > run > plot v0#branch (loads the file) (executes) (plots the negative of the current through voltage source V0 equals IC)

Figure 3: Output of dc sweep example plot command.

Transient analysis example with subcircuit: inverting op-amp circuit This example shows a transient analysis of an inverting op-amp circuit. Note the use of the subcircuit.

Figure 4: Circuit schematic for transient analysis of op-amp circuit.

The Spice circuit file is shown below. Only the 7 lines of the main circuit, as well as the .tran command need to be added the subcircuit text is available from the manufacturer.
.title transient demo R1 R2 R0 V0 V1 V2 X0 5 5 1 6 4 3 0 1 0 6 0 0 0 1 5000.0 1000.0 1000.0 sin(0 1 1k 0) -15 15.0 3 4 5 LF412N

.tran 10u 5m 0 10u *LF412/A LOW OFFSET, LOW DRIFT DUAL JFET INPUT OP-AMP MODEL * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LF412N 1 2 99 50 28 *INPUT STAGE * IOS 2 1 25.0P *^Input offset current CI1 1 0 3P CI2 2 0 3P R1 1 3 1E12 R2 3 2 1E12 I1 99 4 1.0M J1 5 2 4 JX J2 6 7 4 JX R3 5 50 650 R4 6 50 650 *Fp2=28 MHZ C4 5 6 4.372P * *COMMON MODE EFFECT * I2 99 50 800UA *^Quiescent supply current *EOS 7 1 POLY(1) 16 49 1E-3 1 BOS 7 1 V=(1E-3+v(16,49)) *Input offset voltage.^ R8 99 49 80K R9 49 50 80K * *OUTPUT VOLTAGE LIMITING V2 99 8 2.13 D1 9 8 DX D2 10 9 DX V3 10 50 2.13 * *SECOND STAGE * EH 99 98 99 49 1 G1 98 9 5 6 20E-3 R5 98 9 10MEG VA3 9 11 0 *Fp1=18 HZ C3 98 11 857.516P * *POLE STAGE *

*Fp=30 MHz G3 98 15 9 49 1E-6 R12 98 15 1MEG C5 98 15 5.305E-15 * *COMMON-MODE ZERO STAGE * G4 98 16 3 49 1E-8 L2 98 17 144.7M R13 17 16 1K * *OUTPUT STAGE * F6 99 50 VA7 1 F5 99 23 VA8 1 D5 21 23 DX VA7 99 21 0 D6 23 99 DX E1 99 26 99 15 1 VA8 26 27 0 R16 27 28 50 V5 28 25 0.646V D4 25 15 DX V4 24 28 0.646V D3 15 24 DX * *MODELS USED * .MODEL DX D(IS=1E-15) .MODEL JX PJF(BETA=1.183E-3 VTO=-.65 IS=50E-12) * .ENDS .end

The Spice commands to load, run and plot the results of the simulation file, titled l4_invert.cir are: > source invert.cir > run > plot v(6) v(5)

(plots the voltages at node 6 (INPUT) and node 5 (OUTPUT))

Figure 5: Output of transient example plot command.

AC sweep example: frequency response of MOSFET amplifier This example shows an ac sweep.

Figure 6: Circuit schematic for ac sweep example.

.title ac sweep demo C0 C1 R0 R1 R2 R3 M0 V0 V1 V2 2 3 4 3 2 4 1 4 5 7 7 5 1 5 5 2 2 0 0 0 1E-7 ic=0.0 0.0010 ic=0.0 7000.0 500.0 35000.0 165000.0 3 3 MOS1 5.0 dc -5 ac(1 0)

.model MOS1 NMOS(LEVEL=1 VTO=0.8 KP=2E-03) .ac DEC 101 10 10MEG .end

Notice how the input voltage source is now declared as an ac voltage, compared to a sinusoidal input for the transient analyses before. The commands are: > source l2_E22_mosfet.cir > run > plot vm(1)

(Plots the magnitude of the voltage at node 1 over frequency)

The output versus frequency can also be plotted in dB with plot vdb(1).

Figure 7: Output of ac sweep example plot.

Data output to text files for use in Matlab If data should be transferred to other programmes such as Matlab, it can be dumped to text file format. In the last example, use: > set nobreak > print vm(1) > filename.txt Advanced simulation functions There are several advanced simulations that can be performed with Spiceprograms. These include: Monte Carlo analyses used for finding circuit yield, and statistical performance Worst-case simulations Noise analyses used for determining the noise power in outputs, especially at temperatures of interest Temperature simulations determining outputs for specified temperatures Sensitivity analyses used for determining the rate of change in output characteristics when circuit element values are varied. Optimization circuits can be automatically optimized to meet DC or AC requirements. However, most of these are part of the higher-level functionality introduced by expensive simulation software. (removes page breaks from text file) (Dumps the output to filename.txt)