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  • Computer Organization Jul 2006 Old

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    Prasad C M
    155 просмотров2 страницы
    This document contains a computer organization exam with multiple choice and descriptive questions covering various topics in computer architecture. Some of the topics covered include: 1) The differences between pipelining and superscalar operations, CISC and RISC architectures, and multiprocessors and multicore computers. 2) Converting number pairs to signed 2's complement binary and checking for overflow. 3) Explaining how a stack frame is built and dismantled for a function call and return. 4) Describing bus arbitration methods and estimating clock speeds based on bus timing parameters. 5) Distinguishing between processor clock speed and bus clock speed.

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    This document contains a computer organization exam with multiple choice and descriptive questions covering various topics in computer architecture. Some of the topics covered include: 1) The differences between pipelining and superscalar operations, CISC and RISC architectures, and multiprocessors and multicore computers. 2) Converting number pairs to signed 2's complement binary and checking for overflow. 3) Explaining how a stack frame is built and dismantled for a function call and return. 4) Describing bus arbitration methods and estimating clock speeds based on bus timing parameters. 5) Distinguishing between processor clock speed and bus clock speed.

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    Attribution Non-Commercial (BY-NC)
    Скачайте в формате PDF, TXT или читайте онлайн в Scribd
    Отметить как неприемлемый контент
    155 просмотров2 страницы

    Computer Organization Jul 2006 Old

    Загружено:

    Prasad C M
    This document contains a computer organization exam with multiple choice and descriptive questions covering various topics in computer architecture. Some of the topics covered include: 1) The differences between pipelining and superscalar operations, CISC and RISC architectures, and multiprocessors and multicore computers. 2) Converting number pairs to signed 2's complement binary and checking for overflow. 3) Explaining how a stack frame is built and dismantled for a function call and return. 4) Describing bus arbitration methods and estimating clock speeds based on bus timing parameters. 5) Distinguishing between processor clock speed and bus clock speed.

    Авторское право:

    Attribution Non-Commercial (BY-NC)
    Скачайте в формате PDF, TXT или читайте онлайн в Scribd
    Отметить как неприемлемый контент
    из 2

    CS!

    IS46
    US!\ ruiu rro 1
    ...
    Fourth Semester B. E. Degr ee Examinati on, July 2006
    ECtrE/EE/IT/ MU BM/CS/lS
    Computer Organization
    l'ime hrs I [Max.
    Not e: /. Auswer any PIVfull quesriu11s.
    2. A/1.\Wer be brief twtf wtlte ptJillt.
    a. Distinguish bc1ween :
    i) l'ipelining and upcr scalar 11pcrution
    ii) CISC and RJSC
    iii) Multiproccsso1' and multict>mputcrs. (091\hrl..<)
    h. Explain clearly.._,.,.< l{ating and ilo (OJ MMks)
    c. Conven the ft>llow111g pnirs ol numbers to 5 bil signed 2's complement btnat)
    nuntbel'l> and ndd them. State \\he! her an overOO\\ occurs in each case
    i) - 14 and II ii) - 10 and - 13. CU-I I\1J1rkll)
    d. Discuss the two wa)!i in "hich b)1C are ass1gned across words.
    (04 Murk)
    l n. F:\('lnin with n SJ><'d lie example how a stack frame buill and dismantled for
    a in\'l:>el' 100 of a (lllll\brkll)
    b. Which ot the lollowHlg poss1biliues lb1 saving return address of a >Ubroutinc
    >upport subroutine nesting and \\hit:h suppon subroutine recursion and wh)"
    i) in a processor rcg1ster ii) in u memory location associated wtth call
    iii) on a stack tO.C
    c. Explajn clearly the Bus Arbitmtion Methods. (08 Mou ks)
    J a. Draw a , output interfaLe c1rcuit und c:>.pllun the <lifli.:rent
    opcrmion'> clcarl} (Ill Mari.J
    b. Con,Idcr a S)OChronous bus that transfers dUla in one clock cycle. Address
    tntn\mittcd h) the pwccssor appears on the hus allcr .J nam>sccunds.
    propagation dcla) un the bub varh:o from I to 5 nunoseconds,
    decoding 6 nanoseconds. Addressed device tal,es 5 to I 0 nanosccomls to
    place the datu on the bus. Input huller needs 'l nanoseconds setup 11111e.
    Estimate the clue).. srccd at which can11penttc. (11-1 Mnri<!>J
    c. Distinguish between the processor clocil speed bus clock 'peed and
    c:-..plain the dispanty occurs between the rwu. Stutc the value ol lhe
    ahovc in a modern computing s)stem (06 \'1ark>)
    _. 11 Dbcuss the main phases invoh ed in the uperation of 'iC!'.I bos in d!!lail.
    (W Mnrks)
    h. El\plain the Optralion of a split bus \\ith <lliiagram
    c With a diagram USB p.tckct fonntll denrly. (Of' MorksJ
    For More Question Papers Visit - http://pediawikiblog.blogspot.com
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