DC Biasing Circuits

Chapter Summary
The dc load line of an amplifier represents all the possible combinations of and . A generic load line is shown in Figure 7-1. The endpoints on the load line represent the ideal saturation and cutoff characteristics of the circuit. Note that: The saturation point, , is plotted assuming a value of . In practice, has

some value slightly greater than 0 V when the transistor is saturated. The value of is normally calculated by dividing the total voltage across the collector and emitter circuits by the total resistance in those circuits. The cutoff point, , is plotted assuming a value of . In practice, has some

value slightly greater than 0 A when the transistor is in cutoff. The value of is normally assumed to equal the total voltage applied across the collector and emitter circuits. These concepts are demonstrated throughout the chapter.

Figure 7-1. A generic dc load line. Amplifiers are designed for specific values of and . For example, the circuit in Figure 7-2 is

shown to have values of and . As long as there is no signal applied to the amplifier, the collector current and collector-emitter voltage (ideally) remain constant at these values.

Figure 7-2. A transistor amplifier and dc load line. When no input signal is applied to an amplifier, the circuit is said to be in its quiescent state. The point on the dc load line that represents the quiescent values of and Q-point for the circuit in Figure 7-2 is shown on the load line. is referred to as the Q-point. The

When the Q-point for an amplifier is positioned on the center of the load line, the circuit is said to be midpoint biased. When a circuit is midpoint biased: is approximately half the value of is approximately half the value of . .

As shown in Figure 7.8, midpoint bias provides for optimum ac operation of the circuit.

Base Bias The simplest transistor biasing circuit is referred to as base bias (or fixed bias). The name stems from the fact that the current through the base circuit ( ) remains relatively fixed from one transistor to another. A base bias circuit is shown (along with its primary mathematical relationships) in Figure 7-3. Note that the load line equations are used to plot the dc load line for the circuit, while the Q-point equations are used to determine the Q-point values of and . The load line and Q-point calculations for a base bias circuit are demonstrated in Examples 7.3 and 7.4 of the text.

Figure 7-3. Base bias. Despite its simple circuitry, base bias is not used for linear amplifiers because it is subject to Q-point shift; a condition where a change in operating temperature results in changes in in temperature causes a change in beta ( ). Since the value of and . A change causes

is fixed, the change in

a change in and , as demonstrated in Example 7.6. The shift in the circuit Q-point can adversely affect the ac operation of the circuit, which is a critical concern for linear amplifier applications. As a result, base bias is used almost exclusively in switching circuits. Note that base bias is referred to as a beta-dependent circuit, since the Q-point values of changes in beta. and can be affected by

Voltage-Divider Bias Voltage-divider bias (which is sometimes referred to as universal bias) is the most commonly used transistor-biasing scheme. The circuit can be identified by the voltage divider in the transistor base circuit. A voltage-divider bias circuit is shown (along with its primary mathematical relationships) in Figure 7-4. The Q-point analysis of a voltage-divider bias circuit is demonstrated in Example 7.7 of the text.

Figure 7-4. Voltage-divider bias. Transistor spec sheets typically provide minimum, maximum, and/or typical values of . If only one value is listed, that value must be used for any circuit analysis problem. If more than one is listed, and one is a typical value, use that value. If only the minimum and maximum values are listed, you must use the geometric average of the two. The geometric average of Example 7.9 of the text. As shown in Figure 7-4, must use in Example 7.11. When changes in is determined as shown in

can affect the approach taken to solve for in place of

. If

, you

in the base voltage equation. This principle is demonstrated , the voltage-divider bias circuit is relatively stable against

(resulting from a change in operating temperature). when the value of isnt certain, it is generally safe to assume that

To determine the value of

. This relationship is based on the fact that linear amplifiers are generally biased as closely as possible to midpoint. A variety of typical fault symptoms for a voltage-divider bias circuit are illustrated in Figure 7.22 of the text.

Emitter Bias Emitter bias consists of a dual-polarity power supply and a grounded base resistor. The name emitter

bias stems from the fact that a dc power supply (

) is used to set the value of

, and therefore,

the values of and . An emitter bias circuit is shown (along with its primary mathematical relationships) in Figure 7-5.

Figure 7-5. Emitter bias. The equation for (Figure 7-5) does not contain , indicating that the values of and are

not affected by changes in beta. As a result, emitter bias is classified as a beta-independent circuit. The fact that it is a beta-independent circuit is the primary strength of emitter bias. The circuits primary drawback is the fact that it requires the use of a dual-polarity dc power supply.

Feedback-Bias Circuits The term feedback is used to describe a circuit configuration where a sample of the output signal is fed back to the circuit input to control the circuit operation. There are two types of feedback that are used to bias transistors: collector-feedback bias and emitter-feedback bias. Collector-feedback bias is designed so that the collector voltage ( ) directly affects the value of . A collector-feedback bias circuit is shown (along with its primary mathematical relationships) in Figure 7-6. The Q-point analysis of a collector-feedback bias circuit is demonstrated in Example 7.14 of the text.

Figure 7-6. Collector-feedback bias.

As you can see, there are no load line equations given in Figure 7-6. This is due to the fact that the transistor in a collector-feedback bias circuit cannot saturate under normal circumstances. Thus, the circuit (technically) has no dc load line. The collector-to-base feedback is evidenced by: The connection of the base circuit to the transistor collector, indicating that . The presence of in the base current equation shown in the figure. is a function of

Emitter-feedback bias is designed so that the emitter voltage ( ) affects the value of . An emitterfeedback bias circuit is shown (along with its primary mathematical relationships) in Figure 7-7. The Qpoint analysis of an emitter-feedback bias circuit is demonstrated in Example 7.15. The emitter-to-base feedback is evidenced by: The addition of an emitter resistor ( the values of The presence of and . ), which produces an emitter voltage ( ) that affects

in the base current equation shown in the figure. The collector-feedback and emitter-feedback bias circuits are summarized and compared in Figure 7.33 of the text.

Figure 7-7. Emitter-feedback bias.