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An Intel C8080A processor.

Produced mid 1974


Common manufacturer(s) Intel
Max. CPU clock rate 2 MHz
Min. feature size 6m
Instruction set 8080
Predecessor Intel 8008
Successor Intel 8085
Intel 8086
Intel 8088
Package(s) 40-pin DIP
Intel 8080
AMD clone AM9080.
NEC 8080AF (second
source).
Intel 8080
From Wikipedia, the Iree encyclopedia
The Intel 8080 was the second 8-bit microprocessor
designed and manuIactured by Intel and was released in
April 1974.
|1|
It was an extended and enhanced variant oI
the earlier 8008 design, although without binary
compatibility. The initial speciIied clock Irequency limit
was 2 MHz and with common instructions having
execution times oI 4, 5, 7, 10 or 11 cycles this meant a
Iew hundred thousand instructions per second. The 8080
has sometimes been labeled "the Iirst truly usable
microprocessor", although earlier microprocessors were
used Ior calculators and other applications. The
architecture oI the 8080 strongly inIluenced Intel's 8086
CPU architecture, which spawned the x86 Iamily oI
processors.
The 8080 was implemented using non-saturated
enhancement-load NMOS, demanding an extra 12 volt
and a 5 volt supply.
Contents
1 Description
1.1 Programming model
1.1.1 Registers
1.1.2 Flags
1.1.3 Commands/instructions
1.1.3.1 8-bit instructions
1.1.3.2 16-bit operations
1.2 Input/output scheme
1.2.1 Input output port space
1.2.2 Separate stack space
1.3 The internal state word
1.4 Pin usage
2 Support chips
3 Physical implementation
4 The industrial impact
4.1 Applications and successors
4.2 Industry change
5 History
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i8080 microarchitecture.
5.1 Patent
6 Cultural impact
7 See also
8 ReIerences
9 External links
Description
Programming model
The Intel 8080 was the successor to the 8008. It used the same basic
instruction set as the 8008 (developed by Computer Terminal
Corporation) and was source code compatible with its predecessor,
but added some handy 16-bit operations to the instruction set as well.
The 8080's large 40-pin DIP packaging permitted it to provide a
16-bit address bus and an 8-bit data bus, allowing easy access to 64
kilobytes oI memory.
Registers
The processor had seven 8-bit registers (A, B, C, D, E, H, and L)
where A was the 8-bit accumulator and the other six could be used as
either byte-registers or as three 16-bit register pairs (BC, DE, HL)
depending on the particular instruction. Some instructions also enabled HL to be used as a (limited) 16-bit
accumulator, and a pseudoregister, M, could be used almost anywhere that any other register could be used
and reIerred to the memory address pointed to by HL. It also had a 16-bit stack pointer to memory
(replacing the 8008's internal stack), and a 16-bit program counter.
Flags
The processor maintains internal Ilag bits which show results oI artithmetic and logical Iunctions. The Ilags
are:
sign, set 1 iI result is negative
zero, set iI the accumulator register is zero
parity, set 1 iI the number oI 1 bits in the accumulator is even
carry, set iI the last add operation resulted in a carry, or iI the last subtraction operation did not require
a borrow
auxiliary carry, used Ior binary-coded decimal arithmetic.
The carry bit can be set, or complemented, by speciIic instructions. Conditional branch instructions test the
various Ilag status bits. Flags can be copied as a group to the accumulator.
Commands/instructions
As with many other 8-bit processors, all instructions were encoded in a single byte (including register-
numbers, but excluding immediate data), Ior simplicity. Some oI them were Iollowed by one or two bytes oI
data, which could be an immediate operand, a memory address, or a port number. Like larger processors, it
had automatic CALL and RET instructions Ior multi-level procedure calls and returns (which could even be
conditionally executed, like jumps) and instructions to save and restore any 16-bit register-pair on the
machine stack. There were also eight one-byte call instructions (RST) Ior subroutines located at the Iixed
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addresses 00h, 08h, 10h,...,38h. These were intended to be supplied by external hardware in order to invoke
a corresponding interrupt-service routine, but were also oIten employed as Iast system calls. The most
sophisticated command was XTHL, which was used Ior exchanging the register pair HL with the value
stored at the address indicated by the stack pointer.
8-bit instructions
Most 8-bit operations could only be perIormed on the 8-bit accumulator (the A register). For 8-bit operations
with two operands, the other operand could be either an immediate value, another 8-bit register, or a
memory cell addressed by the 16-bit register pair HL. Direct copying was supported between any two 8-bit
registers and between any 8-bit register and an HL-addressed memory cell. Due to the regular encoding oI
the MOV-instruction (using a quarter oI available opcode space) there were redundant codes to copy a
register into itselI (MOV B,B, Ior instance), which was oI little use, except Ior delays. However, what would
have been a copy Irom the HL-addressed cell into itselI (i.e., MOV M,M) was instead used to encode the
HLT instruction (halting execution until an external reset or interrupt).
16-bit operations
Although the 8080 was generally an 8-bit processor, it also had limited abilities to perIorm 16-bit operations:
Any oI the three 16-bit register pairs (BC, DE, HL) or SP could be loaded with an immediate 16-bit value
(using LXI), incremented or decremented (using INX and DCX), or added to HL (using DAD). The
XCHG
|2|
operation exchanged the values oI HL and DE. By adding HL to itselI, it was possible to achieve
the same result as a 16-bit arithmetical leIt shiIt with one instruction. The only 16-bit instructions that aIIect
any Ilag are DAD H/D/B, which sets the CY (carry) Ilag in order to allow Ior programmed 24-bit or 32-bit
arithmetics (or larger), needed to implement Iloating point arithmetics, Ior instance.
Input/output scheme
Input output port space
The 8080 supported up to 256 input/output (I/O) ports, accessed via dedicated I/O instructionstaking port
addresses as operands. This I/O mapping scheme was regarded as an advantage, as it Ireed up the processor's
limited address space. Many CPU architectures instead use so-called memory mapped I/O, in which a
common address space is used Ior both RAM and peripheral chips. This removes the need Ior dedicated I/O
instructions, although a drawback in such designs may be that special hardware must be used to insert wait
states as peripherals are oIten slower than memory. However, in some simple 8080 computers, I/O was
indeed addressed as iI they were memory cells, "memory mapped", leaving the I/O commands unused. I/O
addressing could also sometimes employ the Iact that the processor would output the same 8-bit port address
to both the lower and the higher address byte (i.e. IN 05h would put the address 0505h on the 16-bit address
bus). Similar I/O-port schemes were used in the backward compatible Zilog Z80 and Intel 8085 as well as the
closely related x86 Iamilies oI microprocessors.
Separate stack space
One oI the bits in the processor state word (see below) indicates that the processor is accessing data Irom the
stack. Using this signal, it is possible to implement a separate stack memory space. However, this Ieature was
seldom used.
The internal state word
For more advanced systems, during one phase oI its working loop, the processor set its "internal state byte"
on the data bus. This byte contains Ilags which determine iI the memory or I/O port is accessed, and whether
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it was necessary to handle an interrupt.
The interrupt system state (enabled or disabled) was also output on a separate pin. For simple systems, where
the interrupts were not used, it is possible to Iind cases where this pin is used as an additional single-bit
output port (the popular Radio86RK computer made in the Iormer Soviet Union, Ior instance).
Pin usage
The address bus had its own 16 pins, and the data bus had eight pins that were possible to use without any
multiplexing. Using the two additional pins (read and write signals), it was possible to assemble simple
microprocessor devices very easily. Only the separate IO space, interrupts and DMA required additional
chips to decode the processor pin signals. However, the processor load capacity was limited, and even simple
computers Irequently contained bus ampliIiers.
The processor required three power sources (5, 5 and 12 volt(V)) and two non-interlacing
high-amplitude synchronization signals. However, at least the late Soviet version KP580BM80A was able to
work with a single 5 V power source, the 12 V pin being connected to 5 V and the 5 V pin to ground.
The processor consumed about 1.3 W oI power.
The pinout table, Irom the chip's accompanying documentation, described the pins as Iollows:
Pin
number
Signal Type Comment
1 A10 Output Address bus 10
2 GND - Ground
3 D4
Bidirectional
Bidirectional data bus. The processor also transiently sets here the
"processor state", providing inIormation about what the processor is
currently doing:
D0 reading interrupt command. In response to the interrupt signal,
the processor was reading and executing a single arbitrary command
with this Ilag raised. Normally the supporting chips provided the
subroutine call command (CALL or RST), transIerring control to the
interrupt handling code.
D1 reading (low level means writing)
D2 accessing stack (probably a separate stack memory space was
initially planned)
D3 doing nothing, has been halted by the HLT command
D4 writing data to an output port
D5 reading the Iirst byte oI an executable command
D6 reading data Irom an input port
D7 reading data Irom memory
4 D5
5 D6
6 D7
7 D3
8 D2
9 D1
10 D0
11 5 V -
The 5 V power supply. This must be the Iirst power source connected and
the last disconnected, otherwise the processor will be damaged.
12 R Input
Reset. The signal Iorces execution oI commands located at address 0000.
The content oI other processor registers is not modiIied. This is an
inverting input (the active level being logical 0)
13 DMA Input
Direct memory access request. The processor is requested to switch the
data and address bus to the high impedance ("disconnected") state.
14 INT Input Interrupt request
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15 CLC2 Input The second phase oI the clock generator signal
16
ACK
INT
Output
The processor had two commands Ior setting 0 or 1 level on this pin. The
pin normally was supposed to be used Ior interrupt control. However, in
simple computers it was sometimes used as a single bit output port Ior
various purposes.
17 RD Output Read (the processor reads Irom memory or input port)
18 WR Output
Write (the processor writes to memory or output port). This is an inverted
output, the active level being logical zero.
19 S Output
Active level indicates that the processor has put the "state word" on the
data bus. The various bits oI this state word provide additional inIormation
Ior supporting the separate address and memory spaces, interrupts, and
direct memory access. This signal is required to pass through additional
logic beIore it can be used to write the processor state word Irom the data
bus into some external register.
20 5 V - The 5 V power supply
21
ACK
DMA
Output
Direct memory access conIirmation. The processor switches data and
address pins into the high impedance state, allowing another device to
manipulate the bus
22 CLC1 Input The Iirst phase oI the clock generator signal
23 RDY Input
Wait. With this signal it was possible to suspend the processor's work. It
was also used to support the hardware-based step-by step debugging
mode.
24 WAIT Output Wait (indicates that the processor is in the waiting state)
25 A0
Output Address bus 26 A1
27 A2
28 12 V -
The 12 V power supply. This must be the tttt connected and Iirst
disconnected power source.
29 A3
Output The address bus; can switch into high impedance state on demand
30 A4
31 A5
32 A6
33 A7
34 A8
35 A9
36 A15
37 A12
38 A13
39 A14
40 A11
Support chips
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A key Iactor in the success oI the 8080 was the broad range oI support chips available, providing serial
communications, counter/timing, input/output, direct memory access, and programmable interrupt control
amongst other Iunctions.
8251-Communication Controller
8253-Programmable Interval Timer
8255-Programmable Peripheral InterIace
8257-DMA Controller
8259-Programmable Interrupt Controller
Physical implementation
The 8080 integrated circuit used non-saturated enhancement load nMOS gates, demanding extra voltages
(Ior the load-gate bias). It was manuIactured in a silicon gate process using a minimum Ieature size oI 6 m.
A single layer oI metal was used to interconnect the approximately 6,000 transistors
|3|
in the design, but the
higher resistance polysilicon layer, which required higher voltage Ior some interconnects, was implemented
with transistor gates. The die size was approximately 20 mm.
The industrial impact
Applications and successors
The 8080 was used in many early microcomputers, such as the MITS Altair 8800 Computer, Processor
Technology SOL-20 Terminal Computer and IMSAI 8080 Microcomputer, Iorming the basis Ior machines
running the CP/M operating system (the later, almost Iully compatible and more capable, Zilog Z80
processor would capitalize on this, with Z80 & CP/M becoming the dominant CPU & OS combination oI the
period circa 1976 to 1983 much as did the x86 & MS-DOS Ior the PC a decade later). Even in 1979 aIter
introduction oI the Z80 and 8085 processors, Iive manuIacturers oI the 8080 were selling an estimated
500,000 units per month at a price around $3 to $4 per unit.
|4|
The Iirst single-board microcomputers, such
as MYCRO-1 and the oootoooooo were based on the Intel 8080. One oI the early uses oI the 8080 was made
in the late 1970s by Cubic-Western Data oI San Diego, CA in its Automated Fare Collection Systems custom
designed Ior mass transit systems such as BART and others around the world. An early industrial use oI the
8080 was as the "brain" oI the DatagraphiX Auto-COM (Computer Output MicroIiche) line oI products
which took large amounts oI user data Irom reel-to-reel tape and imaged it onto microIiche. The Auto-COM
instruments also included an entire automated Iilm cutting, processing, washing, and drying sub-system
quite a Ieat, both then and in the 21st century, to all be accomplished successIully with only an 8-bit
microprocessor running at a clock speed oI less than 1 MHz with a 64 KB memory limit. In addition, several
early arcade video games were built around the 8080 microprocessor. sstosssostosot was perhaps the most
popular such title.
Shortly aIter the launch oI the 8080, the Motorola 6800 competing design was introduced, and aIter that, the
MOS Technology 6502 variation oI the 6800. Zilog introduced the Z80, which had a compatible machine-
language instruction set and initially used the same assembly language as the 8080, but Ior legal reasons,
Zilog developed a syntactically-diIIerent (but code compatible) alternative assembly language Ior the Z80.
At Intel, the 8080 was Iollowed by the compatible and electrically more elegant 8085, and later by the
assembly language compatible 16-bit 8086 and then the 8/16-bit 8088, which was selected by IBM Ior its
new PC to be launched in 1981. Later NEC made a NEC V20 (a 8088 clone with Intel 80186 instruction set
compatibility) which also supported an 8080 emulation mode. This was also supported by NEC's V30 (a
similarly enhanced 8086 clone). Thus, the 8080, via its ISA, made a lasting impact on computer history.
In the Soviet Union, manuIacturers cloned the 8080 microprocessor's layout geometry and started to produce
them under the name KP580HK80 (later marked as KP580BM80), where even the pins were placed
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identically. This processor was the base oI the Radio86RK (Pano 86PK in Russian), probably the most
popular amateur single-board computer in the Soviet Union. Radio86RK's predecessor was the Micro-80
(Mnxpo-80 in Russian), and its successor the Orion-128 (Opnon-128 in Russian) which had a graphical
display. Both were built on the KP580 processor. According to some sources, the Soviet analog had two
undocumented instructions, speciIic to itselI; however, these were not widely known.
Another model compatible with Intel 8080A, named MMN8080, was produced at Microelectronica
Bucharest in Romania.
|5|
There was also a compatible Polish CPU named MCY7880
|6|
and the Czech-made
Tesla MHB 8080A.
Industry change
The 8080 also changed how computers were created. When the 8080 was introduced, computer systems
were usually created by computer manuIacturers such as Digital Equipment Corporation, Hewlett Packard,
or IBM. A manuIacturer would produce the entire computer, including processor, terminals, and system
soItware such as compilers and operating system. The 8080 was actually designed Ior just about any
application stosst a complete computer system. Hewlett Packard developed the HP 2640 series oI smart
terminals around the 8080. The HP 2647 was a terminal which ran BASIC on the 8080. MicrosoIt would
market as its Iounding product the Iirst popular programming language Ior the 8080, and would later acquire
DOS Ior the IBM-PC.
The 8080 and 8085 gave rise to the 8086, which was designed as a source compatible (although not binary
compatible) extension oI the 8085. This design, in turn, later spawned the x86 Iamily oI chips, the basis Ior
most CPUs in use today. Many oI the 8080's core machine instructions and concepts, Ior example, registers
named A, B, C and D, as well as many oI the Ilags used to control conditional jumps, are still in use in the
widespread x86 platIorm. 8080 Assembler code can still be directly translated into x86 instructions; all oI its
core elements are still present.
PCs based upon the 8086 design and its successors evolved into workstations and servers oI 16, 32 and 64
bits, with advanced memory protection, segmentation, and multiprocessing Ieatures, blurring the diIIerence
between small and large computers (the 80286 and 80386's protected mode were important in doing so). The
size oI chips has grown so that the size and power oI large x86 chips is not much diIIerent Irom high end
architecture chips, and a common strategy to produce a very large computer is to network many x86
processors.
The basic architecture oI the 8080 and its successors has replaced many proprietary midrange and
mainIrame computers, and withstood challenges oI technologies such as RISC. Most computer
manuIacturers have abandoned producing their own processors below the highest perIormance points.
Though x86 may not be the most elegant, or theoretically most eIIicient design, the sheer market Iorce oI so
many dollars going into reIining a design has made the x86 Iamily today, and will remain Ior some time, the
dominant processor architecture, even bypassing Intel's attempts to replace it with incompatible architectures
such as the iAPX 432 and Itanium.
History
Federico Faggin, the originator oI the 8080 architecture in early 1972, proposed it to Intel's management and
pushed Ior its implementation. He Iinally got the permission to develop it six months later. Faggin hired
Masatoshi Shima Irom Japan who did the detailed design under his direction, using the design methodology
Ior random logic with silicon gate that Faggin had created Ior the 4000 Iamily. Stanley Mazor contributed a
couple oI instructions to the instruction set.
Patent
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US patent 4,010,449 (http://worldwide.espacenet.com/textdoc?DBEPODOC&IDXUS4,010,449) ,
Federico Faggin, Masatoshi Shima, Stanley Mazor, "MOS computer employing a plurality oI separate
chips", issued 1977-03-01|1| (http://www.google.com/patents?idCSU6AAAAEBAJ&zoom4&
pgPA5#vonepage&q&IIalse)
Cultural impact
Asteroid 8080 Intel is named as a pun and praise on the name oI Intel 8080.
|7|
MicrosoIt's published phone number, 425-882-8080, was chosen because so much early work was on
this chip.
Many oI Intel's main phone numbers also take a similar Iorm: xxx-xxx-8080
See also
CP/M operating system
References
^ Intel (April 15, 1974). "From CPU to soItware, the 8080 Microcomputer is here". stsotooooosssst (New
York: Fairchild Publications): pp. 4445. stsotooooosssst was a weekly trade newspaper. The same
advertisement appeared in the May 2, 1974 issue oI stsotooooot magazine.
1.
^ Classiccmp.org (http://www.classiccmp.org/dunIield/r/8080.txt) . None. Retrieved on October 23, 2011. 2.
^ Reichel-Orbital museum CPU Collection (http://museum.reichel-orbital.de/index.php?pagecpus) .
Museum.reichel-orbital.de. Retrieved on October 23, 2011.
3.
^ Sol Libes BYTE News... in BEEs, ISSN 0360-5280, Volume 4 No. 11, November 1979 pg. 82 4.
^ Soviet chips and their western analogs (http://www.cpu-world.com/inIo/exUSSR-chips.html) . CPU-world.
Retrieved on October 23, 2011.
5.
^ MCY7880a Polish-made clone oI 8080 (http://www.cpu-world.com/CPUs/8080/Poland-MCY7880.html) .
CPU World. Retrieved on October 23, 2011.
6.
^ CFA-harvard.edu (http://cIa-www.harvard.edu/iau/lists/MPNames.html) . CFA-harvard.edu. Retrieved on
October 23, 2011.
7.
External links
Intel and other manuIacturers' 8080 CPU images and descriptions at cpu-collection.de
(http://www.cpu-collection.de/?tn0&l0cl&l18080)
Scan oI the Intel 8080 data book at datasheetarchive.com (http://www.datasheetarchive.com
/search.php?q8080)
Microcomputer Design, Second Edition, 1976 (http://donbot.com/MicrocomputerDesign
/SE/M001.html)
8080 Emulator written in Javascript (http://www.bluishcoder.co.nz/js8080/)
Intel 8080/KR580VM80A emulator in Javascript (http://github.com/begoon/i8080-js/)
Intel 8080 Microcomputer Systems User's Manual (September 1975, 234 pages) (http://www.elenota.pl
/datasheet-pdI/133557/Intel/8080)
This article is based on material taken Irom the Free On-line Dictionary oI Computing prior to 1 November
2008 and incorporated under the "relicensing" terms oI the GFDL, version 1.3 or later.
Retrieved Irom "http://en.wikipedia.org/w/index.php?titleIntel8080&oldid539481344"
Categories: Intel x86 microprocessors Intel microprocessors 1974 introductions
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