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International Journal of JOURNAL Electrical Engineering and Technology (IJEET), ISSN 0976 INTERNATIONAL OF ELECTRICAL ENGINEERING 6545(Print), ISSN

N 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME & TECHNOLOGY (IJEET) ISSN 0976 6545(Print) ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), pp. 155-164 IAEME: www.iaeme.com/ijeet.asp Journal Impact Factor (2013): 5.5028 (Calculated by GISI) www.jifactor.com

IJEET
IAEME

COMPARATIVE ANALYSIS OF SINE TRIANGLE AND SPACE VECTOR PWM FOR CASCADED MULTILEVEL INVERTERS
B.kiran kumar1, Y.V.Sivareddy2, M.Vijayakumar3
2

(EEE Department, Research Scholar, JNTU Anantapur, India) (EEE Department, Principal, KKR Institute of Technology,India) 3 (EEE department, Professor, JNTU Anantapur, India)

ABSTRACT Cascaded Multilevel Inverter with Space Vector PWM strategy gained importance in high power industrial drive applications, due to its reduced complexity. This paper proposes a more switching times Space Vector PWM method for different level cascaded inverters. In this, five level and seven level cascaded inverters are modelled with simplified Space Vector PWM and compared the simulation results with Sine Triangle PWM. Keywords: Cascaded multilevel inverter, Sine triangle PWM, switching times SVPWM. I. INTRODUCTION An Inverter gives the output voltage either +Vdc or Vdc commonly, this type of inverters are called as two level inverter [5]. This type of inverters is not able to use for higher voltage and power requirements due to higher ripple content and switching losses[2]. To minimise this, the concept Multilevel has evolved, which can be able to generate better output quality while operating at lower switching frequencies. Among various multilevel topologies, the simplest and most flexible topology is cascaded multilevel inverter, where an isolated dc sources are usually available, thus making the structure so flexible for addition of several number of voltage level [1] .The cascade multilevel inverter is simply a number of conventional two level bridges in series. Thus for seven level inverter topology also requires only three full bridges [4].the disadvantage which is limiting this cascaded inverters is, it requires separate isolated dc sources. The general structure of cascaded multilevel inverter for a single phase system is shown in Fig 1. Each Separate voltage source Vdc1, Vdc2, Vdc3 is connected in cascade with other sources via a
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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

special H-bridge circuit associated with it [3]. Each H-bridge circuit consists of four active switching elements that can make the output voltage either positive or negative polarity; or it can also be simply zero volts which depends on the switching condition of switches in the circuit[3]. The imaginary times svpwm provides reduced complexity compared to conventional svpwm[6]and gives better THD when employed to cascaded inverters The S number of DC sources or stages and the associated number output level can be calculated by using the equation as follows [3] 2 1
S1 S2

Vdc1
S3 S4

Vdc2

S1 S3

S2 S4

Vo

S1

S2

Vdc3
S3 S4

Fig.1 Topology of cascaded seven level inverter 2. SPACE VECTOR PWM For the ac machine drive application, full utilization of the dc bus voltage is extremely important in order to achieve the maximum output torque under all operating conditions .In this aspect, compared with any other PWM method for the voltage source inverter, the PWM based on voltage space vectors results in excellent dc bus utilization [6] .Moreover, as compared with sine triangle PWM method, the ripple content can be minimised [4]. In the conventional space Vector PWM required output voltage is generated by sequential switching of active vectors and zero vectors according to the reference vector location. So, in view of practical implementation, it requires calculation of sector in which reference vector is located and gating time [6] .Therefore, it becomes complex and needs longer calculation to implement conventional space vector PWM.
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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

2.1. Space vector PWM based on Switching times Usually, effective times can be deduced as following 1 sin 2

(1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13)

sin

Sector-1: cos 1

= sin = =

= =

Similarly we can calculate effective times in terms of phase voltages for six sectors also and finally summarised as ,where T1 and T2 shows the effective times in the different sectors. The effective time means the time duration in which the effective voltage is supplied to the machine terminal. The time intervals of these switching times are meaningful only because some of these imaginary times have negative time value according to the each reference phase voltage [9]. Table (1) effective times for different sectors Sector 1 2 3 4 5 6 T1 TAS-TBS TAS-TCS TBS-TCS TBS-TAS TCS-TAS TCS-TBS T2 TBS-TCS TBS-TAS TCS-TAS TCS-TBS TAS-TBS TAS-TCS

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

2.2.Switching times SVPWM Algorithm Step1: Calculate V, V by using 3 3 2 2 Step2: TAS = Ts( ), TBS = Ts( ) and TCS = Ts() Step3: Tmax = TAS if (TBS>Tmax); {Tmax=TBS} Tmin=TAS if (TBS<Tmin);{Tmin=TBS} if (TBS>Tmax); {Tmax=TCS} if (TBS<Tmin); {Tmin=TCS} step4 : Teffective = Tmax-Tmin To= Tsample-Teffective Toffset= (To/2-Tmin) Step5: in a sampling period gating signals are calculated as Tga = TAS+Toffset; Tgb = TBS+Toffset; Tgc = TCS+Toffset; Advantages of Switching times SVPWM Algorithm i) No look up table is needed ii) No sector identification required iii) Angle information not needed iv) Voltage vector amplitude is not needed

Aphase B-phase TBS

TAS

A phase B Phase

Tga

Tgb

C-Phase

TCS

C phase

Tgc

(a)

(b)

Fig.2 switching pulse pattern of proposed PWM method Switching times switching pulse pattern (a)Actual switching pulse pattern (b)Actual switching pulse pattern

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME The basic SVM method is the modulation method with symmetrical spacing zero vectors (SVPWM). In imaginary switching times method, in order to get symmetrical spacing an offset value is added[6]. 3 radius = 3 Vdc
SPWM SVPWM

Fig.3 Locus of operating regions for different modulating techniques


The modulation index M varies from 0 to 1 at the square-wave output. The radius of the circle inscribed of the hexagon in Fig. 3. At this condition the modulation index is equal: 3 3 2

This means that 90.7% of the fundamental at the square wave can be obtained. It extends the linear range of modulation in relation to 78.55% in the sinusoidal modulation techniques (Fig. 3)

3.MATLAB/SIMULINK MODELS

IGBT /Diode 6
m E m E C g

IGBT /Diode 7
m E

Out 1 Out 2 Out 3 Out 4 Out 5 Out 6

2V
C g

IGBT /Diode 5
m E

IGBT /Diode 4

10 ohms

Subsystem
+

IGBT /Diode
m E

IGBT /Diode 1
m E

Scope 1

2 v1
C g C g

IGBT /Diode 2
m E

IGBT /Diode 3
m E

Fig.4 Simulink for five level cascaded inverter

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Voltage Measurement

International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

IGBT /Diode
m E

IGBT /Diode 1
m E

DC Voltage Source
g C

+ -

Voltage Measurement
g C

Scope

Out1 Out2 Out3 Out4 Out5 Out6


g

IGBT /Diode 3 Pulse Generator

IGBT /Diode 4
E

Series RLC Load

Subsystem IGBT /Diode 2

IGBT /Diode 5
m m E E

Pulse Generator 2

DC Voltage Source 1
g C g C g E m C g E m E C E C

IGBT /Diode 8
m E

IGBT /Diode 7
m C

IGBT /Diode 6
m E

IGBT /Diode 9

DC Voltage Source 2

IGBT /Diode 11
m

IGBT /Diode 10

Fig.5.simulink for seven level cascaded inverter

u(2) Va 0.866 Ma 1-D T (u) u1 Lookup Table (n-D) f(u) sin f(u) cos u(1)*u(2) Vbeta f(u) vc 4/3 Gain u(1)*u(3) f(u) Vappha Vb

max Ramp MinMax 1

min Gain 1 MinMax 2 0.5

Scope 2

Fig.6 Simulink for Switching times space vector PWM

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

4. SIMULATION RESULTS

a) Output for three level cascaded inverter

b) Output for five level cascaded inverter

FFT Analysis of cascaded Inverters

e) Three level inverter with spwm,ma=0.8

f) Three level inverter with svpwm,ma=0.8

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

c) Output for cascaded sevel level inverter

d) Output for proposed SVPWM level inverter

g) Five level inverter with SPWM for ma=0.8

h) Five level inverter with SVPWM for ma=0.8

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

4.1 Comparative THD Analysis

Modulating technique SPWM

Three level

Five level

Seven level

67.01% 21.63% 14.57%

SVPWM

31.27% 13.16%

8.67%

i) Seven level inverter with SPWM for ma=0.8

j) Seven level inverter with SVPWM for ma=0.8

5. CONCLUSION Space vector PWM based on imaginary times reduces the complexity involved in the conventional svpwm. For the cascaded level inverters the THD decreases as levels increases further, when compared to sine triangle modulation, svpwm gives lesser THD for corresponding inverter level. REFERENCES [1] A new hybrid cascaded h bridge multilevel inverter performance analysis, IEEE conference on advances in engineering, science and management, march 2012 [2] Analysis and Simulation of new 7- Level Inverter topology, by M.suryasuresh and Vishnu Prasad [3] seven-Level modified Cascaded Multilevel Inverter for Induction motor drive, Journal of information engineering applications vol.1 no.1 2011.

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 6545(Print), ISSN 0976 6553(Online) Volume 4, Issue 2, March April (2013), IAEME

[4] Simulation of a space vector PWM controller for three level voltage fed inverter motor drive, 2006 IEEE. [5]Ahmad FaizMinai and Abu Tariq (2011 IEEE) Analysis of Cascaded Multilevel Inverter [6] A Novel voltage modulation technique of the space vector pwm,by seung ki sul. [7] Zhong Du, Leon M.Tolbert, john N.chiasson and Burak Ozpineci (2006 IEEE)A Cascaded Multilevel Inverter Using a Single DC Source [8] Joserodriguez,jih- shenlaiand fang zengpeng Mulilevel Inverters: A Survey of topologies controls and applications, IEEE transactions on industrial electronics ,Vol.49,no.4,2002. [9] Shimi S.L, Dr. Thilak Thakur, Dr. Jagdish Kumar, Dr. S Chatterji and Dnyaneshwar Karanjkar, ANFIS Controller for Solar Powered Cascade Multilevel Inverter, International Journal of Electrical Engineering & Technology (IJEET), Volume 3, Issue 3, 2012, pp. 234 - 240, ISSN Print : 0976-6545, ISSN Online: 0976-6553. [10] Vishal Rathore and Dr. Manisha Dubey, Speed Control Of Asynchronous Motor Using Space Vector PWM Technique International Journal of Electrical Engineering & Technology (IJEET), Volume 3, Issue 3, 2012, pp. 222 - 233, ISSN Print : 0976-6545, ISSN Online: 0976-6553.

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