1

Inverters for AC Motor Drives....................................................................................................1 Variable-frequency converter classifications..........................................................................1 Voltage source inverters..........................................................................................................3 Variable-frequency PWM-VSI drives.................................................................................3 Variable-frequency square-wave VSI drives......................................................................8 Current source inverters..........................................................................................................9 Variable-frequency CSI drives............................................................................................9 Modulation techniques..........................................................................................................11 PWM with Bipolar Voltage Switching.............................................................................11 PWM with Unipolar Voltage Switching...........................................................................14 Square-Wave Operation....................................................................................................17

Inverters for AC Motor Drives

Variable-frequency converter classifications

The variable-frequency converters, which act as an interface between the utility power system and the induction motor, must satisfy the following basic requirements: 1. Ability to adjust the frequency according to the desired output speed 2. Ability to adjust the output voltage so as to maintain a constant air gap flux in the constant-torque region 3. Ability to supply a rated current on a continuous basis at any frequency Except for a few special cases of very high power applications where cycloconverters are used, variable-frequency drives employ inverters with a dc input. Figure 14-17 illustrates the basic concept where the utility input is converted into dc by means of either a controlled or an uncontrolled rectifier and then inverted to provide three phase voltages and currents to the motor, adjustable in magnitude and frequency.

Fig. 14.17 Variable-frequency converter These converters can be classified based on the type of rectifier and inverter used in Fig. 14-17: 1. Pulse-width-modulated voltage source inverter (PWM-VSI) with a diode rectifier

2 2. Square-wave voltage source inverter (square-wave VSI) with a thyristor rectifier 3. Current source inverter (CSI) with a thyristor rectifier As the names imply, the basic difference between the VSI and the CSI is the following: In the VSI, the dc input appears as a dc voltage source (ideally with no internal impedance) to the inverter. On the other hand, in the CSI, the dc input appears as a dc current source (ideally with the internal impedance approaching infinity) to the inverter.

Fig. 14.18 Classification of variable-frequency converters: (a) PWM-VSI with diode rectifier; (b) square-wave VSI with a controlled rectifier; (c) CSI with a controlled rectifier. Figure 14-18a shows the schematic of a PWM-VSI with a diode rectifier. In the square-wave VSI of Fig. 14-18b, a controlled rectifier is used at the front end and the inverter operates in a square-wave mode (also called the six-step). The line voltage may be single phase or three

3 phase. In both VSI controllers, a large dc bus capacitor is used to make the input to the inverter appear as a voltage source with a very small internal impedance at the inverter switching frequency. It should be noted that, in practice, only three-phase motors are controlled by means of variable frequency. Therefore, only the dc-to-three-phase-ac inverters are applicable here. The main emphasis in this chapter will be on the interaction of VSIs with induction motor type of loads. Figure 14-18c shows the schematic of a CSI drive where a line-voltage-commutated controlled converter is used at the front end. Because of a large inductor in the dc link, the input to the inverter appears as a dc current source. The inverter utilizes thyristors, diodes, and capacitors for forced commutation. Voltage source inverters Variable-frequency PWM-VSI drives

Figure 14-19a shows the schematic of a PWM-VSI drive, assuming a three-phase utility input. A PWM inverter controls both the frequency and the magnitude of the voltage output. Therefore, at the input, an uncontrolled diode bridge rectifier is generally used. One possible method of generating the inverter switch control signals is by comparing three sinusoidal control voltages (at the desired output frequency and proportional to the output voltage magnitude) with a triangular waveform at a selected switching frequency, as shown in Fig. 14-19b.

Fig. 14.19 PWM-VSI: (a) schematic; (b) waveforms. In a PWM inverter, the harmonics in the output voltage appear as sidebands of the switching frequency and its multiples. Therefore, a high switching frequency results in an essentially sinusoidal current (plus a superimposed small ripple at a high frequency) in the motor. Since the ripple current through the dc bus capacitor is at the switching frequency, the input dc source impedance seen by the inverter would be smaller at higher switching frequencies. Therefore, a small value of capacitance suffices in PWM inverters, but this capacitor must be able to carry the ripple current. A small capacitance across the diode rectifier also results in a better input current waveform drawn from the utility source. However, care should be taken in not letting the voltage ripple in the dc bus voltage become too large, which would cause additional harmonics in the voltage applied to the motor. Impact of PWM-VSI Harmonics In a PWM inverter output voltage, since the harmonics are at a high frequency, the ripple in the motor current is usually small due to high leakage reactances at these frequencies. Since these high-frequency voltage harmonics can have as high or even higher amplitude compared to the fundamental-frequency component, the iron losses (eddy current and hysteresis in the stator and the rotor iron) dominate. In fact, the total losses due to harmonics may even be

5 higher with a PWM inverter than with a square-wave inverter. This comparison would of course depend on the motor design class, magnetic material property, and switching frequency. Because of these additional harmonic losses, it is generally recommended that a standard motor with a 5- 10% higher power rating be used. In a PWM drive, the pulsating torques developed are small in amplitude and are at high frequencies (compared to the fundamental). Therefore, as shown in Eq. 14-49, they produce little speed pulsations because of the motor inertia. Input Power Factor and current waveform The input ac current drawn by the rectifier of a PWM-VSI drive contains a large amount of harmonics. Its waveform is shown in Fig. 14-l9b for a single-phase and a three-phase input. The input inductance LS improves the input ac current waveform somewhat. Also, a small dclink capacitance will result in a better waveform. The power factor at which the drive operates from the utility system is essentially independent of the motor power factor and the drive speed. It is only a slight function of the load power, improving slightly at a higher power. The displacement power factor (DPF) is approximately 100%, as can be observed from the input current waveforms of Fig. 14-19b. Electromagnetic braking The power How during electromagnetic braking is from the motor to the variable-frequency controller. During braking, the voltage polarity across the dc-bus capacitor remains the same as in the motoring mode. Therefore, the direction of the dc bus current to the inverter gets reversed. Since the current direction through the diode rectifier bridge normally used in PWM-VSI drives cannot reverse, some mechanism must be implemented to handle this energy during braking; otherwise the dc-bus voltage can reach destructive levels. One way to accomplish this goal is to switch on a resistor in parallel with the dc-bus capacitor, as is shown in Fig. 14-20a, if the capacitor voltage exceeds a preset level, in order to dissipate the braking energy.

Fig 14.20 Electromagnetic braking in PWM-VSI: (a) dissipative braking; (b) regenerative braking. An energy-efficient technique is to use a four-quadrant converter (switch-mode or a back-toback connected thyristor converter) at the front end in place of the diode bridge rectifier. This would allow the energy recovered from the motor-load inertia to be fed back to the utility supply, as shown in Fig. 14-20b, since the current through the four-quadrant converter used for interfacing with the utility source can reverse in direction. This is called regenerative braking since the recovered energy is not wasted. The decision to employ regenerative braking over dissipative braking depends on the additional equipment cost versus the savings on energy recovered and the desirability of sinusoidal currents and unity power factor operation from the utility source. Adjustable-speed control of PWM-VSI drives In VSI drives (both PWM and square-wave type), the speed can be controlled without a speed feedback loop, where there may be a slower acting feedback loop through the processor controller. Figure 14-21 shows such a control. The frequency of the inverter output voltages is controlled by the input speed reference signal ref. The input command ref is modified for protection and improved performance, as will be discussed shortly, and the required control inputs (s or f and Vs signals) to the PWM controller in Fig. 14-21 are calculated. The PWM controller can be realized by analog components, as indicated by Fig. 14-19b. The control signals (e.g., va,control) can be calculated from the f and Vs signals and by knowing Vd and Vtri. Fig. 14.21 Speed control circuit. Motor speed is not measured. A synchronous PWM must be used. This requires that the switching frequency vary in proportion to f. To keep the switching frequency close to its maximum value, there are jumps in mf and, hence, in fs as f decreases, as shown in Fig. 14-22. To prevent jittering at frequencies where jumps occur, a hysteresis must be provided. Digital ICs such as HEF5752V

7 are commercially available that incorporate many of the functions of the PWM controller described earlier.

Fig. 14.22 Switching frequency versus the fundamental frequency. For protection and better speed accuracy, current and voltage feedback may be employed. These signals are required anyway for starting/stopping of the drive, to limit the maximum current through the drive during acceleration/deceleration or under heavy load conditions, and to limit the maximum dc link voltage during braking of the induction motor. Because of slip, the induction motor operates at a speed lower than the synchronous speed. It is possible to approximately compensate for this slip speed, which increases with torque, without measuring the actual speed. Moreover, a voltage boost is required at lower speeds. To meet these objectives, the motor currents and the dc link voltage Vd across the capacitor are measured. To represent the instantaneous three-phase ac motor currents, a current io at the inverter input, as shown in Fig. 14-21, is measured. The following control options are described: 1. Speed control circuit. As shown in Fig. 14-21, a speed control circuit accepts the speed reference signal r,ref as the input that controls the frequency of the inverter output voltages. By the ramp limiter, the maximum acceleration/deceleration rates can be specified by the user through potentiometers that adjust the rate-of-change allowed to the speed reference signal. During the acceleration/deceleration condition, it is necessary to keep the motor current io and the dc-bus voltage Vd within limits. If the speed regulation is to be improved, to be more independent of the load torque, it also accepts an input from the slip compensation subcircuit, as shown in Fig. 14-21 and explained in item 3 below. 2. Current-limiting circuit. A current-limiting circuit is necessary if a speed ramp limiter as in Fig. 14-21 is not used. In the motoring mode, if s is increased too fast compared to the motor speed, then sl and, hence, io would increase. To limit the maximum rate of acceleration so that the motor current stays below the current limit, the actual motor current is compared with the current limit, and the error, through a controller, acts on the speed control circuit by reducing the acceleration rate (i.e., by reducing ms).

8 In the braking mode, if s is reduced too fast, the negative slip would become large in magnitude and would result in a large braking current through the motor and the inverter. To restrict this current to the current limit during the braking, the actual current is compared with the current limit, and the error, fed through a controller, acts on the speed control circuit by decreasing the deceleration rate (i.e. , by increasing s). During braking, the dc-bus capacitor voltage must be kept within a maximum limit. If there is no regenerative braking, a dissipation resistor is switched on in parallel with the dc-bus capacitor to provide a dynamic braking capability. If the energy recovered is larger than that lost through various losses, the capacitor voltage could become excessive. Therefore, if the voltage limit is exceeded, the control circuit decreases the deceleration rate (by increasing s). 3. Compensation for slip. To keep the rotor speed constant, a term must be added to the applied stator frequency, which is proportional to the motor torque Tem, as can be seen from Fig. 14-6: s = r,ref + k18Tem (14-50) The second term in Eq. 14-50 is calculated by the slip compensation block of Fig. 14-21 . One option is to estimate Tem. This can be done by measuring the dc power to the motor and subtracting the losses in the inverter and in the stator of the motor to get the air-gap power Pag. From Eqs. 14-3 and 14-18c, Tem can be calculated. 4. Voltage boost. To keep the air gap flux ag constant, the motor voltage must be (as found by combining Eqs. 14-38b and 14-25) Vs = k19s + k20Tem (14-51) Using Tem as calculated in item 3 above and knowing mf, the required voltage can be calculated from Eq. 14-51. This provides the necessary voltage boost in Fig. 14-21. It should be noted that, if needed, the speed can be precisely controlled by measuring the actual speed and thereby using the actual slip in the block diagram of Fig. 14-21. By knowing the slip, the actual torque can be calculated from Eq. 14-27, thereby allowing the voltage boost to be calculated more accurately. Variable-frequency square-wave VSI drives The schematic of such a drive was shown in Fig. 14-18b. The inverter operates in a squarewave mode, which results in phase-to-motor-neutral voltage, as shown in Fig. 14-24a. With the square-wave inverter operation each inverter switch is on for 180 and a total of three switches are on at any instant of time. The resulting motor current waveform is also shown in Fig. 14-24b. Because of the inverter operating in a square-wave mode, the magnitude of the motor voltages is controlled by controlling Vd in Fig. 14-18b by means of a line-frequency phase-controlled converter. Voltage harmonics in the inverter output decrease as V1/h with h = 5, 6, 11, 13, . . ., where V, is the fundamental-frequency phase-to-neutral voltage. Because of substantial magnitudes of low-order harmonics, harmonic currents calculated from Eq. 14-47 are significant. These harmonic currents result in large torque ripple, which can produce troublesome speed ripple at low operating speeds.

Fig. 14.24 Square-wave VSI waveforms Assuming a continuously flowing current through the rectifier, and for simplicity, ignoring the line-side inductances, Vd = 1.35 VLL cos (14-52) where VLL is the line-line rms line voltage. From Eq. 8-58, the motor line-line voltage for a given Vd is VLLmotor = 0.78Vd (14-53) From Eqs. 14-52 and 14-53, VLL1motor = 1,05VLLcos = VLLcos (14-54) which shows that the maximum line-line fundamental-frequency motor voltage (at = 0) is approximately equal to VLL. Note that the same maximum motor voltage (equal to the line voltage) can be approached in PWM-VSI drives only by overmodulation. Therefore, in both PWM and square-wave VSI drives, the maximum available motor voltage in Fig. 14-12b is approximately equal to the line voltage. This allows the use of standard 60-Hz motors, since the inverter is able to supply the rated voltage of the motor at its rated frequency of 60 Hz. In a square-wave drive, from Eq. 14-54 and assuming Vs/f to be constant. r/r,rated=VLL1motor/VLL=cos (14-55) From Eqs. 6-47a and 14-55, the drive operates at the following power factor from the line (assuming that a sufficiently large filter inductor is present in Fig. 14-18b at the rectifier output): Line power factor ~ 0.955 cos ~ 0.955 r/r.rated(14-56) which shows that the line power factor at the rated speed is better than that of an induction motor supplied directly by the line. At low speed, however, the line power factor of a squarewave drive can become quite low, as seen from Eq. 14-56. This can be remedied by replacing the thyristor rectifier by a diode rectifier bridge in combination with a step-down dc-dc converter. Current source inverters Variable-frequency CSI drives Figure 14-18c shows the schematic of a CSI drive. Basically it consists of a phase-controlled rectifier, a large inductor, and a dc-to-ac inverter. A large inductor is used in the dc link, which makes the input appear as a current source to the inverter. Since the induction motor operates at a lagging power factor, circuits for forced commutation of the inverter thyristors are needed, as shown in Fig. 14-25a. These forced-commutation

10 circuits consist of diodes, capacitors, and the motor leakage inductances. This requires that the inverter be used with the specific motor for which it is designed. At any time, only two thyristors conduct: one of the thyristors connected to the positive dc bus and the other connected to the negative dc bus. The motor current and the resulting phase voltage waveform are shown in Fig. 14-25b. In a CSI drive, the regenerative braking can be easily provided without any additional circuits.

Fig. 14.25 CSI drive: (a) inverter; (b) idealized phase waveforms. In the past, the fact that line-frequency thyristors with simple commutation circuits act as the inverter switches was a very important asset of CSI drives. With the availability of controllable switches in ever-increasing power ratings, nowadays CSI drives are used mostly in very large horsepower applications.

11 Modulation techniques PWM with Bipolar Voltage Switching Here the diagonally opposite switches (TA+, TB-) and (TA-, TB+) from the two legs in Fig. 8-11 are switched as switch pairs 1 and 2, respectively. With this type of PWM switching, the output voltage waveform of leg A is determined by comparison of vcontrol and vtri in Fig. 8-12a.

Fig. 8.11 Single-phase full-bridge inverter. The output of inverter leg B is negative of the leg A output; for example, when TA+ is on and vAo is equal to + Vd , TB- is also on and vBo = Vd . Therefore vBo(t) = -vAo(t) (8-17) and vo(t) = vAo(t) - vBo(t) = 2vAo(t)
1 2 1 2

(8-18)

Fig. 8-12 PWM with bipolar voltage switching.

12 The vo waveform is shown in Fig. 8-12b. The peak of the fundamental-frequency component o1 ) is in the output voltage (V o1 = maVd V ( ma 1.0) (8-19) and
o1 < Vd < V

In Fig. 8-12b, we observe that the output voltage vo switches between -Vd and + Vd voltage levels. That is the reason why this type of switching is called a PWM with bipolar voltage switching. The amplitudes of harmonics in the output voltage can be obtained by using Table 8-l.

4 Vd

( ma > 1.0)

(8-20)

Table 8.1 Generalized Harmonics of vAo for large mf. dc-Side Current id. It is informative to look at the dc-side current id in the PWM bipolar voltage-switching scheme. For simplicity, fictitious L-C high-frequency filters will be used at the dc side as well as at the ac side, as shown in Fig. 8-13. The switching frequency is assumed to be very high, approaching infinity. Therefore, to filter out the high-switching-frequency components in vo and id, the filter components L and C required in both ac- and dc-side filters approach zero. This implies that the energy stored in the filters is negligible. Since the converter itself has no energy storage elements, the instantaneous power input must equal the instantaneous power output.

13

Fig. 8.13 Inverter with fictitious filters. With these assumptions, vo in Fig. 8-13 is a pure sine wave at the fundamental output frequency 1, vo1 = vo = 2Vo sin (8-22) 1t If the load is as shown in Fig. 8-13, where eo is a sine wave at frequency 1, then the output current would also be sinusoidal and would lag vo for an inductive load such as an ac motor: io = 2 I o sin( (8-23) 1t ) where is the angle by which io lags vo. On the dc side, the L-C filler will filter the high-switching-frequency components id, and id would only consist of the low-frequency and dc components. Assuming that no energy is stored in the filters, * Vd id (t ) = vo (t )io (t ) = 2Vo sin 2 I o sin( (8-24) 1t 1t ) Therefore V I V I * id (t ) = o o cos o o cos( 21t ) = I d + id 2 (8-25) Vd Vd
= I d 2 I d 2 cos(2 1t )

(8-26)

where V I I d = o o cos (8-27) Vd and 1 Vo I o Id2 = (8-28) 2 Vd Equation 8-26 for id shows that it consists of a dc component Id, which is responsible for the power transfer from Vd on the dc side of the inverter to the ac side. Also, id* contains a sinusoidal component at twice the fundamental frequency. The inverter input current id consists of id* and the high-frequency components due to inverter switchings, as shown in Fig. 8-14.

14

Fig. 8-14 The dc-side current in a single-phase inverter with PWM bipolar voltage switching. In practical systems, the previous assumption of a constant dc voltage as the input to the inverter is not entirely valid. Normally, this dc voltage is obtained by rectifying the ac utility line voltage. A large capacitor is used across the rectifier output terminals to filter the dc voltage. The ripple in the capacitor voltage, which is also the dc input voltage to the inverter, is due to two reasons: (1) The rectification of the line voltage to produce dc does not result in a pure dc as discussed in dealing with the line-frequency rectifiers. (2) As shown earlier by Eq. 8-26, the current drawn by a single-phase inverter from the dc side is not a constant dc but has a second harmonic component (of the fundamental frequency at the inverter output) in addition to the high-switching-frequency components. The second harmonic current component results in a ripple in the capacitor voltage, although the voltage ripple due to the high switching frequencies is essentially negligible. PWM with Unipolar Voltage Switching In PWM with unipolar voltage switching, the switches in the two legs of the full-bridge inverter of Fig. 8-11 are not switched simultaneously, as in the previous PWM scheme. Here, the legs A and B of the full-bridge inverter are controlled separately by comparing vtri with vcontrol and vcontrol, respectively. As shown in Fig. 8-15a, the comparison of vcontrol with the triangular waveform results in the following logic signals to control the switches in leg A: vcontrol>vtri: TA+ on and vAN=Vd (8-29) vcontrol<vtri: TA- on and vAN=0 The output voltage of inverter leg A with respect to the negative dc bus N is shown in Fig. 815b. For controlling the leg B switches, -vcontrol is compared with the same triangular waveform, which yields the following: -vcontrol>vtri: TB+ on and vBN=Vd (8-30)

15 -vcontrol<vtri: TB- on and vBN=0

Fig. 8.15 PWM with unipolar voltage switching (single phase). Because of the feedback diodes in antiparallel with the switches, the foregoing voltages given by Eqs. 8-29 and 8-30 are independent of the direction of the output current io.

16 The waveforms of Fig. 8-15 show that there are four combinations of switch on-states and the corresponding voltage levels: 1. TA+, TB- on: vAN=Vd, vBN=0; vo=Vd 2. TA-, TB+ on: vAN=0, vBN= Vd; vo=-Vd 3. TA+, TB- on: vAN=Vd, vBN= Vd; vo=0 4. TA-, TB+ on: vAN=0, vBN=0; vo=0 We notice that when both the upper switches are on, the output voltage is zero. The output current circulates in a loop through TA+ and DB+ or DA+ and TB+ depending on the direction of io. During this interval, the input current id is zero. A similar condition occurs when both bottom switches TA- and TB- are on. In this type of PWM scheme, when a switching occurs, the output voltage changes between zero and +Vd or between zero and Vd voltage levels. For this reason, this type of PWM scheme is called PWM with a unipolar voltage switching, as opposed to the PWM with bipolar (between +Vd and -Vd) voltage-switching scheme described earlier. This scheme has the advantage of effectively doubling the switching frequency as far as the output harmonics are concerned, compared to the bipolar voltage-switching scheme. Also, the voltage jumps in the output voltage at each switching are reduced to Vd, as compared to 2Vd in the previous scheme. The advantage of effectively doubling the switching frequency appears in the harmonic spectrum of the output voltage waveform, where the lowest harmonics (in the idealized circuit) appear as sidebands of twice the switching frequency. It is easy to understand this if we choose the frequency modulation ratio mf to be even (mf should be odd for PWM with bipolar voltage switching) in a single-phase inverter. The voltage waveforms vAN and vBN are displaced by 180 of the fundamental frequency f1 with respect to each other. Therefore, the harmonic components at the switching frequency in vAN and vBN have the same phase (ANBN = 180 m f = 0, since the waveforms are 180 displaced and mf is assumed to be even). This results in the cancellation of the harmonic component at the switching frequency in the output voltage vo = vAN vBN. In addition, the sidebands of the switching-frequency harmonics disappear. In a similar manner, the other dominant harmonic at twice the switching frequency cancels out, while its sidebands do not. Here also o1 = maVd V ( ma 1.0) (8-32) and
o1 < Vd < V 4

Vd

(ma > 1.0)

(8-33)

dc-Side Current id. Under conditions similar to those in the circuit of Fig. 8-13 for the PWM with bipolar voltage switching, Fig. 8-16 shows the dc-side current id for the PWM unipolar voltage-switching scheme, where mf = 14 (instead of mf = 15 for the bipolar voltage switching).

17

Fig. 8.16 The dc-side current in a single-phase inverter with PWM unipolar voltage switching. By comparing Figs. 8-14 and 8-16, it is clear that using PWM with unipolar voltage switching results in a smaller ripple in the current on the dc side of the inverter. Square-Wave Operation

The full-bridge inverter can also be operated in a square-wave mode. Both types of PWM discussed earlier degenerate into the same square-wave mode of operation, where the switches (TA+, TB-) and (TB+, TA-) are operated as two pairs with a duty ratio of 0.5. As is the case in the square-wave mode of operation, the output voltage magnitude given below is regulated by controlling the input dc voltage:
o1 = 4 Vd V

(8-36)