TDA9556

7.5 NS TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER

PRODUCT PREVIEW

FEATURES
s s s

s s s s s s s

Triple-channel video amplifier Pinning for easy PCB layout Supports DC coupling (optimum cost saving) and AC coupling applications. Built-in Voltage Gain: 19.3 (Typ.) Rise and Fall Times: 7.5ns (Typ.) Bandwidth: 50MHz (Typ.) Very low stand-by power consumption 80V Output dynamic range Supply voltage: 110V Perfectly matched with the TDA9210 preamplifier

CLIPWATT 11 (Plastic Package) ORDER CODE: TDA9556

DESCRIPTION
The TDA9556 is a triple-channel video amplifier designed in BCD technology (Bipolar/CMOS/ DMOS) able to drive the 3 cathodes of a CRT monitor. Perfectly matched with the ST Preamplifier TDA9210, it provides a high performance, and very cost effective DC coupling system.

PIN CONNECTIONS
11 10 9 8 7 6 5 4 3 2 1 OUT1 OUT2 OUT3 GNDP VDD GNDS GNDA IN3 VCC IN2 IN1

Version 2.0
October 2000 1/16

Table of Contents
1 2 3 4 5 6 BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 - General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 4 4 5 7 7

6.2 - How to choose the high supply voltage value (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.3 - Amplifier gain and cut-off adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 ARCING PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 VIDEO RESPONSE OPTIMIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.1 Supply decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.2 - Tracks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.3 - Network adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 TYPICAL PERFORMANCE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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TDA9556

1 BLOCK DIAGRAM
OUT1 GNDP 8 11 OUT2 10 OUT3 9

TDA9556
VDD VDD 7 GNDP VDD GNDP

VCC 3
VREF

6 GNDS

5 IN1 GNDA

2 IN2

4 IN3

2 PIN CONNECTIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 Name IN1 IN2 VCC IN3 GNDA GNDS VDD GNDP OUT3 OUT2 OUT1 Video Input-channel 1 Video Input-channel 2 Low Supply Voltage Video Input-channel 3 Ground Analogic (signal) Ground Substrate High Supply Voltage Ground Power Output-channel 3 Output-channel 2 Output-channel 1 Function

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TDA9556

3 ABSOLUTE MAXIMUM RATINGS

Symbol VDD VCC VESD IOD I OG VIN Max VIN Min TJ TSTG High supply voltage Low supply voltage ESD susceptibility Human Body Model (100pF discharged through 1.5K) EIAJ norm (200pF discharged through 0) Output source current (pulsed < 50s) Output sink current (pulsed < 50s) Maximum Input Voltage Minimum Input Voltage Junction Temperature Storage Temperature Parameter Value 120 17 2 300 80 80 15 - 0.5 150 -20 + 150 Unit V V kV V mA mA V V C C

4 THERMAL DATA
Symbol Rth (j-c) R th (j-a) Parameter Junction-Case Thermal Resistance (Max.) Junction-Ambient Thermal Resistance (Typ.) Value 3 35 Unit C/W C/W

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TDA9556

5 ELECTRICAL CHARACTERISTICS

Symbol

Parameter

Test Conditions

Min.

Typ 110 12 25 60 60 0.5 15 5 2

VDD - 6.5

Max 115 15

Unit V V mA A mA % mV/ C mV/ C k V V

SUPPLY parameters (VCC = 12V, VDD = 110V, Tamb = 25 C, unless otherwise specified) High supply voltage 20 VDD VCC IDD IDDS ICC dVOUT/dVDD dV OUT/dT dV OUT/dT R IN V SATH VSATL VG LE VREF Low supply voltage V DD supply current V DD stand-by supply current V CC supply current High Voltage supply rejection Output Voltage drift versus temperature Output voltage matching versus temperature (Note 2) Video Input Resistor Output Saturation Voltage to Supply Output Saturation Voltage to GND Video Gain Linearity Error Internal Voltage Reference VOUT = 50V VCC : switched off (<1.5V) VOUT: low (Note 1) VOUT = 50V VOUT = 50V VOUT = 80V VOUT = 80V VOUT = 50V I0 =-60mA (Note 3) I0 =60mA (Note 3) VOUT = 50V 17<V OUT<VDD-15V 10

STATIC parameters (VCC = 12V, VDD = 110V, Tamb = 25 C)

11 19.3 5 5.5 8

% V

Note 1: The TDA 9556 goes into stand-by mode when Vcc is switched off (<1.5V). In stand-by mode, Vout is set to low level. Note 2: Matching measured between each channel. Note 3: Pulsed current width < 50s

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TDA9556

ELECTRICAL CHARACTERISTICS (continued)

Symbol OS1 OS2 VG BW tR tF tSET CTL CTH

Parameter Overshoot, White to Black transition Overshoot, Black to White transition Low frequency gain matching (Note 4) Bandwidth at -3dB Rise time Fall time 2.5% Settling time Low frequency Crosstalk High frequency Crosstalk

Test Conditions

Min.

Typ 5 1

Max

Unit % %

DYNAMIC parameters (see Figure 1 )

VDC = 50V, f=1MHz VDC=50V, V=20V PP VDC=50V, V=40V PP VDC=50V, V=40V PP VDC=50V, V=40V PP VDC=50V,V=20VPP f = 1 MHz VDC=50V,V=20VPP f = 20MHz 50 7.2 7.9 15 50 32

% MHz ns ns ns dB dB

Note 4: Matching measured between each channel.

Figure 1. AC test circuit

12V VCC 75
1

110V VDD
VDC V

TDA9556

OUT
11
VREF

RP = 200

IN

CL=8pF GND

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TDA9556

6 THEORY OF OPERATION
6.1 - General The TDA9556 is a three-channel video amplifier supplied by a low supply voltage: VCC (typ.12V) and a high supply voltage: VDD (up to 115V). The high values of VDD supplying the amplifier output stage allow direct control of the CRT cathodes (DC coupling mode). In DC coupling mode, the application schematic is very simple and only a few external components are needed to drive the cathodes. In particular, Figure 2. Output signal, level adjustments
V DD 15V (A) Top Non-Lin ear Region (B) Cut-off Adjust. (25V Typ.) (C) Brightness Adjust. (10V Typ.) Linear region Blanking pulse (D) Contrast Adjust. (40V Typ.) Video Signal

there is no need of the DC-restore circuitry which is used in classical AC coupling applications. The output voltage range is wide enough (Figure 2) to provide simultaneously : Cut-off adjustment (typ. 25V) Video contrast (typ. up to 40V), Brightness (with the remaining voltage range). In normal operation, the output video signal must remain inside the linear region whatever the cutoff / brightness / contrast adjustment is.

17V GND

(E) Bottom Non-Linear Region

6.2 - How to choose the high supply voltage value (VDD) The VDD high supply voltage must be chosen carefully. It must be high enough to provide the necessary video adjustment but set to minimum value to avoid unecessary power dissipation. Example: The following example shows how the optimum VDD voltage value is determined: Cut-off adjustment range (B) : 25V Max contrast (D) : 40V Case 1: 10V Brightness (C) adjusted by the preamplifier : VDD = A + B + C + D + E VDD = 15V + 25V + 10V + 40V + 17V = 107V Case 2: 10V Brightness (C) adjusted by the G1 anode: VDD = A + B + D + E VDD = 15V + 25V + 40V + 17V = 97V

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TDA9556
6.3 - Amplifier gain and cut-off adjustment A very simplified schematic of each TDA9556 channel is shown in Figure 3. The feedback net of each channel is integrated with a built-in voltage gain of 19.3 (40k/2k). Figure 3. Simplified schematic of one channel
VDD 40k 2k IN VREF

The output voltage VOUT is given by the following formula: VOUT = (VG+1) x VREF - (VG x VIN) for VG = 19.3 and VREF = 5.5V, we have VOUT = 111.6 - 19.3 x VIN

OUT

GND

7 ARCING PROTECTION
As the amplifier outputs are connected to the CRT cathodes, special attention must be given to portect them against possible arcing inside the CRT. Protection must be considered when starting the design of the video CRT board. It should always be implemented before starting to adjust the dynamic video response of the system. Figure 4. Arcing protection network (one channel)
R19 33 C24 4.7F/150V High Voltage (90-110V)

The arcing network that we recommend (see Figure 4) provides efficient protection without deteriorating the amplifier video performances. The total resistance value between the amplifier and the CRT cathode (R10+R11) should not be less than 300 . Spark gap diodes are strongly recommended for protection against arcing.

VDD

C12 (*) 100nF/250V

C18 100nF D12 FDH400 R11 150/0.5W F1 Spark gap

R10 TDA9556 OUT 150/0.5W

L1 0.39H

GND

R29 10

(*): To be connected as close as possible to the device.

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TDA9556

8 VIDEO RESPONSE OPTIMIZATION

The dynamic video response is optimized by carefully designing the supply decoupling of the video board (see Section 8.1), the tracks (see Section 8.2), then by adjusting the input/output component network (see Section 8.3). For dynamic measurements such as rise/fall time and bandwidth, a 8pF load is used (total load including the parasitic capacitance of the PC board and CRT Socket).

Figure 5. Video response optimization for one channel

C11 4.7F VCC

C10(*) 100nF

C12(*) 100nF VDD

C24 4.7 F

R20 TDA9210 15/50 IN VREF TDA9556 GNDS (*): To be connected as close as possible to the device GND +

CRT R10 OUT 150 L1 0.39H R11 150

8.1 Supply decoupling The decoupling of VCC and VDD through good quality HF capacitors (respectively C10 and C12) close to the device is necessary to improve the dynamic performance of the video signal. 8.2 - Tracks Careful attention has to be given to the three output channels of the amplifier. Capacitor: The parasitic capacitive load on the amplifier outputs must be as small as possible. Figure 11 clearly shows the deterioration of the tR/tF when the capacitive load increases. Reducing this capacitive load is achieved moving away the output tracks from the other tracks (especially ground) and by using thin tracks (<0.5mm), see Figure 13. Cross talk: Output and input tracks must be set apart. The TDA9556 pin-out allows the easy separation of input and output tracks on opposite sides of the amplifier (see Figure 13).

Length: Connection between amplifier output and cathode must be as short and direct as possible. 8.3 - Network adjustment Video response is always a compromise between several parameters. An improvement of the rise/ fall time leads to a deterioration of the overshoot. The recommended way to optimize the video response is: 1 To set R10+R11 for arcing protection (min. 300 ) 2. To adjust R20 and R10+R11. Increasing their value increases the tR/tF values and decrease the overshoot 3. To adjust L1 Increasing L1 speeds up the device and increases the overshoot. We recommend our customers to use the schematic shown on Figure 5 as a starting point for the video board and then to apply the optimization they need.

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TDA9556

9 POWER DISSIPATION
The total power dissipation is the sum of the static DC and the dynamic dissipation: PTOT = PSTAT + PDYN. The static DC power dissipation is approximately: PSTAT = VDD x IDD + VCC x ICC The dynamic dissipation is, in the worst case (1 pixel On/ 1 pixel Off pattern): PDYN = 3 VDD x CL x VOUT(PP) x f x K where f is the video frequency and K the ratio between the active line and the total horizontal line duration. Example: for VDD = 110V, VCC = 12V, IDD = 25mA, ICC = 60mA, VOUT = 40 VPP, f = 40MHz, CL = 8pF and K = 0.72. We have: PSTAT = 3.47W, PDYN = 3.04W Therefore: PTOT = 6.51W.
Note 4: This worst thermal case must only be considered for TJmax calculation. Nevertheless, during the average life of the circuit, the conditions are closer to the white picture conditions.

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TDA9556

10 TYPICAL PERFORMANCE CHARACTERISTICS

VDD=110V, VCC=12V, CL=8pF, RP=300, V=40VPP, unless otherwise specified - see Figure 1 Figure 6. TDA9556 pulse response Figure 7. VOUT versus VIN
120 100 80

Vout (V)

60 40 20 0 0 1 2 3 4 5 6

Vin (V)

Figure 8. Power dissipation versus frequency

12 Total Power Dissipation (W)

Figure 9. Speed versus temperature

8.5

10 8

8.3 8.1 7.9 Speed (ns) 7.7 7.5 7.3 7.1 6.9 6.7
10 20 30 40 Square Wave Frequency (MHz) (72% Active Time) 50

6 4 2 0

tf

tr

6.5 60 70 80 90 100 110 Cas e Temperature (C) 120

Figure 10. Speed versus offset

10 9.5 9 8.5 Speed (ns)

Figure 11. Speed versus load capacitance

10 9.5 9 Speed (ns) Rp = 100 Ohms

8 7.5 7 6.5 6 5.5 5 40 45

tf

8.5 8 7.5 7 6.5 6 8 12

tf

tr

tr

50 55 60 Offset Voltage (Vdc)

65

70

16

20

Load Capacitance (MHz)

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TDA9556
Figure 12. TDA9210 - TDA9556 - STV9935 Demonstration Board: Silk Screen and Trace

Figure 13. Amplifier and Preamplifier Outputs. Trace Routing (detail)

Note that the amplifier outputs are well separated from the ground area while the amplifier inputs are surrounding by the ground

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A
C

R2 0 1 00R R1 C1
1 10 V

Hs Out

100R

R 18 100R

Vs Out 5V C26 100pF 10nF / 250V R11 C8 C7 110V 3 7 D2 FDH40 0 11 0.22uH 110V U2 D7 L2 R14 180R 0.22uH L1 R6 1 80R
R 7 18 0 R

BLK 8V 12V
C 18

R25 100R 100pF R26 C10 4.7uF / 15 0V 39R

5V
R4

J1 1N 4148
R 2 15 R

D1 2R 7 C3 1 IN1 Vcc Vdd ABL IN2 R29 4 GNDL IN3 G N DA VCCA OUT3 5V 13 R2 4 4 In 3 Ou t 3 GNDS GNDP GNDA 9 R2 1 2K7 SCL 5 6 8 10 OSD3
TDA9 210 1 00pF
5V

U1 47uF 100n F

2R7

R ed

10 0 nF BLK HS OUT1 In 1 Ou t 1 VCCP C24 4.7nF R13

1 00nF

20 19 C23 4. 7n F R9 1 33R RK 18 17 1K6 16 R30 2 In 2 Ou t 2 10 C25 4.7 n F R17 R1 9 2K7 L3 0.22uH 1K6 33 R 1K6 C5 15 14 33 R

R3 1N 4148 C4 1 N414 8 R8 15 R 3
C9
5V

D3
D4

75 R 100nF 100nF

Green
D5 1 N414 8

Blue D6 1N 4148 C6 5 OUT2 GNDP 6 7 8 OSD1 OSD2 FBLK C13

5V

12 11 10 9 8 7 6 5 4 3 2 1 10 0nF C22 100nF R12 15 R

R5 7 5R

TDA9556

Video D8 1N 4148 R16 2R 7 5V

FDH40 0 R1 5 18 0R 110V D9

GK
3

R10 75 R

C30 SCA SCL 11 12

C29

Hfly

100pF 16 9 Ir ef Filter AVdd 5V J10 R32 1K SDA R33 1K R34 1K 100pF 12V
C17 47uF

100pF U3 AGND Ire f Filter AVdd FBl k Bo ut Gout C1 2 I2C J9 1 2

C16 47uF
11 0V 5V

R 22 1 80R

FDH400 R 23

180R

BK

R42 15 14 13 12 11 10 9 L4 1uH 100nF C2

SDA

1K

SDA

SCL

D10

R3 5 100R

SCL

5V1

Vsy nc

R4 1 10 0R

Hfly

BK R28 10R Heater 12 GND J5 11 B

10

5V

L5

1uH

DVdd

C28 100nF

SDA

SCL

DVss

7 Rout

NC

1 2 3 4

H1 H2 R GN D _C R T J7 G2 9 8 7

C14 100n F

F1

C31

C 33

100pF
1 10 V

100pF

OVss

STV9935 8V

RK J8 C19 C21 100n F / 250V GND G1 G 4. 7nF / 2KV

C35

R46

Figure 14. TDA9535/9536 - TDA9210 Demonstration Board Schematic

STO2

G2

F2

GK F4

Ire f J16

R45
C15 47uF

Filter J17 Power

C34

R44

1 2 3 4 5

Heater G1 BLK Vs Out G1

R27

15 0 R 5 C20

C32

4.7 nF / 1kV
1

R43

1 2 3 4 5 6 7 Supply

Title Hs Out Hfly Size A4

AVdd

CRT31 with TDA9210 + TDA9535/36

Do cument Number Vers ion 1.4 Date: Thursday, S ep tembe r 14, 2 00 0 Sheet
C

Rev 1
D E

of

TDA9556

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11 PACKAGE MECHANICAL DATA

11 PIN - CLIPWATT
V

V1 H3 A C V2 V1 V1 V1 L2 L1 L V R3 D R1 R L3 R2 S H2 H1

R3

R3

B lead#1 G F G1

M1

G2

Table 1
Dimensions A B C D E F G G1 H1 H2 H3 L L1 L2 L3 M M1 R 18.55 19.90 17.70 14.35 10.90 5.40 2.34 2.34 1.45 1.30 0.49 0.78 1.60 16.90 Millimeters Min. 2.95 0.95 Typ. 3.00 1.00 0.15 1.50 0.515 0.80 1.70 17.00 12.00 18.60 20.00 17.90 14.55 11.00 5.50 2.54 2.54 18.65 20.10 18.10 14.65 11.10 5.60 2.74 2.74 0.730 0.783 0.696 0.564 0.429 0.212 0.092 0.092 0.057 1.70 0.55 0.88 1.80 17.10 0.051 0.019 0.031 0.063 0.665 Max. 3.05 1.05 Min. 0.116 0.037 Inches Typ. 0.118 0.039 0.006 0.059 0.020 0.033 0.067 0.669 0.472 0.732 0.787 0.704 0.572 0.433 0.216 0.100 0.100 0.734 0.791 (5) 0.712 0.576 0.437(5) 0.220 0.107 0.107 0.066 0.021 0.034 0.071 0.673 Max. 0.120 0.041

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TDA9556
Table 1
Dimensions R1 R2 R3 S V V1 V2 0.65 Millimeters Min. 3.20 Typ. 3.30 0.30 0.50 0.70 10deg. 5deg. 75deg. 0.75 0.025 Max. 3.40 Min. 0.126 Inches Typ. 0.130 0.012 0.019 0.027 10deg. 5deg. 75deg. 0.029 Max. 0.134

Note 5: H3 and L2 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 0.15mm per side.

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this public ation are subject to change witho ut notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics. 2000 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philip s I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philip s. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www .st.com

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