SN74HC08Q1 QUADRUPLE 2INPUT POSITIVEAND GATE

SCLS576B MARCH 2004 REVISED JUNE 2004

D Qualification in Accordance With

AEC-Q100

D OR PW PACKAGE (TOP VIEW)

D Qualified for Automotive Applications D Customer-Specific Configuration Control D D D D D D

Can Be Supported Along With Major-Change Approval Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 40-A Max ICC Typical tpd = 8 ns 4-mA Output Drive at 5 V Low Input Current of 1 A Max

1A 1B 1Y 2A 2B 2Y GND

1 2 3 4 5 6 7

14 13 12 11 10 9 8

VCC 4B 4A 4Y 3B 3A 3Y

Contact factory for details. Q100 qualification data available on request.

description/ordering information
The SN74HC08 device contains four independent 2-input AND gates. They perform the Boolean function Y + A B or Y + A ) B in positive logic. ORDERING INFORMATION
TA 40C to 85C 40C to 125C PACKAGE TSSOP PW SOIC D TSSOP PW Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74HC08IPWRQ1 SN74HC08QDRQ1 SN74HC08QPWRQ1 TOP-SIDE MARKING HC08I HC08Q1

HC08Q1 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A H L X B H X L OUTPUT Y H L L

logic diagram (positive logic)

A B Y

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2004, Texas Instruments Incorporated

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SN74HC08Q1 QUADRUPLE 2INPUT POSITIVEAND GATE

SCLS576B MARCH 2004 REVISED JUNE 2004

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

MIN VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v Low-level input voltage Input voltage Output voltage VCC = 2 V VCC = 4.5 V VCC = 6 V I-suffix device Q-suffix device 40 40 VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 85 125 C ns V V V V NOM 5 MAX 6 UNIT V

High-level input voltage

Input transition rise/fall time

TA

Operating free-air temperature

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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SN74HC08Q1 QUADRUPLE 2INPUT POSITIVEAND GATE

SCLS576B MARCH 2004 REVISED JUNE 2004

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 2V IOH = 20 A VOH VI = VIH or VIL IOH = 4 mA IOH = 5.2 mA IOL = 20 A VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 0.1 0.1 0.1 0.1 0.26 0.26 100 2 10 SN74HC08Q MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1000 40 10 MAX SN74HC08I MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1000 20 10 nA A pF V V MAX UNIT

switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V tpd A or B Y 4.5 V 6V 2V tt Y 4.5 V 6V MIN TA = 25C TYP MAX 50 10 8 38 8 6 100 20 17 75 15 13 SN74HC08Q MIN MAX 150 30 25 110 22 19 SN74HC08I MIN MAX 125 25 21 95 19 16 ns ns UNIT

operating characteristics, TA = 25C

PARAMETER Cpd Power dissipation capacitance per gate TEST CONDITIONS No load TYP 20 UNIT pF

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SN74HC08Q1 QUADRUPLE 2INPUT POSITIVEAND GATE

SCLS576B MARCH 2004 REVISED JUNE 2004

PARAMETER MEASUREMENT INFORMATION

From Output Under Test Test Point CL = 50 pF (see Note A) In-Phase Output Input VCC 50% tPLH 50% 10% tPHL Out-of-Phase Output 90% 50% 10% tf 90% tr Input 50% 10% 90% 90% VCC 50% 10% 0 V tf tPLH 50% 10% 90% tr 50% 0V tPHL 90% VOH 50% 10% VOL tf VOH VOL

LOAD CIRCUIT

tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES

VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time, with one input transition per measurement. D. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999

PW (R-PDSO-G**)
14 PINS SHOWN

PLASTIC SMALL-OUTLINE PACKAGE

0,65 14 8

0,30 0,19

0,10 M

0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0 8 0,75 0,50

Seating Plane 1,20 MAX 0,15 0,05 0,10

PINS ** DIM A MAX

14

16

20

24

28

3,10

5,10

5,10

6,60

7,90

9,80

A MIN

2,90

4,90

4,90

6,40

7,70

9,60

4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153

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