GPS Based Aircraft CoIIision

Avoidance

Author: Adam BehrendorII
Supervisor: Dr Vaughan Clarkson








Department of Information Technologv and Electrical Engineering
The Universitv of Queensland







Submitted Ior the Degree oI
Bachelor oI Engineering (Electrical)
October 2002



ii
Adam BehrendorII
22 Fortune Esp
Caboolture QLD 4510
(07) 54 954861
15
th
October 2002


Head oI School
School oI InIormation Technology
and Electrical Engineering
University oI Queensland
St Lucia QLD 4067



Dear ProIessor Kaplan,

In accordance with the requirements oI Bachelor oI Engineering in the Iield oI
Electrical Engineering, I present the Iollowing thesis entitled 'GPS based AircraIt
Collision Avoidance. This work was perIormed in partnership with Ryan Flux under
the supervision oI Dr Vaughan Clarkson.

I declare that the work oI this thesis is my own, except as acknowledged in the text,
and has not been previously submitted Ior a degree at the University oI Queensland or
any other institution.


Yours sincerely,

Adam BehrendorII
i

A major saIety concern is that many small aircraIt are not equipped with collision
avoidance systems due to their cost. These aircraIt rely solely on visual acquisition to
avoid collisions. This Thesis documents the development oI a small, lightweight and
low cost aircraIt collision avoidance system to improve the saIety level Ior light
aircraIt.

The aim oI this thesis is to implement a system design developed by Owen Crowe and
Jason Thong in 2001. The design developed relies on a GPS receiver to determine
aircraIt`s precise position and to synchronise the systems, a MSP430 microcontroller,
a Compaq iPAQ Ior the display and a TRF6900 transceiver to send and receive data
Irom nearby aircraIt.


ii
Table oI Contents
Abstract ......................................................................................................i
Introduction ..............................................................................................1
1.1 Aim................................................................................................................ 1
1.2 Concept oI Operation..................................................................................... 2
1.3 Goals .............................................................................................................. 2
1.4 Overall System Design .................................................................................. 3
Collision Avoidance Systems and Previous Work Conducted.............4
2.1 TraIIic alert and collision avoidance system (TCAS) ................................... 4
2.1.1 TCAS I ............................................................................................... 4
2.1.2 TCAS II .............................................................................................. 5
2.2 ADS-B Automatic Dependant Surveillance Broadcast .............................. 5
2.3 Previous Work ............................................................................................... 5
2.3.1 Selection of components .................................................................... 5
2.3.2 MSP430 Code.................................................................................... 6
2.3.3 Design and Construction of a Prototvpe Board................................ 6
2.3.4 Installation of Linux on the iPAQ...................................................... 6
2.4 Project Tasks.................................................................................................. 6
System Design ...........................................................................................8
3.1 RF Datalink.................................................................................................... 8
3.1.1 Spectrum Regulations........................................................................ 8
3.1.2 Multiple Access Techniques .............................................................. 9
3.1.3 Frequencv Shift Keving ................................................................... 10
3.1.4 RF Protocol ..................................................................................... 11
3.1.5 RF Datalink Specifications.............................................................. 12
3.2 MSP430 Microcontroller ............................................................................. 13
3.3 TRF6900 ISM band Transceiver ................................................................. 13
3.3.1 Receiver ........................................................................................... 13
3.3.2 Transmitter ...................................................................................... 16
3.4 TRF6900/MSP430 Serial InterIace ............................................................. 17
Software Specifications ..........................................................................18
4.1 The MSP430 Microcontroller SoItware ...................................................... 18
4.1.1 Implementation of RF Transmission ............................................... 18
4.1.2 Implementation of RF Reception..................................................... 19
4.1.3 The Main Program.......................................................................... 21
Hardware Implementation....................................................................23
5.1 Hardware Design ......................................................................................... 23
5.1.1 Loop Filter....................................................................................... 23
5.1.2 Jaractor LC Tank Circuit ............................................................... 24
5.1.3 Clock Circuit ................................................................................... 25
5.1.4 Low Pass Filter Amplifier ............................................................... 25
5.1.5 Demodulator Tank Circuit .............................................................. 26
5.1.6 Impedance Matching....................................................................... 26
5.1.7 Transmission Line design................................................................ 27
5.2 PCB Design.................................................................................................. 28
Results and Evaluation...........................................................................29
iii
6.1 System Evaluation ....................................................................................... 29
6.1.1 RF Datalink ..................................................................................... 29
6.1.2 MSP430 ........................................................................................... 30
6.1.3 TRF6900 hardware and PCB.......................................................... 30
6.2 Further Developments needed Ior completion............................................. 31
Improvements .........................................................................................32
Conclusion...............................................................................................33
Bibliography............................................................................................34
Appendix A..............................................................................................36
Appendix B..............................................................................................42

1
TabIe of Figures
Figure 1. Concept of Operation 2
Figure 2. Svstem Design 3
Figure 3. RF Datalink Management 10
Figure 4. FSK Modulated Output Signal vs Modulating Signal m(t) 10
Figure 5. TRF6900 Receiver Design 13
Figure 6. FSK Demodulator Block Diagram 15
Figure 7. TRF6900 Transmitter Design 16
Figure 8. Block Diagram of TRF6900/MSP430 Serial Interface 17
Figure 9. Flow Chart for SendRF 18
Figure 10. Flow Chart of ReceiveRF 21
Figure 11. Flow Chart for Main Routine 22
Figure 12. Block Diagram of TRF6900 23
Figure 13. Loop Filter Design for TRF6900 24
Figure 14. Jaractor LC Tank Circuit Design for the TRF6900 24
Figure 15. Clock Circuit for TRF6900 25
Figure 16. Low Pass Filter Amplifier for TRF6900 26
Figure 17. Demodulator Tank Circuit for TRF6900 26
Figure 18. Impedance Matching Network used for the Receiver Input 27
Figure 19. Impedance Matching Network used for the output of the Power Amplifier
27
Chapter 1
Introduction
Between 1991 and 2001, there were 455 Iatalities in Australia attributed to small
aircraIt. This is compared to the commercial aircraIt sector where there were only 17
Iatalities during the same period. A major cause oI the great diIIerence in the number
oI Iatalities is that many small aircraIt are not equipped with collision avoidance
systems due to their cost. These aircraIt rely solely on visual acquisition to avoid
collisions.

There are limitations to using visual acquisition as a means oI collision avoidance
even Ior slow moving aircraIt such as gliders and light aircraIt. Gliders have a small
Irontal proIile that makes then more diIIicult to see Irom certain angles. Human vision
can also be limited in the airborne environment because oI obstructions Irom within
the aircraIt.

One example oI the Iailure oI visual acquisition occurred on the 2
nd
March 1999, a
Piper Pawnee single seater aircraIt collided with an Astir CS glider resulting in the
loss oI two lives. The Astir CS glider was only 10m away, on a collision course
beIore being spotted by the Piper Pawnee. Despite the Piper Pawnee`s use oI the
common traIIic advisory Irequency (CTAF) to warn the Astir CS glider, the collision
could not be avoided. The investigation into the accident indicated that the most
signiIicant contributing Iactor was the sole reliance on visual acquisition Ior traIIic
separation.

As can be seen, there is a need Ior small aircraIt and gliders to have a small, reliable
and cost eIIective system Ior collision avoidance that does not rely heavily on visual
acquisition.

1.1 Aim
The aim oI this project is to develop a low-cost GPS based system to be installed in
small aircraIt that will improve the saIety oI the pilot and passengers. The system
must be small and light weight as it needs to Iit into a cockpit without being an
2
obstruction to the pilot. The system must also be able to be used by amateur pilots
with very little technical expertise and require slight or no interaction. Many small
aircraIt`s only source oI power is a 12V lead-acid battery, thereIore, the system must
draw very little power and be able to run oII 12V.

1.2 Concept of Operation

GPS Constellation

The RF Datalink Transmits the 3D

positions of Aircraf t.
The 3D Position of the Aircraf t is
determined by the GPS Constellat ion.

Figure 1: Concept of Operation

In 2001, two University oI Queensland students, Owen Crowe |12| and Jason Thong
|13| outlined a system design to be used Ior low cost aircraIt collision avoidance. The
concept oI operation is outlined in Iigure 1. The system utilises the satellite based
Global Positioning System (GPS) to determine the aircraIt`s three-dimensional
position in space. The aircraIt then broadcasts its position once per second at a
random interval. Other aircraIt, within a 30km radius, equipped with the same system,
will receive the broadcast and be able to compare their position to the broadcasting
aircraIt. A personal digital assistant (PDA) is used to display the relative position oI
all aircraIt within a 30km radius.

1.3 GoaIs
This Thesis, in conjunction with Ryan Flux`s thesis, plans to complete a prototype
system that uses the system plan and selected devices outlined by Owen Crowe and
3
Jason Thong in their theses. The system being developed will meet all the basic
requirements oI the project, which are:
Receive the aircraIt`s own precise 3D position and velocity.
Broadcast the aircraIt`s own 3D position and velocity.
Receive other aircraIts` 3D positions and velocities.
Display other aircraIt`s position with respect to the originating aircraIt and
perIorm risk calculations on the data.
Use both audible and visual signals to alert the pilot oI a potential hazard

1.4 OveraII System Design
Owen Crowe and Jason Thong speciIied the overall system design. All systems
depend on the satellite based Global Positioning System (GPS) to determine the
aircraIt`s precise position in space. The Motorola GT-Encore is used to extract this
positional data Irom the satellite constellation. This inIormation is passed through the
MSP430 to be modulated by the TRF6900 and then transmitted over the RF datalink.
Other aircraIt also broadcast their position over the datalink, which is demodulated by
the TRF6900. Received aircraIt positions are passed on to the iPAQ, which compares
the data to the current aircraIt`s position. This is used to perIorm risk calculations and
iI there is any sign oI danger the pilot is alerted both audibly and visually by the
iPAQ.
3D Posi ti on
MSP430
PROCESSOR

GPS MODULE

COMPAQ
iPAQ

TRF6900 RF
TRANSCEVER
TX Data
RX Data
RF Data

Figure 2: System Design
4

Chapter 2
CoIIision Avoidance Systems and
Previous Work Conducted

There are a variety oI Collision avoidance systems on the market. The TraIIic alert
and collision avoidance system (TCAS) has proven very successIul with very Iew
accidents in aircraIt Iitted with these devices. Automatic Dependant Surveillance
Broadcast (ADS-B) is a new technology being trialled at the moment that is similar to
the solution proposed by this thesis. All oI these systems have been proven to work
well and improve the saIety level oI aircraIt. A major problem is they are out oI reach
oI amateur pilots due their cost. This chapter outlines the major collision avoidance
systems on the market and examines the work that has been conducted on the
proposed solution to this problem.
2.1 Traffic aIert and coIIision avoidance
system (TCAS)
The TCAS system is the main system used by commercial aircraIt. It has proved very
successIul, but one major limitation is its cost. The TCAS system acquires the
position oI nearby aircraIt via the use oI secondary radar transponders that are
installed on all commercial and most general aviation aircraIt. The TCAS system
interrogates the transponders oI all nearby aircraIt once per second. The range oI the
aircraIt is calculated by measuring the elapsed time between the interrogation and
reply. Velocity oI the secondary aircraIt is determined by these range measurements.

2.1.1 TCAS I
TCAS I is the simplest and cheapest oI the TCAS systems. The TCAS I system shows
the pilot the relative position and velocities oI aircraIt within 40 miles. The aircraIt
are displayed using colour coded dots to indicate which aircraIt are threats. When an
aircraIt is identiIied as a threat, a traIIic advisory (TA) is issued. When a TA is issued,
the pilot must visually identiIy the intruding aircraIt and can alter course by up to 300
Ieet. The aircraIt is not allowed to laterally alter its course. The TCAS I system is
mandatory on all aircraIt with 10 to 30 seats. TCAS I costs up to US$50,000.
5

2.1.2 TCAS II
TCAS II is a more comprehensive system than TCAS I. TCAS II oIIers all oI the
same beneIits as TCAS I but also issues a resolution advisory to the pilot. The system
determines whether an intruding aircraIt is climbing, diving, or in straight and level
Ilight. Once this is determined, the system will advise the pilot to execute an evasive
manoeuvre. TCAS II costs up to US$200,000 per aircraIt and is mandatory Ior all
aircraIt with more than 30 seats.

2.2 ADS-B Automatic Dependant
SurveiIIance - Broadcast
The ADS-B system is a new technology being trialled at the moment. It relies on the
satellite based GPS system to locate an aircraIt`s 3-D location. The aircraIt then
broadcasts its position and other inIormation such as aircraIt type, velocity and Ilight
number on a discrete Irequency. AircraIt and ground stations within 150 miles then
receive the broadcasts and display the inIormation on a display unit. One advantage oI
the ADS-B system is that it works at low altitudes and on the ground. However, a
major restriction oI the ADS-B system is that it costs approximately US$12,000 Ior a
unit, not including the display. The price oI this system puts it beyond the reach oI
many amateur pilots.

2.3 Previous Work
This thesis is a continuation oI work conducted by two previous University oI
Queensland students Owen Crowe and Jason Thong. Their work included
Selection oI components Ior the Iinal design
The writing oI some code Ior the MSP430 microcontroller
Design and construction oI a prototype board
Installation oI an operating system on the PDA

2.3.1 SeIection of components
6
The selection oI components was done well with all modules meeting their individual
speciIications. The TRF6900 transceiver, MSP430 Microcontroller, Compaq iPAQ
Personal Digital Assistant (PDA) and the Motorola GT-Encore GPS module were the
main components selected. Thong and Crowe justiIied their selection and they
established that the diIIerent modules are able to combine to meet all the goals oI the
project.

2.3.2 MSP430 Code
The soItware written Ior the MSP430 was incomplete. The amount oI testing oI the
code was inadequately documented and many lines commented out. Crowe, who
wrote most oI the code, did not explain in great detail the structure oI the code. A
decision was made at the start oI the project to program the MSP430 code Irom the
beginning.

2.3.3 Design and Construction of a Prototype Board
A prototype board was designed, incorporating the MSP430, TRF6900 and power
supply. This board was also inadequately documented with many changes being made
to the board aIter manuIacture. The TRF6900 design didn`t incorporate RF aspects
such as input and output impedance matching, characteristic impedance oI
transmission lines and the need oI a solid ground plane. Many necessary components
were nonexistent and a lot oI the circuit designs were unjustiIied. The decision was
made that the design Ior the prototype board would be totally revised.

2.3.4 InstaIIation of Linux on the iPAQ
Linux was install on the iPAQ to be used as the operating system oI the project. This
was done well with the operating system having Iull Iunctionality.

2.4 Project Tasks
A modular approach was used during the course oI the project. The project was
separated into modules that were then designed and tested individually, these modules
were then to be integrated at the end. To complete the project there were several tasks
assigned to this thesis.
7
Program the TRF6900`s registers Irom the MSP430
Implement a Multiple Access communication protocol on the RF datalink
using the TRF6900 and the MSP430
Design a prototype board Ior the TRF6900

Ryan Flux was assigned the tasks oI
Creating a user interIace on the iPAQ
Receiving 3D position and one pulse per second Irom the GT-Encore GPS
module
Designing a prototype board Ior the MSP430
8
Chapter 3
System Design
This chapter outlines the design oI the RF datalink, TRF6900 and the MSP430.
Aspects oI the RF datalink are discussed including spectrum regulations, multiple
access techniques, the modulation oI data by Frequency ShiIt Keying and the RF
protocol used to send data.
3.1 RF DataIink
The RF datalink is a vital component oI the AircraIt Collision Avoidance System.
DiIIerent aspects oI the datalink are examined, and the solution chosen meets the
regulations speciIied by the Federal Communication Commission.

3.1.1 Spectrum ReguIations
In Australia there is an unlicensed Irequency band between 915MHz and 928MHz
The Australian Communication Authority speciIies that within this band devices are
allowed by law to broadcast a Frequency Hop Spread Spectrum signal that has a
EIIective Isotropic Radiative Power oI less that 1W at any time.

North America has an unlicensed Industrial, ScientiIic and Medical (ISM) band that
covers 902MHz to 928MHz. The Federal Communication Commission speciIies that
iI the maximum output power level is below 1W the ISM band may be used without a
licence.

The Australian and North American band both have the same Irequency hopping
requirements that are speciIied in section 15.247 oI document |2|. All Irequency
hopping systems need to have hopping channel carrier Irequencies separated by a
minimum oI 25 kHz or the 20 dB bandwidth oI the hopping channel, whichever is
greater. II the 20 dB bandwidth oI the hopping channel is less than 250 kHz, the
system needs to use at least 50 hopping Irequencies and the average time oI
occupancy on any carrier Irequency shall not be greater than 0.4 seconds within a 20
second period. II the 20 dB bandwidth oI the hopping channel is 250 kHz or greater,
the system shall use at least 25 hopping Irequencies and the average time oI
9
occupancy on any Irequency shall not be greater than 0.4 seconds within a 10 second
period. The maximum allowed 20 dB bandwidth oI the hopping channel is 500 kHz.

3.1.2 MuItipIe Access Techniques
The Datalink is a vital component oI the GPS based collision avoidance system. Data
is transmitted over the RF datalink by Binary Frequency ShiIt Keying (BFSK)
signalling at a bit rate oI 25kHz. The datalink has been designed to operate in the
North American Industrial, ScientiIic and Medical (ISM) band between 902MHz and
928MHz, but can be easily reconIigured to work in the unlicensed Australian band
between 915MHZ and 928MHz.

Frequency hopping is employed to ensure that the system meets the government
regulations speciIied earlier. This will also limit the datalink`s susceptibility to
interIerence by other users in the band.

Figure 3 shows the Irequency hopping structure used Ior the RF datalink. All systems
receive one pulse per second (1 pps) Irom the GPS module at the same time, this is
used to synchronise the Irequency hopping oI all systems. Every one second interval
is divided into 64, 15.625ms Irames. Every Irame has a predeIined carrier Irequency
allocated to it. The carrier Irequencies are separated by a minimum oI 0.4MHz to
meet government regulations. AircraIt broadcast their position once per second in a
randomly selected Irame. For the remaining Irames the aircraIt listens Ior
transmissions Irom other aircraIt.
10
1 62 3 64 63 2
One Second nterval
15.625ms Frames
GPS One Pulse Per Second Timi ng
902 928
Frame 1
Frame 2
Frame 3 Frame 63
Frame 64
0.4MHz
f (MHz)

Figure 3: RF Datalink Management

3.1.3 Frequency Shift Keying
Continuous Phase Binary Frequency ShiIt Keying is the modulation scheme used over
the RF datalink. It is the modulation oI a carrier signal by switching between two
diIIerent Irequencies in response to baseband data.

Figure 4: FSK Modulated Output Signal vs Modulating Signal m(t)

The TRF6900 is used to generate a continuous phase FSK signal that is
mathematically represented by the Iollowing equations.
| | ) ( cos ) ( t t w A t s
c c
u + =
}

=
t
f
d m D t u ) ( ) (
11
Where m(t) is the baseband digital signal and s(t) is the continuous phase FSK signal.
As (t) is the integral oI m(t), (t) is always continuous even during switching oI the
baseband signal. ThereIore the modulated waveIorm has continuous phase.

The approximate transmission bandwidth (B
T
) Ior a FSK signal is given by
( / (

2 2
Where F is the Irequency deviation and B is the bandwidth oI the baseband
waveIorm. The modulation index () is given by
(
/

To conserve bandwidth and minimise Bit Error Rate a modulation index oI 0.5 to 1
should be used. Assuming that the bandwidth oI the baseband waveIorm is taken at
the Iirst null, B equals the baseband data rate. The intended data rate is 25kbps
thereIore B equals 25kHz. Choosing a modulation index oI 0.7, F 18kHz.
ThereIore the total approximate transmission bandwidth is 76kHz.

3.1.4 RF ProtocoI
Over the RF datalink the Iollowing protocol has been developed Ior transmission oI
data in each Irame. The protocol consists oI three parts, the training sequence, the
start bit and the data package.

Training Sequence
In order Ior the TRF6900 to receive Non-Return to Zero coded signals (NRZ), a
training sequence is needed Ior the receiver to adapt to the transmitted signal. The
training sequence is a square wave consisting oI 38 consecutive high and low pulses.
This is used to charge a sample-and-hold capacitor to the dc value oI the signal. Once
the training sequence has been received, the voltage across the sample-and-hold
capacitor is held constant and it Iorms the decision threshold oI the Data-Slicer. The
training sequence is also used to notiIy the TRF6900 that valid data is being received.

Start Bit
The purpose oI the start bit is to enable the reception oI the data package by marking
the end oI the training sequence. The start bit corresponds to three consecutive high
12
pulses. Once the Start bit has been received, the TRF6900 holds the voltage across the
sample-and-hold capacitor constant allowing reception oI data packages that don`t
have a constant dc level.

Data Package
The data package contains the actual positional data to be transmitted. Transmission
always begins with the most signiIicant bit. The data package consists oI 26 bytes
including checksums.

Frequency Hopping
As part oI the RF datalink, Irequency hopping is employed. Every system hops to a
predetermined carrier Irequency 64 times a second. Carrier Irequencies are separated
in the ISM band by a minimum oI 0.4MHz.

3.1.5 RF DataIink Specifications
In every 15.625ms Irame, the TRF6900 must carry out the Iollowing tasks.
Lock onto desired carrier Irequency
Transmit/Receive Training sequence oI 38 high pulses and 38 low pulses
Transmit/Receive Start bit three bit periods in duration
Transmit/Receive Data Package oI 24 bytes plus 2 bytes checksums

The maximum lock time Ior the TRF6900 is 600s. This leaves 15ms Ior the
transmission/reception oI data. Approximately 290 bits oI data need to be sent in each
Irame. ThereIore, the minimum data rate is 19.3kHz. To allow room Ior improvement
in the Iuture, a data rate oI 25kHz was chosen. Below are the protocol`s
speciIications.
Hop Frequencv: 64 times a second
Resulting Frame length: 15.625ms
Frequencv Difference between Frames: 0.4MHz
Data Rate: 25kHz
Resulting bit length: 50s
Data package: Training Sequence 5ms, one Start Bit, data package 24 2 bytes
Modulation Technique: Frequency ShiIt Keying
13
Frequencv Deviation: 18kHz

3.2 MSP430 MicrocontroIIer
The MSP430 microcontroller is the heart oI the aircraIt collision avoidance system. It
is designed to be a battery operated device that runs down to 1.8V. The MSP430
Ieatures a 16-bit Reduced instruction set computer (RISC) with an instruction cycle
time oI 125ns. It has considerable storage space with IiIteen 16-bit registers, 60Kb oI
programmable memory including 256 bytes oI Ilash memory and 2Kb oI RAM.
Additionally, the MSP430 has two Universal Synchronous/Asynchronous
Receive/Transmit (USART) modules, that allow easy interIacing with the Encore and
the iPAQ.

3.3 TRF6900 ISM band Transceiver
The TRF6900 transceiver was selected Ior transmission and reception oI data. The
TRF6900 is a single chip RF transceiver capable oI creating a halI-duplex Irequency
hopping FSK link. The chip is intended Ior applications that use the Industrial,
ScientiIic and Medical band between 902MHz and 928MHz and is designed Ior low
power consumption, operating down to 2.2V.

3.3.1 Receiver
The receiver oI the TRF6900 is used to demodulate the incoming FSK signal Irom the
RF datalink. It consists oI a Low Noise AmpliIier, RF Mixer, Intermediate Frequency
(IF) ampliIier, band pass Iilter, FSK Demodulator, Low Pass Filter and a Data Slicer.
mpedance
Matching
FSK
Demodulator
LNA Mixer F Amp BPF LPF Data Slicer
RXDATA
I
c
-I
IF


Figure 5: TRF6900 Receiver Design

14
Low Noise AmpIifier
The Low Noise AmpliIier (LNA) ampliIies the incoming signal. It provides a typical
gain oI 13dB and a noise Iigure oI 3.3dB. The LNA has two operating, normal
operation modes Ior maximum sensitivity or low gain mode Ior high RF input signal
levels. The two modes are Iully programmable by the serial control interIace.

RF Mixer
The RF mixer is used to convert the received RF signal to a signal at an intermediate
Irequency (IF). This conversion takes place by the mixer multiplying the received RF
signal with the output oI the Direct Digital Synthesiser. The TRF6900 is designed to
operate at an IF oI 10.7MHz. ThereIore, the Irequency oI the DDS should be set to
10.7MHz below the carrier Irequency oI the received RF signal. The mixer has an
output impedance oI 330Ohms so it can easily be integrated with a ceramic band pass
Iilter.

Intermediate Frequency AmpIifier
The IF ampliIier/limiter consists oI several diIIerential ampliIier stages. It has a
typical gain oI approximately 80dB and generates a limited signal at the output. The
purpose oI the limiter is to remove amplitude variations in the IF FSK waveIorm. This
is needed because the demodulator responds to amplitude variations in the received
waveIorm as well as Irequency variations.

Band Pass FiIter
A ceramic band pass Iilter with centre Irequency oI 10.7MHz is used to remove the
unwanted Irequency components Irom the RF Mixer. A Murata SFECV10.7H IF Iilter
with a 3dB bandwidth oI 150kHz is used.

FSK demoduIator
The FSK demodulator is used to convert the FSK signal down to a baseband
waveIorm. A quadrature demodulator with an external LC tank circuit is used to
demodulate the received signal. Figure 6 gives a block diagram oI the demodulator
used on the TRF6900.
15
V
0
(t)
Phase Shif t Network with 90
degree phase shif t
Low Pass
Filter
nput FSK
signal
S
FSK
(t)
V
quad
(t)

Figure 6: FSK Demodulator Block Diagram

The operation oI the demodulator is outlined below. The input signal into the FSK
demodulator is
)| ( cos| ) ( t t A t S
c c FSK

and the quadrature signal is
|
) (
) ( sin| ) (
2 1
dt
t d
K t t K A t J
c c quad

,
when these two signals are multiplied by the product detector and then low pass
Iiltered, the resulting waveIorm is
|
) (
sin|
2
1
) (
2
2
1 0
dt
t d
K A K t J
c

,
where

t
f
d m D t ) ( ) ( .
II K
2
is assumed to be very small, |
) (
sin|
2
dt
t d
K

can be approximated by
dt
t d
K
) (
2

.
Using this approximation and diIIerentiating (t)
) (
2
1
) (
2
2
1 0
t m D K J K t J
f L

As can be seen, the output oI the demodulator is the original message signal, with
diIIerent amplitude.

Low Pass FiIter AmpIifier
The low pass Iilter ampliIier is used to ampliIy the output oI the demodulator and to
Iilter out unwanted products Irom the demodulator circuit. The low-pass ampliIier
bandwidth may be adjusted by external components according to noise and bandwidth
requirements.

16
Data SIicer
The Data Slicer is Iundamentally a comparator. It outputs a binary baseband signal
necessary to drive external CMOS circuitry. An internal reIerence (V
reI
) voltage
determines the decision threshold oI the data slicer. This reIerence voltage is
determined by the integrating the incoming signal to determine the average DC level.

3.3.2 Transmitter
The transmitter consists oI a phase locked loop, a Iully programmable direct digital
synthesiser and a power ampliIier.
Accumulator
Phase
Detector
Loop Filter
VCO
Prescaler
/ 256
I
out

I
out
/256
V
Tune
I
DDS

4MHz
Antialiasing
Filter
D/A
converter
Sine Lookup
Table
TXDATA
f
ref

mpedence
Matching
Power
Amplif ier
Direct Digital
Synthesiser
Phase
Locked Loop

Figure 7: TRF6900 Transmitter Design

Direct DigitaI Synthesiser
The direct digital synthesiser (DDS) generates a sine wave in the digital domain. The
DDS Iirst constructs a digital ramp waveIorm, each value in the ramp is used to select
the corresponding value in a sine lookup table. The signal is then converted Irom a
digital signal to an analog signal. The resulting analog signal is low pass Iiltered to
remove spurious responses Irom the D/A conversion, thus leaving a sine wave with
typical Irequency resolution oI 230Hz. BeneIits oI generating a sine wave this way
include high precision, wide Irequency range and a high degree oI soItware
programmability. The DDS signal is Irequency modulated by the signal on TXDATA.
17
The modulated signal output by the DDS is used as a reIerence signal into the phase
locked loop to be multiplied up to the output Irequency.

Phase Locked Loop
The Phase Lock Loop is used to multiply the reIerence Irequency oI the DDS
synthesiser to generate the desired output Irequency. The XOR Phase detector
produces an output current that is a Iunction oI the phase diIIerence between the
incoming signal and the oscillator signal. The loop Iilter is simply a low pass Iilter. It
suppresses high Irequencies Irom the Phase Detector allowing the dc value oI the
phase diIIerence to control the Voltage Controlled Oscillator. The Voltage Controlled
Oscillator`s output Irequency depends on the tuning voltage output by the loop Iilter,
and the input Irequency.

Power AmpIifier
The power ampliIier is used to ampliIy the RF signal output Irom the phase locked
loop. It has Iour diIIerent output power levels that can be programmed via the serial
control register. In the highest gain, the power ampliIier has a typical output power oI
4.5 dBm.


Figure 8: Block Diagram of TRF6900/MSP430 Serial Interface

3.4 TRF6900/MSP430 SeriaI Interface
The TRF6900 can be easily interIaced to the MSP430. The interIace consists oI a 3-
wire unidirectional serial bus (CLOCK, DATA, STROBE) that is used to program the
TRF6900`s Iour 24-bit registers, the MODE and STANDBY lines are simple control
signals and the LOCK DETECT signal is high when the TRF6900 is locked onto a
desired carrier Irequency.
18
Chapter 4
Software Specifications
This Chapter describes the soItware used to implement the RF datalink. The soItware
is separated into Iour unique modules. The operation oI the individual modules is then
examined.
4.1 The MSP430 MicrocontroIIer Software
The code Ior the RF data link was written in assembly language Ior the MSP430F149
and runs in the IAR kickstart environment. An aspect oI the design under the control
oI the MSP430 is the operation oI the TRF6900. The MSP430 must be able to control
all the signals between the TRF6900-MSP430 serial interIace including reading data
on the RXDATA line and sending data on the TXDATA line. The soItware was
designed in individual modules, with each module carrying out a speciIic Iunction.
Each module is speciIied as Iollows.

4.1.1 ImpIementation of RF Transmission
Send_RF
Lock Detect?
Send training
Sequence
Send Start bit
Send Data
Yes
No
Return

Figure 9: Flow Chart for

Transmission oI positional inIormation is much simpler on the baseband side than
reception. As outlined in chapter three each transmission consists oI three parts, the
training sequence, the start bit and the Data package. All inIormation to be transmitted
is based on a timing grid with duration oI 40s. This is done using Timer B on the
19
MSP430. The period oI the timer is set to 40s by the contents oI a latch that is
compared to a counter every clock cycle. When the latch and the counter are equal, an
interrupt is triggered.

Generating the Training Sequence
The training sequence is a series oI 38 high and low pulses on the TXDATA pin.
Each pulse is oI 40s duration, this creates a constant DC waveIorm. This is easy to
implement with the TXDATA pin being toggled every time Timer B generates an
interrupt.

Generating the Start Bit
Once the training sequence has been sent, the start bit needs to be generated. This is
simply a high pulse Ior 120s or 3 consecutive bit intervals. Holding the TXDATA
pin high Ior 3 consecutive Timer B interrupts generates the start bit.

Sending the Data Package
Transmission oI the data package is also relatively easy. With each bit having a period
oI 40s, TXDATA just needs to be set to the value oI the current bit to be sent every
time Timer B interrupts.

4.1.2 ImpIementation of RF Reception
Once the TRF6900 is locked onto the desired Irequency, the MSP430 scans the
received signal Ior valid data. Because the ISM band always contains noise, the
RXDATA pin will always have a digitalised signal component Irom the output oI the
data slicer. For the MSP430 to distinguish between valid and invalid pulses the
training sequence is used.

Detection of Training Sequence
Noise and other eIIects within the ISM band distort all received signals. Data jitter is a
major problem with data that has been received not having the same bit duration as
when it was sent. The detection sequence allows Ior this, with all bits having a
duration oI between 35s and 45s being registered as valid pulses.

20
The duration oI bits is determined by the RXDATA signal being applied to a capture-
compare block. Every edge oI the RXDATA signal generates an interrupt and triggers
a capture oI the current value oI Timer B Ior storage. II the duration between edges is
between 35s and 45s this is registered as a valid pulse. Eight consecutive valid
pulses must be registered Ior the training sequence to be detected.

Detection of the Start Bit
The principle oI start-bit recognition is similar to the detection oI the training-
sequence pulses, the diIIerence is that the start bit is a single pulse oI 140s duration.
The receiver will recognise a pulse between 105s and 135s in length. The Ialling
edge oI the start bit pulse is the trigger Ior the scanning oI the data package.

Reading the Data Package
The data package immediately Iollows the Ialling edge oI the start bit. It contains 24
bytes oI data plus 2 bytes Ior the checksum. The procedure Ior scanning the data
package diIIers Irom detection oI the training sequence. Once the Ialling edge oI the
start bit has been detected the TRF6900 is switched Irom learn to hold modes. This
means the decision threshold oI the data slicer is kept constant once the TRF6900 is in
hold mode allowing reception oI a non-constant DC waveIorm.

Once the Ialling edge oI the start bit has been detected, a timing grid is created Ior the
scanning oI RXDATA with Timer B. The data package scanning is done every 40s
in the middle oI the expected pulse when Timer B generates an interrupt, the signal oI
RXDATA is tested, the value is stored, the bit counter is incremented and then a
check is done whether there are more bits to receive.
21
Receive_RF
Switch TRF6900 to
reception in learn mode

Scan received
signal f or training
sequence
Switch TRF6900 to
reception in hold mode
Detect start bit
Receive data package
Return
Not Detected
Detected

Figure 10: Flow Chart of

4.1.3 The Main Program
The main program is used to provide the multiple access techniques outlined in
chapter three. The main program runs an inIinite loop, the process oI which is
outlined below. The Iirst step oI the loop is to wait Ior the rising edge oI the one pulse
per second Irom the GT-Encore GPS module. Once the pulse has been received,
Timer A on the MSP430 is used to create sixty-Iour 15.625ms Irames. A random
number between 1 and 64 is calculated Irom the Iive least signiIicant bits on the
positional data. The program then runs through all 64 Irames, sending data iI the
current Irame equals the random number calculated and receiving data Ior the other
Irames. AIter each Irame, the carrier Irequency that the TRF6900 is set to is
incremented by 0.4MHz. Once all the Irames have been run through, the program
resets the carrier Irequency and waits Ior the rising edge oI the one pulse per second
signal.
22
Main
Wait f or GPS
position + 1pps
Select random send
f rame
Frame =
Send
Frame?
send_RF Receive_RF
Create 64 frames
No
Yes
Program registers
f or Send
Program registers
f or receive
ncrease Carrier frequency by 0.4MHz for
next Frame
Loop_Frame
Loop While (FrameNo <64)
FrameNo = FrameNo + 1
Loop_Frame
Loop_Main
Loop_Main
While (True)

Figure 11: Flow Chart for Routine

4.1.4 Program_TRF6900
This subroutine is used to program the TRF6900`s Iour 24-bit registers. It works by
initialising the bits to be programmed into two 16-bit buIIer registers. It then proceeds
to push the bits onto the stack oI the TRF6900 by using the DATA and CLOCK lines
on the TRF6900-MSP430 serial interIace. Once all oI the bits are on the stack, the
strobe line is toggled to load the data into the speciIied register.
23
Chapter 5
Hardware ImpIementation
This chapter outlines the design and construction oI a working transceiver module.
The design oI supporting circuitry Ior the TRF6900 is detailed. Design rules Ior the
PCB are also thoroughly discussed.
5.1 Hardware Design
For the TRF6900 to be Iully operational supporting circuitry needs to be designed.
Figure 12 is block diagram oI the TRF6900 transceiver including all the supporting
circuitry.


Figure 12: Block Diagram of TRF6900
5.1.1 Loop FiIter
A second order loop Iilter was used Ior operation within the phase locked loop. Loop
Iilter designs are a balance between lock-time, noise and suppression oI spurious
responses. For maximum suppression oI unwanted Irequency components, the loop
Iilter`s bandwidth was made as narrow as possible.

24


Figure 13: Loop Filter Design for TRF6900

5.1.2 Varactor LC Tank Circuit
An external LC tank circuit is needed Ior the Voltage Controlled Oscillator to operate
correctly. The resonant Irequency oI the tank circuit is given by the Iollowing
equation
6)
;0
)

2
1

where
2 1 4 3
5
1 1 1 1
1
2+ 2+
6)




The Voltage Controlled Oscillator was designed to operate between 880MHz and
950MHz with a voltage tuning range oI 0.3V to 3V Irom the loop Iilter. The tuning
voltage Irom the loop Iilter changes the capacitance oI the varactor diodes, thus
changing the resonant Irequency oI the Voltage controlled oscillator.

Figure 14: Varactor LC Tank Circuit Design for the TRF6900
25

5.1.3 CIock Circuit
A clock oI 24MHz is used as the reIerence oscillator Ior the Direct Digital
Synthesiser. The circuit uses the crystal in parallel resonant mode. It has a 360 phase
shiIt around the loop to provide resonance.

Figure 15: Clock Circuit for TRF6900
5.1.4 Low Pass FiIter AmpIifier
The TRF6900 design allows the cut-oII Irequency oI the low pass Iilter needed Ior the
output oI the FSK demodulator to be designed by the user. The cut-oII Irequency oI
the LPF should be greater than two times the data rate. The 3dB corner Irequency Ior
the LPF is given by
9 8 7 6
2
1
+ +

As the data rate is 25kbps, the minium cut-oII Irequency oI the LPF should be
50kbps. ThereIore, the Iilter was designed with a cut-oII Irequency oI 55kHz.
26

Figure 16: Low Pass Filter Amplifier for TRF6900

5.1.5 DemoduIator Tank Circuit
The demodulation tank circuit is used to provide additional phase shiIt that is
proportional to the instantaneous Irequency deviation Irom the carrier Irequency oI
the FSK signal. This is accomplished by using a parallel resonant circuit tuned to the
carrier Irequency oI the received signal. In the case oI the TRF6900`s demodulator,
the carrier Irequency is the same as the IF Irequency. The design equation Ior the tank
circuit is
1 1
2
1
)

Utilising this equation, the tank circuit was designed as in Iigure 17.

Figure 17: Demodulator Tank Circuit for TRF6900

5.1.6 Impedance Matching
For maximum power to be transIerred to and Irom the antenna, the input impedance
oI the antenna needs to be matched to the output impedance oI the TRF6900`s
transmitter and receiver. A simple three element-matching network consisting oI two
27
capacitors and an inductor was used to match the antenna to the receiver at 915MHz.
Figure 18 depicts the input impedance oI the LNA at 915MHz

Zin=50 Ohms

Figure 18: Impedance Matching Network used for the Receiver Input

A two-element matching network is used to match the antenna to the transmitter.


Zin=50 Ohms

Figure 19: Impedance Matching Network used for the output of the Power Amplifier

5.1.7 Transmission Line design
The transmission lines on the TRF6900 board were designed to have a characteristic
impedance oI 50Ohms. 0.75mm thick epoxy-Iibreglass with a dielectric constant (c
r
)
oI 4.75 was used as the substrate oI the board. From the design equation
( ) ( ) ( )
(

+ =

>
c tc
c
t
517 . 0
293 . 0 1 ln
1
1 2 ln 1
2

where W is the width oI the transmission line, h is the thickness, and
28

0
2
60

For the substrate speciIied it was Iound that the width oI the transmission lines needed
to have a characteristic impedance oI 50Ohms is 1.378mm.

5.2 PCB Design
When designing the PCB Ior the TRF6900, good RF design procedures were
Iollowed. Transmission line lengths, capacitive eIIects and component placement
were some oI the properties considered to attain a robust and Iunctional PCB. More
speciIically when constructing the PCB Ior the TRF6900 the Iollowing requirements
were met.
All V
cc
bypass capacitors were placed as close as possible to the TRF6900 IC.
The PCB has one layer as a reIerence-ground plane, any critical ground areas
on the component side oI the PCB are connected by vias to the ground plane.
The PLL loop Iilter traces were kept as short as possible.
The Voltage Controlled Oscillator tank circuit components were placed as
close as possible to the TRF6900 IC and to each other. The traces oI the VCO
inductor and capacitors are symmetrical.
The demodulation tank circuit components were placed as close as possible to
the TRF6900 IC and to each other.
Ground vias were spaced at maximum / wavelength apart.
29
Chapter 6
ResuIts and EvaIuation

This Chapter discusses the modules oI the system that have been completed. Further
developments needed to Iinish the project are also outlined.
6.1 System EvaIuation
At the time oI printing the overall system was not complete. All individual modules
were completed but integration and testing are needed to produce a completed design.

6.1.1 RF DataIink
The RF datalink has been successIully tested and established between two TRF6900
evaluation boards 2m away. Both systems are able to
Frequency Hop
Send and Receive a training sequence
Detect the start oI the data package
Send the data package
Receive the data package with errors only caused by noise in the ISM band

Frequency Hopping
Two systems were synchronised and the carrier Irequency was changing every 15.625
seconds. The evaluation boards were taking Irom 450s to 550s to lock onto the
desired Irequency. The evaluation boards were easily changed Irom transmit mode to
receive mode with a switching time oI around 700s.

Sending and Receiving a Training Sequence
The sending oI the training sequence was easily implemented with all bits in the
sequence being within 1s oI the desired 40s duration. The reception oI the training
sequence was also successIul with all received bits in the sequence being within 3s
oI the desired 40s duration. The MSP430 constantly recognised the training
sequence with the method implemented. When the system was in receive mode and
no valid data was being transmitted, the system recognised that there was no valid
training sequence being sent.
30

Detection of the Start Bit
The start bit was successIully recognised by the receiver with a clear Ialling edge able
to be used as the start oI the timing Ior the data package.

Receiving the Data Package
The method used to receive the data package was extremely successIul. The
discission point oI each bit was very close to the centre oI the bit period. Data Jitter
did not pose any problems to the decoded data signal. The only errors were due to
interIerence Irom noise in the ISM band. This problem could be Iixed by increasing
the signal to noise ratio oI the transmitted signal. Increasing the output power oI the
TRF6900`s transmitter would do this.

6.1.2 MSP430
Most oI the code Ior the MSP430 has been completed in assembler programming
language. The MSP430 has been tested with TRF6900 evaluation board and the serial
interIace has been successIully established. The MSP430 serial interIace is able to
Program the TRF6900`s registers
Control the Irequency hopping oI the TRF6900
Send data to the TRF6900 Ior transmission over the datalink
Receive demodulated data Irom the TRF6900

Programming the TRF6900's registers
The TRF6900`s Iour 24-bit registers were all programmed by the MSP430. All setting
in the registers could be changed allowing the TRF6900 to Iunction properly. Each
register takes approximately 100s to be programmed, which is well within the
constraints posed by the RF datalink.

6.1.3 TRF6900 hardware and PCB
The design Ior the hardware oI the TRF6900 has been completed. All external
modules having been designed to meet the needs oI the datalink. The PCB has been
created according to the hardware design. RF design rules Ior the PCB were Iollowed
31
as closely as was possible. The PCB has not been tested at the time oI printing,
because it was in the process oI being manuIactured.

6.2 Further DeveIopments needed for
compIetion
Overall, the Iunctions oI all the individual modules oI the system are completed.
Integration oI the overall system needs to be done, which should be a straight Iorward
task.

Testing oI the system in an environment similar to the one the Iinal system is going to
be operated in needs to be perIormed aIter the overall system integration. The testing
should be in the open, without interIerence Irom buildings and ground based objects.
Testing the system in actual small aircraIt would be ideal.

The output power oI the TRF6900 at the moment is only 4.5dBm. For the system to
meet the desired range, a power ampliIier needs to be incorporated into the output oI
the system.

The spectrum oI the output signal oI the TRF6900 needs to be viewed by a spectrum
analyser to check that the signal meets the requirements speciIied by the Federal
Communication Commission and the Australian Communication Authority.
32
Chapter 7
Improvements

Once the basic system has been completed, there are several ways the GPS based
aircraIt collision avoidance system can be improved.

At the moment the system is only designed Ior the North American ISM band. The
system could be designed Ior both the unlicensed Australian and European Irequency
bands. Changing the system to operate in the Australian band is a simple task that
involves changing the soItware that sets the carrier Irequencies oI the diIIerent
Irames. The European operating band is Irom 868MHz to 870MHz, Ior the system to
operate in this band soItware as well as some oI the external modules on the TRF6900
would be have to be changed.

The bandwidth available in the ISM band could be Iurther utilised. The system could
incorporate additional Ieatures such as weather reports, voice and text
communication.

A mapping device could be added to aid navigation through previously unknown
terrain. Collision avoidance algorithms could be incorporated into the system to be
used with the terrain data. This could prevent many accidents involving mountains
and other geographic Ieatures.

Addition oI a three dimensional velocity will allow aircraIts` trajectories to be
estimated. This will enable the iPAQ to contain a resolution advisory algorithm,
which will advise the pilot to make evasive manoeuvres.
33
Chapter 8
ConcIusion

The GPS based AircraIt Collision Avoidance system was designed to be a low cost
device to be installed into small aircraIt. It utilises the satellite based Global
Positioning System to determine the aircraIt`s 3D position in space which is then
broadcast over the RF datalink to other aircraIt that have the same system. An
appropriate RF protocol has been designed and implemented Ior broadcast oI
positional data. SoItware Ior the MSP430 has been developed to implement the RF
link using the TRF6900 transceiver. Hardware Ior the TRF6900 has been designed to
provide a Iully Iunctional transceiver module. The PCB Ior the TRF6900 was
designed to be robust and Iunctional. The System is almost complete with overall
integration oI the individual modules and testing the only thing required Ior a
Iunctional product.
34

BibIiography
|1| Australian Communication Authority, Radio Communication License (Spread
Spectrum Devices), www.aca.gov.au, 21
st
May 1996.

|2| Federal Communication Commission, 15.247 Operation within the 902-928MHz
band, www.Icc.gov, 1
st
October 2001.

|3| http://www.ads-b.com/content/index.htm, ADS-B: What is it? (April 2002)

|4| http://www.atsb.gov.au/aviation, ATSB Aviation SaIety (April 2002)

|5| Texas Instruments, Designing with the TRF6900 Single Chip Transceiver
SWRA033D, http://www.ti.com, June 2001

|6|Texas Instruments, MSP430X14X-Mixed Signal Microprocessors SLASXXX
V0.62, http://www.ti.com, February 2000

|7| Texas Instruments, MSP430x1xx Family User Guide SLAU049B,
http://www.ti.com, 2002

|8| Texas Instruments, Implementing a Bidirectional, HalI-Duplex FSK RF Link with
TRF6900 and MSP430 SLAA121, http://www.ti.com, March 2001

|9| Texas Instruments, TRF6900 Single Chip RF Transceiver SLAS213G,
http://www.ti.com, September 1999

|10| TCAS- TraIIic alert and collision avoidance system,
http://www.caasd.org/proj/tcas/, April 2002

|11| Owen Crowe, GPS RADAR A GPS Based AircraIt Collision Avoidance
System, Thesis Document, School oI InIormation Technology and Electrical
Engineering, University oI Queensland, 2001
35


|12| Jason Thong, GPS AircraIt Collision Avoidance System, Thesis Document,
School oI InIormation Technology and Electrical Engineering, University oI
Queensland, 2001

|13| Couch, Digital and Analog Communication Systems 6
th
Edition, Prentice-Hall,
New York, 2001

|14| Golio, The RF and Microwave Handbook, CRC Press, New York, 2001

|15| Ravavi, RF Microelectronics, Prentice Hall, New Jersey, 1998

|16| Bowick, RF Circuit Design, Newnes Press, Boston, 1982.

|17| Rappaport, Wireless Communication Principle & Practice, Prentice Hall, New
Jersey, 1996
36

Appendix A
MSP430 Assembler code Ior the RF datalink

program_TRF6900

Init_high_bytes
DINT
BIC.B#strobe,&P4OUT ;resetstrobe
MOV word_h,word_trf ;setshighbitscurrent
bitstosend
SWPB word_trf ;sets8bitsthatwanttosentto
MSBs
MOV #08h,CNT_1 ;set#ofdatabitsto8
MOV #02h,CNT_0 ;setswhetherhighbytesoflow
bytes
JMP Program_word ;sendData


Init_low_bytes
MOV word_l,word_trf ;setlowbitstocurrent
MOV #010h,CNT_1 ;set#ofdatabitsto16

Program_word
RLC word_trf ;pushMSBintoCarry
JC Send_high ;ifMSBis1send1

Send_low
BIC.B#data,&P4OUT ;alwayssetdatalineto
zero
JMP Pulse_Clock

Send_high
BIS.B#data,&P4OUT ;alwayssetdatalineto
one

Pulse_Clock
BIS.B#clk,&P4OUT ;RisingEdge
BIC.B#clk,&P4OUT ;FallingEdge-Clockremainsat
zero

Next_Bit
DEC CNT_1
JNZ Program_word ;jumpifhigh_bitsstillto
DEC CNT_0
JNZ Init_low_bytes ;whenhigh_bitsare

Generate_strobe
BIC.B#data,&P4OUT ;ensuredataline=0
BIS.B#strobe,&P4OUT ;setstrobeto1
BIC.B#strobe,&P4OUT ;setStrobeto0

end_program_TRF6900
RET

program_send_FSK

MOV#10111100b,word_h;programsC-Wordfor
sending(mode1)
MOV#1001110000000000b,word_l
CALL#program_TRF6900

B(
;1_LNAM[bit0..1] 00b disabled Lownoiseamplifier
operationmode
;1_MIX[bit2] 0b disabled EnableMixer
;1_IF[bit3] 0b disabled Enable1stIFAmplifier
;1_DEM[bit4] 0b disabled EnableLimiter/Demodulator
;1_RSSI[bit5]0b disabled EnableLimiter/RSSI
;1_DSW[bit6] 0b conn.toDemod.DataSwitch(Demodulatoror
RSSI)
;1_LPF[bit7] 0b disabled EnableLPFAmplifier
;1_SLC[bit8] 0b disabled EnableDataSlicer
;1_PA[bit9..10] 10b 20dBatt. PowerAmplifiergainvalue
inTXmode
;(seealsoMSbit)
;1_VCO[bit11]1b enabled EnableVCO
;1_PLL[bit12]1b enabled EnablePLL(DDSSystem,RF
divider,
;PhaseComparatorandChargepump)
;[bit13..14] 00b notused
;SLCTL[bit15]0b holdmode (1blearning)Slicermodeselect
bit
;MS[bit16] 0b FSKmodulationmodeselect
;NPLL[bit17] 0b 256 RFdividerratioforPLL
;APLL[bit18..20] 000b 1 accelerationfactorforthe
chargepump
;Address[bit21..23] 101b CWordAddress

end_program_send_FSK
RET

program_receive_FSK

MOV#11000111b,word_h;programsD-Word
forreceive(mode0)
MOV#0001100110011111b,word_l
CALL#program_TRF6900

;0_LNAM[bit0..1] 11b Norm.Op Lownoiseamplifier

operationmode
;0_MIX[bit2] 1b Enabled EnableMixer
;0_IF[bit3] 1b Enabled Enable1stIFAmplifier
;0_DEM[bit4] 1b Enabled EnableLimiter/Demodulator
;0_RSSI[bit5]0b disabled EnableLimiter/RSSI
;0_DSW[bit6] 0b conn.to Demod.DataSwitch(Demodulator
orRSSI)
;0_LPF[bit7] 1b Enabled EnableLPFAmplifier
;0_SLC[bit8] 1b Enabled EnableDataSlicer
;0_PA[bit9..10] 00b Disable PowerAmplifiergainvalue
inTXmode
;(seealsoMSbit)
;0_VCO[bit11]1b enabled EnableVCO
;0_PLL[bit12]1b enabled EnablePLL(DDSSystem,RF
divider,
;PhaseComparatorandChargepump)
;DEV[bit13..20] 00111000FSKDeviationReg
;Address[bit21..23] 110b DwordAddress

end_program_receive_FSK
RET

InitiaIise

;--------------------------------------------------------------------
;INITIALISEPORTS
;--------------------------------------------------------------------

Initialise

B*
Init_P1
BIS.B#0EEh,&P4DIR ;SetsP1.7(data),
P1.6(clk),P1.3(TX_DATA),P1.2(Mode),P1.1(enable)tooutputs
BIC.B#001h,&P4DIR;setsP4.0(RX_DATA)toinput
Init_P2
BIS.B#0EEh,&P2DIR ;SetsP2.7(data),
P2.6(clk),P2.2(Mode),P2.1(enable)tooutputs

end_Initialise
RET

;--------------------------------------------------------------------
;SETSMODEOFTRF6900
;--------------------------------------------------------------------

program_set_mode
BIC.B#mode,&P4OUT;setmodeto0(receive)
BIS.B#mode,&P2OUT;setmodeto1(send)
end_program_set_mode
RET

;--------------------------------------------------------------------
;ENABLETHESENDINGANDRECEIVINGOFDATA
;--------------------------------------------------------------------

enable_send_and_receive
BIS.B#enable,&P4OUT;setsenableto1
BIS.B#enable,&P2OUT ;setsenableto1
end_enable_send_and_receive
RET

;--------------------------------------------------------------------
;SETUPOSCILLATOR
;--------------------------------------------------------------------

SetupOscbic.b#XTOFF,&BCSCTL1;TurnonXTAL2
bic.b#OFIFG,&IFG1;ChangetheOscillator
mov.w#0FFh,R15;Delaytomakesureit
works
SetupOsc1dec.wR15;DelayLoop
jnzSetupOsc1;DelayLoop
bit.b#OFIFG,&IFG1;Checkforerror
jnzSetupOsc;Ifsotry,tryagain!
bis.b#SELM1+SELS,&BCSCTL2;SelectXT2forthe
bis.b#DIVS1,&BCSCTL2;Selectdivideby4

ret

Send Training Sequence

;--------------------------------------------------------------------
;TrainingSequence
;--------------------------------------------------------------------

Training_Sequence
mov#CCIE,&CCTL1
mov#TAIE+TACLR+MC0+TASSEL1,&TACTL
mov#016h,&CCR0;WritetoCCR0starttimer
mov#025h,COUNT
mov#0AAh,word_h0
MOV#08h,CNT_1;waitforeightvaliddatabits
MOV#03h,CNT_0
MOV#00000h,word_l0
EINT
mov#04h,COUNT1
TimerCMP#00h,COUNT;sendstrainingsequence2*16bits
JNETimer
MOV#010h,COUNT
B)
mov#0AAAAh,word_h0
DECCOUNT1
JNZTimer

Send Start Bit

Start_bit;sendsstartbit3bitslong
MOV#02h,COUNT
mov#0FFFFh,word_h0
Timer1CMP#00h,COUNT
JNETimer1

Send Data Package

Data_Packet
MOVdata,word_h0;senddatapacket
MOV#010h,COUNT
Timer2CMP#00h,COUNT
JNETimer2
JMPData_Packet
RET

Scan Received SignaI for Data Package

CMP#02h,word_l0;hastrainingsequencybeen
received?
JEQWait_for_Start_Bit
CMP#03h,word_l0
JEQGet_TX_Data
CMP#04h,word_l0
JEQreturn_from_timer

BIT.B#RX_DATA,&P4IN;isRX_DATAset?
JZRx_Data_low_1
bit_highMOV#01h,word_l0
JMPreturn_from_timer

Rx_Data_low_1CMP#01h,word_l0
JNERestart_Counter
MOV#00h,word_l0
DECCNT_1
JNZreturn_from_timer
MOV#02h,word_l0;8validbitsreceived

Wait for Start Bit

Wait_for_Start_Bit
BIT.B#RX_DATA,&P4IN;IsRX_DATAset?
JNZRx_Data_Low
DECCNT_0;sethighfor1
JNZreturn_from_timer;beensetfor3times
MOV#03h,word_l0
MOV#011h,CNT_0
JMPreturn_from_timer

Rx_Data_LowMOV#03h,CNT_0;resetwaitforstart
bit
JMPreturn_from_timer

Receive Data Package

Get_TX_Data
BIT.B#RX_DATA,&P4IN
JZRx_Data_Low_2
%
BIS#01h,word_l1;setLSB
JMPRotate
Rx_Data_Low_2BIC#01h,word_l1;setMSB
RotateRLCword_l1
DECCNT_0
JNZreturn_from_timer
MOV#04h,word_l0
JMPreturn_from_timer

Restart_Counter
MOV#03h,CNT_0

return_from_timer
RETI
RET

Timer B interrupt Vector

;--------------------------------------------------------------------
;TimerBinterruptVector
;--------------------------------------------------------------------
TB_INT
add&TBIV,PC
RETI
JMPsend_data
RETI
RETI
RETI
RETI

Main

;--------------------------------------------------------------------
;MainRoutine
;--------------------------------------------------------------------

HANDLE1PPSmov.w&TAR,&TEMPWORD00
clr.w&TAR
;bis.w#TACLR,&TACTL
inc.w&OWN_TIME_LO;Incrementthetimer
adc.w&OWN_TIME_HI;AddtheCarryon

bit.b#080h,&RX0_STATUS;Checkfor3DFix
jeqEXIT1PPS;Ifnotexit

bit.b#040h,&RX0_STATUS;Checkiffirsttime
jeqNOTFIRST
bic.b#040h,&RX0_STATUS

mov.w#INTPERSECOND,&TIMERACOUNT
bis.w#TAIE,&TACTL;TurnCaptureInterruptON!
call#TIMER;CalltheTIMERroutine
jmpEXIT1PPSOK

NOTFIRSTmov.w#INTPERSECOND,&TIMERACOUNT
NORMALTIMERcall#TIMER;CalltheTIMERroutine
add.w&TEMPWORD00,&TIMERCORR;addthetimer
adc.w&TIMERCORR+2 ;Addthehighword
add.w&TIMERCORR,&TIMERCORR;Addthetimer
addc.w&TIMERCORR+2,&TIMERCORR+2
add.w&TIMERCORR,&TIMERCORR;Addthetimer
addc.w&TIMERCORR+2,&TIMERCORR+2
cmp.b#080h,&TIMERCORR
jloNOROUND

inc.b&TIMERCORR+1
adc.w&TIMERCORR+2
%'
NOROUNDmov.b&TIMERCORR+1,&INTSECOND
mov.b&TIMERCORR+2,&INTSECOND+1
dec.w&INTSECOND
mov.w&INTSECOND,&CCR0
EXIT1PPSOKbit.w#010h,&TAIV;Testforinvalidinterrupt
jeqEXIT1PPS
bis.b#040h,&RX0_STATUS;Canceltheimmediate
EXIT1PPSreti
42
Appendix B
TRF6900.PCB
TRF6900.SCH

'0

%B