ASIX MultiPort Ethernet EEPROM UserGuide v101 3

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Revision 1.01 Mar. 1st, 2010
1 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation
Revision History
Revision 0.10 1.00 1.01 Date 2008/07/30 2009/11/13 2010/03/01 Description Preliminary release. 1. Added AX88782/AX88613 EEPROM related information. 1. Added Section 3-2-6 about how to configure Non-802.1Q Port-Based VLAN Entry. 2. Added some FAQs about AX88613 EEPROM in Section 4-4, 4-5.
Contents
1. Introduction ........................................................................................... 5 2. EEPROM Device Selection .................................................................. 6 3. EEPROM Data Related Information .................................................. 7
3-1. EEPROM Data Format ..................................................................................... 7 3-2. EEPROM Write Command Examples .............................................................. 8 3-2-1. Configure Port 0/Port 1 MAC Addresses and Enable PHY0/PHY1 .......... 8 3-2-2. Indirectly Write PHY0/PHY1 Registers through MDIO Interface ............. 9 3-2-3. Set PCI Vendor/Device and Sub-Vendor/Sub-Device IDs (for AX88742 only) ............................................................................................................ 9 3-2-4. Configure L2 Routing Table for Source Port 0/Port 1............................. 10 3-2-5. Configure 802.1Q VLAN Entry ................................................................ 11 3-2-6. Configure Non-802.1Q Port-Based VLAN Entry ..................................... 12 3-2-7. Configure 802.1P QoS Mapping Table for Port 0/1/2 ............................. 13 3-2-8. Configure IGMP Multicast IP Group Table Entry .................................. 14 3-2-9. Configure RX Rate Limit Function ........................................................... 15 3-2-10. Configure TX Rate Limit Function ........................................................... 16
4. EEPROM FAQs .................................................................................. 17

4-1. Do we need to register our own PCI Vendor ID/Device ID and Subsystem Vendor ID/Subsystem Device ID for AX88742 applications? ...................... 17 4-2. Do I have to assign two unique MAC addresses for Port 0 and Port 1 of every ASIX Multi-Port Ethernet Controller based devices? .................................... 17 4-3. How to register a MAC/Ethernet address from IEEE-SA? ............................ 17 4-4. Is the EEPROM device required for AX88613 applications? ........................ 18 4-5. How to program the EEPROM content on AX88613 applications? .............. 18
Appendix 1. AX88742 EEPROM Reference Setting ........................... 19 Appendix 2. AX88783/AX88782 EEPROM Reference Setting .......... 20 Appendix 3. AX88613 EEPROM Reference Setting ........................... 21
A3-1. Port 2 in MII Mode with External PHY (default setting for demo board) ..... 21 A3-2. Port 2 in Reverse MII Mode ........................................................................... 24 A3-3. Port 2 in RMII Mode with External PHY ....................................................... 26 A3-4. Port 2 in Reverse RMII Mode......................................................................... 29
Tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. EEPROM Device Selection Table (PD: Pull-Down, PU: Pull-Up) .................................................................. 6 EEPROM Data Format ..................................................................................................................................... 7 AX88742 EEPROM Reference Setting .......................................................................................................... 19 AX88783/AX88782 EEPROM Reference Setting .......................................................................................... 20 AX88613 EEPROM Reference Setting (Port 2 in MII mode with external PHY) ......................................... 23 AX88613 EEPROM Reference Setting (Port 2 in Rev-MII mode) ................................................................ 25 AX88613 EEPROM Reference Setting (Port 2 in RMII mode with external PHY) ....................................... 28 AX88613 EEPROM Reference Setting (Port 2 in Rev-RMII mode) .............................................................. 31
1. Introduction
ASIX Electronics provides some multi-port embedded Ethernet controllers that support different processor host interfaces commonly used in embedded system applications. The supported processor host interfaces are PCI bus, non-PCI bus (SRAM-like) and Ethernet MACs MII/RMII bus. The following URL provides detailed online resource of ASIX Electronics multi-port embedded Ethernet solutions: (Refer to http://www.asix.com.tw/products.php?op=ProductList&PLine=65). This user guide applies specifically to the following multi-port Ethernet controllers, namely, AX88742, AX88783, AX88782 and AX88613. 2-Port PCI Fast Ethernet AX88742 -- 32-bit PCI 2-Port 10/100M Fast Ethernet Controller 2-Port Non-PCI Fast Ethernet AX88783 -- Non-PCI 8/16/32-bit 2-Port 10/100M Fast Ethernet Controller AX88782 -- Non-PCI 8/16-bit 2-Port 10/100M Fast Ethernet Controller 2-Port MII/RMII Fast Ethernet AX88613 -- 3-Port 10/100M Fast Ethernet Switch Controller This user guide provides the information about the EEPROM configuration of ASIX Electronics multi-port embedded Ethernet controllers.
2. EEPROM Device Selection

The multi-port embedded Ethernet controllers support 8-bit mode 93C46, 93C56 and 93C66 EEPROM. The multi-port embedded Ethernet controllers will detect the CS and SK signals state (Pull-Up or Pull-Down) to decide the EEPROM device type (93C46, 93C56 or 93C66) during the hardware reset cycle or the reload EEPROM command. The following table defines the EEPROM device type based on the CS and SK signals. The PD means the signal is connected to ground through a 4.7K resistor, and PU means the signal is connected to 3.3V VCC through a 4.7K resistor. EEPROM size (Byte) N/A (default) 1K(93C46) 2K(93C56) 4K(93C66)
Table 1.
SK PD PD PU PU
CS PD PU PD PU
EEPROM Device Selection Table (PD: Pull-Down, PU: Pull-Up)
Note: 1. The multi-port embedded Ethernet controllers can only support 8-bit mode 93C46, 93C56 and 93C66 EEPROM. Please make sure you select a correct EEPROM type on your target applications. 2. The EEPROM is optional for AX88783/AX88782 if the MAC addresses of Port 0 and Port 1 can be stored on the Flash memory of your embedded system. In this case, the AX88783/AX88782 driver should read the MAC addresses of Port 0 and Port 1 from the Flash memory and then configure the related Port 0/Port 1 MAC address registers for normal operation. 3. The EEPROM is optional for AX88742 if the MAC addresses of Port 0 and Port 1 can be stored on the Flash memory of your embedded system and the AX88742 PCI Vendor ID and Device ID of your application uses the AX88742 default Vendor ID (0x125B) and Device ID (0x7420). In this case, the AX88742 driver should read the MAC addresses of Port 0 and Port 1 from the Flash memory and then configure the related Port 0/Port 1 MAC address registers for normal operation. 4. The EEPROM is optional for AX88613 if your MCU supports the SPI interface and the MAC addresses of Port 0 and Port 1 can be stored on the Flash memory of your embedded system. In this case, your MCU firmware can read the MAC addresses of Port 0 and Port 1 from the Flash memory and then configure proper AX88613 registers through the SPI interface for normal operation. Please refer to Section 4.4 of AX88613 datasheet for more details about the AX88613 SPI Data Write command format.
3. EEPROM Data Related Information 3-1. EEPROM Data Format

The multi-port embedded Ethernet controllers will auto-configure the MAC registers based on the write commands in the EEPROM during the hardware reset operation or the reload EEPROM operation. The following is the data format of EEPROM Write Command, Address [9:2] Data [31:24] Data [23:16] Data [15:8] Data [7:0]
Address [9:2]: MAC register address (Address[9:2] * 4) Data [31:24], Data [23:16], Data [15:8], Data [7:0]: MAC register written 32-bit value The EEPROM Write Command contains the MAC register address and four bytes of data because the MAC registers of the multi-port embedded Ethernet controllers are 32-bit wide. The Address [9:2] value 0x00 and 0xFF are reserved. If the Address [9:2] value is 0x00 or 0xFF, the multi-port embedded Ethernet controllers will ignore this write command and continue to run next write command. The EEPROM Write End Command is defined as Address [9:2] = 0x00 and Data [31:0] = 0x84149435. The EEPROM used space should be terminated by an EEPROM Write End Command. When the multi-port embedded Ethernet controllers decode this Write End Command, the multi-port embedded Ethernet controllers will stop the EEPROM auto-loading operation. If the Write End Command is not defined on the last field of EEPROM used space, the multi-port embedded Ethernet controllers will read through all 1K (93C46), 2K (93C56) or 4K (93C66) pre-defined EEPROM address space. In this case, the rest of EEPROM unused space should be filled in 00 or FF to avoid to run the wrong EEPROM write commands due to the unexpected data in the EEPROM unused space.
EEPROM Address 0 1 2 3 4 5 6 7 8 9 : : : EEPROM Contents Address [9:2] (1St Write Command) Data [31:24] Data [23:16] Data [15:8] Data [7:0] Address [9:2] (2nd Write Command) Data [31:24] Data [23:16] Data [15:8] Data [7:0] : : :
EEPROM Data Format
Table 2.
3-2. EEPROM Write Command Examples

The following are some examples of the EEPROM write commands, 3-2-1. Configure Port 0/Port 1 MAC Addresses and Enable PHY0/PHY1
Addr[9:2] 8C Data[31:24] 56 Port0 MAC Add[23:16] Data[23:16] 78 Port0 MAC Add[31:24] Data[15:8] 90 Port0 MAC Add[39:32] Data[7:0] AB Port0 MAC Add[47:40] EEPROM Write Command Set Port 0 MAC address 12 34 56 78 90 AB Write 0x567890AB to MAC register address 0x230 (i.e. 0x8C * 4 = 0x230) Write 0x00001234 to MAC register address 0x234 (i.e. 0x8D * 4 = 0x234) Set Port 1 MAC address AA BB CC DD EE FF Write 0xCCDDEEFF to MAC register address 0x270 (i.e. 0x9C * 4 = 0x270) Write 0x0000AABB to MAC register address 0x274 (i.e. 0x9D * 4 = 0x274) Enable PHY0 and PHY1 Set PHY ID 0 = 10000 Set PHY ID 1 = 10001 Enable PHY Power Saving function Write 0x11011011 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Enable switch Auto-polling function Write 0x33001110 to MAC register address 0x140 (i.e. 0x50 * 4 = 0x140) The EEPROM Write End Command
8D
9C
12 Port0 MAC Add[7:0] CC DD EE Port1 MAC Port1 MAC Port1 MAC Add[23:16] Add[31:24] Add[39:32]
00
00
34 Port0 MAC Add[15:8] FF Port1 MAC Add[47:40]
9D
00
00
01
11 01 Port 1 PHY ID
AA Port1 MAC Add[7:0] 10 Port 0 PHY ID
BB Port1 MAC Add[15:8] 11
50
33
00
11 10 Port 1 PHY Port 0 PHY ID ID 94 35
00
84
14

3-2-2.
Addr[9:2] 0F
Indirectly Write PHY0/PHY1 Registers through MDIO Interface

Data[31:24] 90 {010,10000 PHY ID} Data[23:16] Data[15:8] 04 05 PHY Data[15:8] Register Address Data[7:0] E1 Data[7:0] EEPROM Write Command Indirectly Write 0x05E1 to PHY0 ANAR register (address 0x04) (PHY0 ID 0x10) through MDIO interface Write 0x900405E1 to MAC register address 0x03C (i.e. 0x0F * 4 = 0x03C) Indirectly Write 0x05E1 to PHY1 ANAR register (address 0x04) (PHY0 ID 0x11) through MDIO interface Write 0x910405E1 to MAC register address 0x03C (i.e. 0x0F * 4 = 0x03C) The EEPROM Write End Command
0F
91 04 {010,10001 PHY PHY ID} Register Address
05 Data[15:8]
E1 Data[7:0]
00
84
14
94
35
3-2-3.
Addr[9:2] BD
Set PCI Vendor/Device and Sub-Vendor/Sub-Device IDs (for AX88742 only)

Data[31:24] Data[23:16] Data[15:8] 74 20 12 Data[7:0] 5B EEPROM Write Command Set PCI Vendor ID to 0x125B and Device ID to 0x7420 Write 0x7420125B to MAC register address 0x2F4 (i.e. 0xBD * 4 = 0x2F4) Set PCI subsystem Vendor ID to 0x125B and subsystem Device ID to 0x7420 Write 0x7420125B to MAC register address 0x2F8 (i.e. 0xBE * 4 = 0x2F8) The EEPROM Write End Command
BE
74
20
12
5B
00
84
14
94
35

3-2-4.
Addr[9:2] 06
Configure L2 Routing Table for Source Port 0/Port 1

Data[31:24] 56 MAC Add. Entry #1 [23:16] EEPROM Write Command Write the MAC address 12 34 56 78 90 AB to the L2 Routing Table entry for Source Port 0 Write 0x567890AB to MAC register address 0x018 (i.e. 0x06 * 4 = 0x018) Write 0x80101234 to 80 10 12 34 MAC Add. MAC Add. MAC register address 0x01C (i.e. 0x07 * 4 = 0x01C) Entry #1 Entry #1 [7:0] [15:8] Write the MAC address AA BB CC CC DD EE FF MAC Add. MAC Add. MAC Add. MAC Add. DD EE FF to the L2 Routing Table entry for Source Port 1 Entry #2 Entry #2 Entry #2 Entry #2 Write 0xCCDDEEFF to [23:16] [31:24] [39:32] [47:40] MAC register address 0x018 (i.e. 0x06 * 4 = 0x018) Write 0x8011AABB to 80 11 AA BB MAC Add. MAC Add. MAC register address 0x01C (i.e. 0x07 * 4 = 0x01C) Entry #2 Entry #2 [7:0] [15:8] 84 14 94 35 The EEPROM Write End Command Data[23:16] 78 MAC Add. Entry #1 [31:24] Data[15:8] 90 MAC Add. Entry #1 [39:32] Data[7:0] AB MAC Add. Entry #1 [47:40]
07
06
07
00

3-2-5.
Addr[9:2] 04
Configure 802.1Q VLAN Entry

Data[31:24] Data[23:16] Data[15:8] FC 40 00 Data[7:0] 00 EEPROM Write Command Enable 802.1Q Port-base VLAN Write 0xFC400000 to MAC register address 0x010 (i.e. 0x04 * 4 = 0x010) Set VLAN Entry 0 Set Port 0/1/2 to the same VLAN group with VLAN ID 4095 (0xFFF) and Port 0 with VLAN Tag, Port 1/2 without VLAN Tag Write 0x0007FFCF to MAC register address 0x090 (i.e. 0x24 * 4 = 0x090) Set VLAN Entry 1 Set Port 0/1 to the same VLAN group with VLAN ID 80 (0x050) and Port 0 with VLAN Tag, Port 1 without VLAN Tag Write 0x0004140B to MAC register address 0x094 (i.e. 0x25 * 4 = 0x094) Set VLAN Entry 2 Set Port 0/2 to the same VLAN group with VLAN ID 48 (0x030) and Port 0 with VLAN Tag, Port 2 without VLAN Tag Write 0x00040C0D to MAC register address 0x098 (i.e. 0x26 * 4 = 0x098) The EEPROM Write End Command
24
00
07
FF
CF
25
00
04
14
0B
26
00
04
0C
0D
00
84
14
94
35

3-2-6.
Addr[9:2] 04
Configure Non-802.1Q Port-Based VLAN Entry

Data[31:24] Data[23:16] Data[15:8] FC 10 00 Data[7:0] 00 EEPROM Write Command Enable Non-802.1Q Port-based VLAN Write 0xFC100000 to MAC register address 0x010 (i.e. 0x04 * 4 = 0x010) Set Port 0/Port 2 to group 1 and set Port 1/Port 2 to group 2 Write 0x03650000 to MAC register address 0x020 (i.e. 0x8 * 4 = 0x020) The EEPROM Write End Command
08
03
65
00
00
00
84
14
94
35

3-2-7.
Addr[9:2] 04
Configure 802.1P QoS Mapping Table for Port 0/1/2

Data[31:24] Data[23:16] Data[15:8] FC 20 00 Data[7:0] 00 EEPROM Write Command Enable 802.1P QoS Function Write 0xFC200000 to MAC register address 0x010 (i.e. 0x04 * 4 = 0x010) Set Port 0 QoS Mapping Table Mapping QoS Priority values [0:7] to 4 internal queues [0:3] for Port 0 Write 0x0000FA50 to MAC register address 0x204 (i.e. 0x81 * 4 = 0x204) Set Port 1 QoS Mapping Table Mapping QoS Priority values [0:7] to 4 internal queues [0:3] for Port 1 Write 0x0000FA50 to MAC register address 0x244 (i.e. 0x91 * 4 = 0x244) Set Port 2 QoS Mapping Table Mapping QoS Priority values [0:7] to 4 internal queues [0:3] for Port 2 Write 0x0000FA50 to MAC register address 0x284 (i.e. 0xA1 * 4 = 0x284) The EEPROM Write End Command
81
00
00
FA
50
91
00
00
FA
50
A1
00
00
FA
50
00
84
14
94
35

3-2-8.
Addr[9:2] 04
Configure IGMP Multicast IP Group Table Entry

Data[31:24] Data[23:16] Data[15:8] FC 00 20 Data[7:0] 00 EEPROM Write Command Enable IGMP Function Write 0xFC002000 to MAC register address 0x010 (i.e. 0x04 * 4 = 0x010) Set IGMP Entry 0 Set Port 0 to Multicast IP 225.2.3.4 Group Write 0x91020304 to MAC register address 0x150 (i.e. 0x54 * 4 = 0x150) Set IGMP Entry 1 Set Port 0/1 to Multicast IP 229.6.7.8 Group Write 0xB5060708 to MAC register address 0x154 (i.e. 0x55 * 4 = 0x154) Set IGMP Entry 2 Set Port 0/2 to Multicast IP 239.10.11.12 Group Write 0xDF0A0B0C to MAC register address 0x158 (i.e. 0x56 * 4 = 0x158) The EEPROM Write End Command
54
91
02
03
04
55
B5
06
07
08
56
DF
0A
0B
0C
00
84
14
94
35

3-2-9.
Addr[9:2] 80
Configure RX Rate Limit Function

Data[31:24] Data[23:16] Data[15:8] 00 01 01 Data[7:0] 99 EEPROM Write Command Configure Port 0 MAC and enable Rx Rate Limit function Write 0x00010199 to MAC register address 0x200 (i.e. 0x80 * 4 = 0x200) Configure Port 1 MAC and enable Rx Rate Limit function Write 0x00010199 to MAC register address 0x240 (i.e. 0x90 * 4 = 0x240) Configure Port 2 MAC and enable Rx Rate Limit function Write 0x00012000 to MAC register address 0x280 (i.e. 0xA0 * 4 = 0x280) Set Port 0 Rx Rate Limit Write 0xFFFF0001 to MAC register address 0x21C (i.e. 0x87 * 4 = 0x21C) Set Port 1 Rx Rate Limit Write 0xFFFF0001 to MAC register address 0x25C (i.e. 0x97 * 4 = 0x25C) Set Port 2 Rx Rate Limit Write 0xFFFF0001 to MAC register address 0x29C (i.e. 0xA7 * 4 = 0x29C) The EEPROM Write End Command
90
00
01
01
99
A0
00
01
20
00
87
FF
FF
00
01
97
FF
FF
00
01
A7
FF
FF
00
01
00
84
14
94
35

3-2-10. Configure TX Rate Limit Function
80 00 02 01 99 Configure Port 0 MAC and enable Tx Rate Limit function Write 0x00020199 to MAC register address 0x200 (i.e. 0x80 * 4 = 0x200) Configure Port 1 MAC and enable Tx Rate Limit function Write 0x00020199 to MAC register address 0x240 (i.e. 0x90 * 4 = 0x240) Configure Port 2 MAC and enable Tx Rate Limit function Write 0x00022000 to MAC register address 0x280 (i.e. 0xA0 * 4 = 0x280) Set Port 0 Tx Rate Limit Write 0x0001FFFF to MAC register address 0x21C (i.e. 0x87 * 4 = 0x21C) Set Port 1 Tx Rate Limit Write 0x0001FFFF to MAC register address 0x25C (i.e. 0x97 * 4 = 0x25C) Set Port 2 Tx Rate Limit Write 0x0001FFFF to MAC register address 0x29C (i.e. 0xA7 * 4 = 0x29C) The EEPROM Write End Command
90
00
02
01
99
A0
00
02
20
00
87
00
01
FF
FF
97
00
01
FF
FF
A7
00
01
FF
FF
00
84
14
94
35
4. EEPROM FAQs
4-1. Do we need to register our own PCI Vendor ID/Device ID and Subsystem Vendor ID/Subsystem Device ID for AX88742 applications?
The Vendor ID and Device ID registers identify the device, and are commonly called the PCI ID. The 16-bit vendor ID is allocated by the PCI SIG (http://www.pcisig.com/). The 16-bit device ID is then assigned by the vendor. There is an ongoing project to collect all known Vendor and Device IDs. (See http://www.pcidatabase.com/ for more details.) The Subsystem Vendor ID and the Subsystem Device ID further identify the device. The Vendor ID is that of the chip manufacturer, and the Subsystem Vendor ID is that of the card manufacturer. The Subsystem Device ID is assigned by the subsystem vendor, but is assigned from the same number space as the Device ID. The answer to above question really depends on the real requirements of your AX88742 target applications. If your AX88742 application doesnt have special requirements and can work with the standard AX88742 drivers, you can consider using ASIXs AX88742 default PCI Vendor ID (125Bh)/Device ID (7420h) and Subsystem Vendor ID (125Bh)/Subsystem Device ID (7420h) directly.
4-2. Do I have to assign two unique MAC addresses for Port 0 and Port 1 of every ASIX Multi-Port Ethernet Controller based devices?
Yes, every Ethernet device must have a unique MAC address. Users should assign two unique MAC addresses in the EEPROM for Port 0 and Port 1 of every ASIX Multi-Port Ethernet Controller based devices. You should refer to Section 4-2 to register a block of MAC addresses for your company.
4-3. How to register a MAC/Ethernet address from IEEE-SA?

You must first have an OUI or an IAB, to which you then append 24 or 12 bits respectively, in a way that makes the resulting 48-bit number unique, i.e., your 24 or 12 bits must be unique within your organization, which will require coordination among all the users of your organization's OUI or IAB. Please visit the IEEE-SA web site (http://standards.ieee.org/regauth/registry_OUI.html) for details.
ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide 4-4. Is the EEPROM device required for AX88613 applications?
The AX88613 supports 8-bit mode 93C46/93C56/93C66 EEPROM. The EEPROM is optional for AX88613 if the MCU on your target platform supports the SPI interface to configure AX88613 registers through AX88613 SPI interface directly. Otherwise, you should implement the EEPROM on your AX88613 applications to configure AX88613 to reach the specific requirements (such as routing table, VLAN, etc.) of your AX88613 applications.
4-5. How to program the EEPROM content on AX88613 applications?

The following are the recommended solutions to program the EEPROM on AX88613 applications. 1. You can program AX88613 EEPROM content by AX88613 ECR register (Address 0x144) through the SPI interface. Please refer to Section 5.1.30 EEPROM Control Register (ECR) of AX88613 datasheet for more details. 2. You can use the GPIO pins of your MCU to simulate the SPI interface and create the necessary SPI command signals through these MCUs GPIO pins. Please refer to Section 4.4 Serial Peripheral Interface (SPI) of AX88613 datasheet for more details. 3. If your MCU doesn't support either SPI interface or GPIO pins, you can consider preprogramming the EEPROM content by the universal programmer or the EEPROM manufacturer.
Appendix 1. AX88742 EEPROM Reference Setting

The EEPROM device is optional for the AX88742 application and can be used to store the unique MAC addresses for AX88742 Port 0 and Port 1. If the Port 0 and Port 1 MAC addresses can be stored on the Flash memory of your embedded system and your AX88742 application can use the AX88742 default PCI Vendor ID (0x125B)/Device ID (0x7420), you can consider eliminating the EEPROM device on your AX88742 application. The AX88742 driver can configure the rest of initialization process later. The following is an example of the AX88742 EEPROM default setting.
Addr[9:2] 01 Reg:004 Data[31:24] Data[23:16] Data[15:8] 11 01 10 Data[7:0] 01 EEPROM Write Command
Set Port 0/Port 1 internal PHY to normal operation mode

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set Port 0 MAC address 00 0E C6 00 12 38 Write 0xC6001238 MAC address to MAC register address 0x230 (i.e. 0x8C * 4 = 0x230) Note 0x000EC6 is ASIX Electronics company MAC address. You should replace with your own company MAC address value. Write 0x0000000E to MAC register address 0x234 (i.e. 0x8D * 4 = 0x234) Set Port 1 MAC address 00 0E C6 00 12 39 Write 0xC6001239 MAC address to MAC register address 0x270 (i.e. 0x9C * 4 = 0x270) Write 0x0000000E to MAC register address 0x274 (i.e. 0x9D * 4 = 0x274) Set PCI Vendor ID to 0x125B and Device ID to 0x7420 Write 0x7420125B to MAC register address 0x2F4 (i.e. 0xBD * 4 = 0x2F4) Set PCI subsystem Vendor ID to 0x125B and subsystem Device ID to 0x7420 Write 0x7420125B to MAC register address 0x2F8 (i.e. 0xBE * 4 = 0x2F8) The EEPROM Write End Command
8C Reg:230
C6 00 12 38 Port0 MAC Port0 MAC Port0 MAC Port0 MAC Add[23:16] Add[31:24] Add[39:32] Add[47:40]
8D Reg:234 9C Reg:270
00 Port0 MAC Add[7:0] C6 00 12 Port1 MAC Port1 MAC Port1 MAC Add[23:16] Add[31:24] Add[39:32]
00
00
0E Port0 MAC Add[15:8] 39 Port1 MAC Add[47:40]
9D Reg:274 BD Reg:2F4
00
00
74
20
00 Port1 MAC Add[7:0] 12
0E Port1 MAC Add[15:8] 5B
BE Reg:2F8
74
20
12
5B
00
84
14
Table 3.
94
35
AX88742 EEPROM Reference Setting
Appendix 2. AX88783/AX88782 EEPROM Reference Setting

The EEPROM device is optional for the AX88783/AX88782 applications and can be used to store the unique MAC addresses for AX88783/AX88782 Port 0 and Port 1. If the Port 0 and Port 1 MAC addresses can be stored on the Flash memory of your embedded system, you can consider eliminating the EEPROM device on your AX88783/AX88782 applications. The AX88783/AX88782 driver can configure the rest of initialization process later. The following is an example of the AX88783/AX88782 EEPROM default setting.

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set Port 0 MAC address 00 0E C6 00 12 38 Write 0xC6001238 MAC address to MAC register address 0x230 (i.e. 0x8C * 4 = 0x230) Note 0x000EC6 is ASIX Electronics company MAC address. You should replace with your own company MAC address value. Write 0x0000000E to MAC register address 0x234 (i.e. 0x8D * 4 = 0x234) Set Port 1 MAC address 00 0E C6 00 12 39 Write 0xC6001239 MAC address to MAC register address 0x270 (i.e. 0x9C * 4 = 0x270) Write 0x0000000E to MAC register address 0x274 (i.e. 0x9D * 4 = 0x274) The EEPROM Write End Command
8C Reg:230
C6 00 12 38 Port0 MAC Port0 MAC Port0 MAC Port0 MAC Add[23:16] Add[31:24] Add[39:32] Add[47:40]
8D Reg:234 9C Reg:270
00 Port0 MAC Add[7:0] C6 00 12 Port1 MAC Port1 MAC Port1 MAC Add[23:16] Add[31:24] Add[39:32]
00
00
0E Port0 MAC Add[15:8] 39 Port1 MAC Add[47:40]
9D Reg:274 00
00
00
84
14
Table 4.
00 Port1 MAC Add[7:0] 94
0E Port1 MAC Add[15:8] 35
AX88783/AX88782 EEPROM Reference Setting
Appendix 3. AX88613 EEPROM Reference Setting

The EEPROM device is optional for AX88613 if your MCU supports the SPI interface and the MAC addresses of Port 0 and Port 1 can be stored on the Flash memory of your embedded system. In this case, your MCU firmware can read the MAC addresses of Port 0 and Port 1 from the Flash memory and then configure proper AX88613 registers through the SPI interface for normal operation. Please refer to Section 4.4 of AX88613 datasheet for more details about the AX88613 SPI Data Write command format.
A3-1. Port 2 in MII Mode with External PHY (default setting for demo board)
The following is an example of the AX88613 EEPROM setting when the AX88613 Port 2 was set to MII mode with external PHY. The EEPROM of AX88613 demo board is set to MII mode by default. AX88613 Port 0 & Port 1 in internal PHY mode, Port 2 in MII mode with external PHY

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set PHY0 & PHY1 LED Display Mode Write 0x03000104 to MAC register address 0x0DC (i.e. 0x37* 4 = 0x0DC) Set Port 2 to MII mode Write 0x400C0000 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0) Delay (No operation)
37 Reg:0DC
03
00
01
04
7C Reg:1F0
40
0C
00
00
00 52 Reg:148
00 07
00 FF
00 FF
00 FF
Delay about 1.3 second (0x07FFFFFF 134,217,727 * 10ns = 1.3 sec) to wait for PHY initialization completion
Write 0x07FFFFFF to MAC register address 0x148 (i.e. 0x52* 4 = 0x148)
Note: AX88613 BLCR register (address 0x148) works as a delay time counter (in 10ns unit) during auto-loading EEPROM operation. Users can fine tune this delay time counter to reach the real requirements on your AX88613 target applications.

0F Reg:03C 90 04 05 E1
Write PHY0 ANAR PHY register through MDIO Read/Write Control register
Write 0x900405E1 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Note: The default PHY address of PHY 0 is 0x10 Delay for MDIO process (No operation)
00 0F Reg:03C
00 91
00 04
00 05
00 E1
00 0F Reg:03C
00 95 [28:24]: External PHY ID 0x15
00 04
00 05
00 E1
Write Port 2 external PHY ANAR PHY register through MDIO Read/Write Control register
Write 0x950405E1 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Note: Assume the PHY address of Port 2 external PHY is 0x15 Delay for MDIO process (No operation)
00 0F Reg:03C
00 90
00 00
00 33
00 00
Restart PHY0 auto-negotiation function through MDIO Read/Write Control register

Write 0x90003300 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Delay for MDIO process (No operation)
00 0F Reg:03C
00 91
00 00
00 33
00 00

00
00
00
00
00

0F Reg:03C 95 [28:24]: External PHY ID 0x15 00 33 00
Restart Port 2 external PHY autonegotiation function through MDIO Read/Write Control register
Write 0x95003300 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Enable auto-polling function on internal PHY0/PHY1 and Port 2 external PHY Write 0x77151110 to MAC register address 0x140 (i.e. 0x50 * 4 = 0x140) The EEPROM Write End Command
50 Reg:140
77
15 [20:16]: External PHY ID 0x15 14
11
10
00
84
Table 5.
94
35
AX88613 EEPROM Reference Setting (Port 2 in MII mode with external PHY)
ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide A3-2. Port 2 in Reverse MII Mode
The following is an example of the AX88613 EEPROM setting when the AX88613 Port 2 was set to Reverse MII mode. AX88613 Port 0 & Port 1 in internal PHY mode, Port 2 in Reverse MII mode

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set PHY0 & PHY1 LED Display Mode Write 0x03000104 to MAC register address 0x0DC (i.e. 0x37* 4 = 0x0DC) Set Port 2 to Reverse MII mode Write 0x04080000 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0) Delay (No operation)
37 Reg:0DC
03
00
01
04
7C Reg:1F0
04
08
00
00
00 52 Reg:148
00 07
00 FF
00 FF
00 FF
0F Reg:03C
90
04
05
E1
Note: AX88613 BLCR register (address 0x148) works as a delay time counter (in 10ns unit) during auto-loading EEPROM operation. Users can fine tune this delay time counter to reach the real requirements on your AX88613 target applications. Write PHY0 ANAR PHY register through MDIO Read/Write Control register
00
00
00
00
00

0F Reg:03C 91 04 05 E1
00 0F Reg:03C
00 90
00 00
00 33
00 00

00 0F Reg:03C
00 91
00 00
00 33
00 00

Write 0x91003300 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Delay for MDIO process (No operation) Set Port 2 slave MDC/MDIO PHY address to 0x12 (for Rev-MII interface) Write 0xC0000012 to MAC register address 0x1A0 (i.e. 0x68 * 4 = 0x1A0) Enable Port 2 MAC function and force to 100Mbps Full-duplex mode Write 0x00000199 to MAC register address 0x280 (i.e. 0xA0 * 4 = 0x280) Enable auto-polling function on internal PHY0/PHY1 Write 0x33001110 to MAC register address 0x140 (i.e. 0x50 * 4 = 0x140) The EEPROM Write End Command
00 68 Reg:1A0
00 C0
00 00
00 00
00 12
A0 Reg:280
00
00
01
99
50 Reg:140
33
00
11
10
00
84
Table 6.
14
94
35
AX88613 EEPROM Reference Setting (Port 2 in Rev-MII mode)
ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide A3-3. Port 2 in RMII Mode with External PHY
The following is an example of the AX88613 EEPROM setting when the AX88613 Port 2 was set to RMII mode with external PHY. AX88613 Port 0 & Port 1 in internal PHY mode, Port 2 in RMII mode with external PHY

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set PHY0 & PHY1 LED Display Mode Write 0x03000104 to MAC register address 0x0DC (i.e. 0x37* 4 = 0x0DC) Set Port 2 to RMII mode, Low-Port, Enable RMII clock generator, MDC I/O PAD Select Write 0x40080004 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0) Enable Port 2 RMII interface and output 50MHz clock signals to P2_REFCLKO (pin #54) Write 0x40084044 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0)
37 Reg:0DC
03
00
01
04
7C Reg:1F0
40
08
00
04
7C Reg:1F0
40
08
40
44
Note: Please set bit14 (CLK50_EN) when your AX88613 application needs to output 50MHz clock signals from AX88613 P2_REFCLKO pin.
00 52 Reg:148 00 07 00 FF 00 FF 00 FF Delay (No operation)

0F Reg:03C 90 04 05 E1
00 0F Reg:03C
00 91
00 04
00 05
00 E1
00 0F Reg:03C
00 95 [28:24]: External PHY ID 0x15
00 04
00 05
00 E1
Write Port 2 external PHY ANAR PHY register through MDIO Read/Write Control register
Write 0x950405E1 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Note: Assume the PHY address of Port 2 external PHY is 0x15 Delay for MDIO process (No operation)
00 0F Reg:03C
00 90
00 00
00 33
00 00

00 0F Reg:03C
00 91
00 00
00 33
00 00

00
00
00
00
00

0F Reg:03C 95 [28:24]: External PHY ID 0x15 00 33 00
Restart Port 2 external PHY autonegotiation function through MDIO Read/Write Control register
Write 0x95003300 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Enable auto-polling function on internal PHY0/PHY1 and Port 2 external PHY Write 0x77151110 to MAC register address 0x140 (i.e. 0x50 * 4 = 0x140) The EEPROM Write End Command
50 Reg:140
77
15 [20:16]: External PHY ID 0x15 14
11
10
00
84
Table 7.
94
35
AX88613 EEPROM Reference Setting (Port 2 in RMII mode with external PHY)
ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide A3-4. Port 2 in Reverse RMII Mode
The following is an example of the AX88613 EEPROM setting when the AX88613 Port 2 was set to Reverse RMII mode. AX88613 Port 0 & Port 1 in internal PHY mode, Port 2 in Reverse RMII mode

Write 0x11011001 to MAC register address 0x004 (i.e. 0x01 * 4 = 0x004) Set PHY0 & PHY1 LED Display Mode Write 0x03000104 to MAC register address 0x0DC (i.e. 0x37* 4 = 0x0DC) Set Port 2 to RMII mode, Low-Port, Enable RMII clock generator Write 0x00080004 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0) Enable Port 2 RMII interface and output 50MHz clock signals to P2_REFCLKO (pin #54) Write 0x00084044 to MAC register address 0x1F0 (i.e. 0x7C* 4 = 0x1F0)
37 Reg:0DC
03
00
01
04
7C Reg:1F0
00
08
00
04
7C Reg:1F0
00
08
40
44
Note: Please set bit14 (CLK50_EN) when your AX88613 application needs to output 50MHz clock signals from AX88613 P2_REFCLKO pin.
00 52 Reg:148 00 07 00 FF 00 FF 00 FF Delay (No operation)

0F Reg:03C 90 04 05 E1
00 0F Reg:03C
00 91
00 04
00 05
00 E1
00 0F Reg:03C
00 90
00 00
00 33
00 00

00 0F Reg:03C
00 91
00 00
00 33
00 00

Write 0x91003300 to MAC register address 0x03C (i.e. 0x0F* 4 = 0x03C) Delay for MDIO process (No operation) Set Port 2 slave MDC/MDIO PHY address to 0x12 (for Rev-RMII interface) Write 0xC0000012 to MAC register address 0x1A0 (i.e. 0x68 * 4 = 0x1A0) Enable Port 2 MAC function and force to 100Mbps Full-duplex mode Write 0x00000199 to MAC register address 0x280 (i.e. 0xA0 * 4 = 0x280)
00 68 Reg:1A0
00 C0
00 00
00 00
00 12
A0 Reg:280
00
00
01
99

50 Reg:140 33 00 11 10 Enable auto-polling function on internal PHY0/PHY1 Write 0x33001110 to MAC register address 0x140 (i.e. 0x50 * 4 = 0x140) The EEPROM Write End Command
00
84
Table 8.
14
94
35
AX88613 EEPROM Reference Setting (Port 2 in Rev-RMII mode)
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ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

1 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

2 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

4. EEPROM FAQs .................................................................................. 17

3 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

4 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

5 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

2. EEPROM Device Selection

EEPROM Device Selection Table (PD: Pull-Down, PU: Pull-Up)

6 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

3. EEPROM Data Related Information 3-1. EEPROM Data Format

7 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

3-2. EEPROM Write Command Examples

34 Port0 MAC Add[15:8] FF Port1 MAC Add[47:40]

AA Port1 MAC Add[7:0] 10 Port 0 PHY ID

BB Port1 MAC Add[15:8] 11

11 10 Port 1 PHY Port 0 PHY ID ID 94 35

8 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Indirectly Write PHY0/PHY1 Registers through MDIO Interface

91 04 {010,10001 PHY PHY ID} Register Address

Set PCI Vendor/Device and Sub-Vendor/Sub-Device IDs (for AX88742 only)

9 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure L2 Routing Table for Source Port 0/Port 1

10 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure 802.1Q VLAN Entry

11 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure Non-802.1Q Port-Based VLAN Entry

12 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure 802.1P QoS Mapping Table for Port 0/1/2

13 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure IGMP Multicast IP Group Table Entry

14 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Configure RX Rate Limit Function

15 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

16 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

4-3. How to register a MAC/Ethernet address from IEEE-SA?

17 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

4-5. How to program the EEPROM content on AX88613 applications?

18 Copyright (C) 2008-2010 Reserved by ASIX Electronics Corporation

ASIX Multi-Port Ethernet Controller EEPROM/Manufacture User Guide

Appendix 1. AX88742 EEPROM Reference Setting

Set Port 0/Port 1 internal PHY to normal operation mode

0E Port0 MAC Add[15:8] 39 Port1 MAC Add[47:40]

00 Port1 MAC Add[7:0] 12

0E Port1 MAC Add[15:8] 5B

AX88742 EEPROM Reference Setting

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