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Proposal of a Soft-Switching Single-Phase Three-Level Rectier

Fernando Lessa Tofoli, Ernane Antnio Alves Coelho, Luiz Carlos de Freitas, Valdeir Jos Farias, and Joo Batista Vieira, Jr.
a limitation [1]. By connecting the switching elements of each phase with the capacitive center point of the output voltage, one can obtain the three-phase three-level rectier studied in [5]. According to Ide et al. [6], it can operate with half of the losses veried in the topology with the wye-connected sixswitch bridge. For low-power applications, the concept of threelevel rectiers can be extended to a single-phase structure [7], and these three-level structures present good characteristics [3]. In three-level rectiers, the reverse recovery of boost diodes is an undesirable effect [8]. It occurs via a low-impedance loop, formed by the turned-on switches and the output stages, causing high current peaks in the switches at the same time when they are submitted to the output voltage. Thus, conduction losses are quite high during turning on. SiC Schottky diodes present zero-recovery current and negligible switching losses and have become a benchmark for virtually lossless operation. They can deliver highly efcient switching at frequencies up to several hundred kilohertz and have been deployed as the boost diodes in PFC units of switched-mode power supplies operating in continuous-current mode. However, SiC diodes remain more expensive than their silicon equivalents due to higher material costs. To obtain soft switching, many alternatives were developed [10][12], but they are not well suited for this type of application because it demands a lot of components to obtain soft-switching characteristics. Another alternative is the introduction of inductors between diodes and switches, establishing some impedance path regarding the recovery of diodes. It limits the current increasing rate during the turning on and reduces the peak current that also ows through the switches, providing a zero-current switching (ZCS) at turning on [9]. Another problem related to commutation lies in the d/dt rates and high-frequency voltage ripple during turning off, which can be mitigated by the introduction of capacitors in parallel with the switches, providing a zero-voltage switching (ZVS) during the turning off. Within this context, this paper studies a single-phase threelevel rectier with soft switching. Theoretical background on the proposed snubber is presented, which is associated with the topology. The theoretical study, design procedure, and simulation and experimental results regarding the converter are presented to validate the proposal. II. N ONDISSIPATIVE S NUBBER A snubber cell is applied to the single-phase three-level rectier, as shown in Fig. 1(a). It is an adaptation of the structure

AbstractThis paper is concerned with the study of a singlephase boost-type three-level rectier. The converter is supposed to present high input power factor, low current harmonics, low total harmonic distortion, and simple control scheme. In order to minimize switching losses, a passive nondissipative snubber is associated with the aforementioned converter. The theoretical analysis, design procedure, and analytical results regarding a 1.2-kW prototype are presented to validate the proposal. Index TermsPower-factor correction (PFC), soft switching, three-level rectiers.

I. I NTRODUCTION N ORDER to meet the requirements in the proposed standards such as the IEC 61000-3-2 and IEEE Std 519 on the quality of the input current that can be drawn by lowpower equipment, a power-factor-correction (PFC) circuit is typically added at the utility interface of an acdc switch-mode power supply. The boost PFC circuit operating in continuous conduction mode is by far the popular choice for mediumand high-power (from 400 W to a few kilowatts) applications. This is because the continuous nature of the boost converters input current results in low conducted electromagnetic interference (EMI) compared to other active PFC topologies such as the buckboost and buck converters. Another way to obtain the PFC is using static lters between the power source and the diode bridge [1], but this is a heavy and bulky solution because the lter frequency is low (5060 Hz) and the lter needs big capacitors and inductors. For three-phase applications, several pulsewidth-modulated boost rectiers are available in the literature. The six-switch full-bridge rectier shown in [1] allows bidirectional power ow, although current stresses are quite high and very high switching frequencies are necessary to reduce the lters size. This converter presents high cost and low efciency if compared to similar topologies. The proposal developed in [3] presents low cost and inherent simplicity, but it operates in discontinuous conduction mode, causing high EMI levels. Another alternative lies in a topology where a three-phase full-bridge rectier is associated with a wye-connected six-switch bridge. It presents low cost, reduced losses, and high reliability, but the unidirectional power ow is

Manuscript received January 19, 2006; revised October 3, 2007. This work was supported in part by the CAPES, by the CNPq, and by the FAPEMIG. The authors are with the Faculdade de Engenharia Eltrica Ncleo de Eletrnica de Potncia, Universidade Federal de Uberlndia, 38400-902 Uberlndia, Brazil (e-mail: batista@ufu.br). Digital Object Identier 10.1109/TIE.2007.896052

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Fig. 1. Single-phase three-level rectier associated with a passive snubber cell. (a) Proposed topology. (b) Simplied topology.

proposed in [10], but a single resonant inductor is employed instead, which is possible according to the rules stated in [9]. It consists of one inductor, two capacitors, and three diodes. Two cells are used in the rectier since it is analogous to the operation of two boost converters [7]. Let us consider only one boost converter due to the inherent symmetry of the circuit. Snubber inductor Ls is designed to restrict di/dt of the reverse-recovery current to achieve ZCS turning on. Snubber capacitor Cs1 is placed in parallel with Da12 and Da13 and isolated by diode Da11 . Diodes Da12 and Da13 are freewheeling during the turning off. It is designed to restrict d/dt of the drainsource voltage to achieve ZVS turning off. ZVS turning on and off of the boost diode are also obtained. Switching losses and EMI noise during turning on and turning off are drastically reduced by the snubber cell. All energy absorbed in the snubber inductor and snubber capacitor is transferred to the buffer capacitor Cb1 . Energy recovery is achieved by discharging Cb1 to the output. However, conduction losses tend to increase. The original hard-switching topology has four operating stages [7], and the current ows through only two semiconductor devices simultaneously in any of them. The resulting soft-switching topology can be described by eight operating stages, and the current ows through at most three semiconductor elements in one of the stages, as it will be seen in the forthcoming analysis. III. O PERATING P RINCIPLE AND M ATHEMATICAL A NALYSIS Fig. 1(b) shows the simplied circuit considered in the analysis of the operating stages. Additionally, the following conditions are assumed. 1) All semiconductors are ideal except for diodes Db1 and Db2 . 2) Since bidirectional power ow is possible due to switches S1 and S2 , and also intrinsic diodes Ds1 and Ds2 [7], they can be replaced by a bidirectional switch S . 3) Considering that loads are perfectly balanced, output capacitances Co1 and Co2 are treated as constant voltage sources Vo . If loads are unbalanced, asymmetry between the positive and negative half cycles of the input current results. Therefore, the operation will only be possible if

an additional control circuit is implemented to compensate such imbalance. 4) The input current Ii is constant within one switching cycle. 5) The boost inductance is much greater than Ls . The equivalent circuits are given in Fig. 2, and the main theoretical waveforms are shown in Fig. 3. Only the operation in the positive half cycle of the supply voltage is considered, yielding eight stages. A. First Stage [t0 , t1 ] Switch S is turned on at t0 . During the turning-on process, diode Db1 is not immediately turned off because of the reverserecovery phenomenon. The increase rate of the draincurrent is restricted by the snubber inductor to softly turn on the MOSFET. The current through Ls is iLs (t) = Ii (t0 ) where ii (t) is the input current. B. Second Stage [t1 , t2 ] The reverse-recovery phenomenon nishes at t1 . As soon as Db1 is turned off, diode Da12 is naturally turned on because VCs1 and VCb1 are equal to zero. Snubber inductor Ls , snubber capacitor Cs1 , and buffer capacitor Cb1 are charged by the output through the rst resonant path Vo Cs1 Da12 Cb1 Ls S . The increase rate of the voltage across Db1 , which is equal to VCs1 + VCb1 , is restricted to achieve ZVS turning off of diode Db1 . Snubber inductor current, snubber capacitor voltage, and buffer capacitor voltage are iLs (t) = Vo sin [1 (t t1 )] Z1 (2) (3) (4) Vo (t t0 ) Ls (1)

Irr cos [1 (t t1 )] Cs1 (t) Cb1 (t) = Cb1 (t) Cs1 + Cb1 Cs1 (t) Cs1 + Cb1

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Fig. 2. Equivalent circuits of the operating stages. (a) First stage. (b) Second stage. (c) Third stage. (d) Fourth stage. (e) Fifth stage. (f) Sixth stage. (g) Seventh stage. (h) Eighth stage.

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C. Third Stage [t2 , t3 ] After VCs1 is charged to output voltage Vo at t2 , Da11 is turned on, and VCs1 remains constant. The current through Ls keeps charging Cb1 through the second resonant path Da11 Da12 Cb1 . Ls and Cb1 are performing one-way resonance because of diodes Da11 and Da12 . The current through Ls and the voltage across Cb1 are given by (12) and (13), respectively. Cs1 Vo sin [2 (t t2 )] Cb1 Z2 IS2 cos [2 (t t2 )] Cb1 (t) = IS2 Z2 sin [2 (t t2 )] Cs1 + Vo cos [2 (t t2 )] Cb1 iLs (t) = where IS2 = Vo sin [1 (t2 t1 )] Z1 + Irr cos [1 (t2 t1 )] Ls Z2 = Cb1 1 2 = . Ls Cb1

(12) (13)

(14) (15) (16)

Fig. 3. Main theoretical waveforms.

where (t) = Irr Z1 sin [1 (t t1 )] Vo cos [1 (t t1 )] + Vo Irr = Z1 = 1 = Vo (t1 t0 ) Ii (t0 ) Ls Ls (Cs1 + Cb1 ) Cs1 Cb1 Cs1 + Cb1 . Ls Cs1 Cb1 (5) (6)

Since the energy in Ls is transferred to Cb1 in this stage, the following expression is valid: ECb1 (t3 ) = 1 2 Cb1 VCb1 (t3 ) 2 = ELs(t2) + ECb1(t2) 1 1 2 = Ls Irr + Cs1 Vo2 . 2 2

(7) (8)

(17)

Furthermore, the peak voltage across the buffer capacitor VCb1(pk) is VCb1(pk) = VCb1 (t3 ) =
2 +C V2 Ls Irr s1 o . Cb1

The peak value of the draincurrent through switch S is obtained by the summation of the input current and peak snubber-inductor current ILs(pk) . The peak value appears when VCb1 + VCs1 is equal to Vo , and it is given by ILs(pk) (t2 ) = Vo2 + (Irr Z1 )2 . Z1 (9)

(18)

It also determines the voltage stress across boost diode, which is equal to Vo plus VCb1(pk) . D. Fourth Stage [t3 , t4 ] At t3 , ILs is constant while Da11 and Da12 are turned off. The voltage across Cb1 is constant after instant t3 . E. Fifth Stage [t4 , t5 ] After switch S is turned off at t4 , current Ii (t4) ows through Da11 to discharge Cs1 to the output. Diodes Da12 and Da13 are not turned on because they are reverse-biased by VCs1 . The drainsource voltage across S is equal to Vo VCs1 . Slow d/dt of the drainsource voltage is obtained, whereas VCs1 is discharged from Vo to zero. Assuming that ii (t) is constant during this stage, VCs1 is given by Cs1 (t) = Vo Ii (t4 ) (t t4 ). Cs1 (19)

The rst resonance stops at t2 when VCs1 (t2 ) equals Vo because diode Da11 is turned on. By using reciprocity theorem, the snubber-inductor current at t2 is given by (Irr Z1 )2 + Vo2 Vo ILs (t2 ) = Z1
Cs1 Cb1

(10)

From (11), the energy stored in Ls and Cs1 can be given by ELs (t2 ) + ECb1 (t2 ) = 1 1 2 2 Ls ILs (t2 ) + Cb1 VCb1 (t2 ) 2 2 1 1 2 = Ls Irr + Cs1 Vo2 . (11) 2 2

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F. Sixth Stage [t5 , t6 ] Diodes Da12 and Da13 are turned on when Cs1 is discharged to zero at t5 . Then, (20) is valid. Cb1 (t) = VCb1 (t2 ) cos [2 (t t5 )] . G. Seventh Stage [t6 , t7 ] Current ILs becomes null, and diodes Da11 and Da12 are turned off. After t6 , ii (t) discharges Cb1 to output through Da13 . The ZVS turning on of diode Db1 is achieved by slow d/dt of VCb1 . Assuming that ii (t) is constant in this stage, Cb1 (t) is given by Cb1 (t) = VCb1 (t6 ) H. Eighth Stage [t7 , t8 ] Capacitor voltage VCb1 is fully discharged at t7 . Da13 is turned off, and Db1 is turned on simultaneously. The snubber energy-recovery process is accomplished when all energy in the buffer capacitor Cb1 is transferred to the output. After that, input current ii (t) ows through Db1 instead of Da13 to prevent Cs1 from being reversely charged as a new switching cycle begins. IV. P ASSIVE S NUBBER E LEMENTS Snubber inductor Ls , snubber capacitor Cs1 , and buffer capacitor Cb1 are the three main elements to be designed. The following rules should be noticed when designing the respective values. In stage 6, diodes Da11 and Da12 should be naturally turned off before the voltage across Cb1 is discharged to zero, or the remaining current will turn on Da11 , Da12 , and Da13 for the entire switching period. In other words, the following inequality has to be obeyed: 1 1 1 2 Ls Ii2 < Ls Irr + Cs1 Vo2 . 2 2 2 (22) Ii (t6 ) (t t6 ). Cb1 (21) (20)

TABLE I DESIGN SPECIFICATIONS

TABLE II PARAMETER SET EMPLOYED IN THE EVALUATION TESTS

The current stress through MOSFET and voltage stress across boost diode are given in (9) and (18), respectively. Larger Cs1 results in higher MOSFET current stress and higher diode voltage stress. According to (18), Cb1 has to be at least 16 times Cs1 to limit VCb1 to 100 V with a 400-V output, for instance. Practically, Cb1 should be about 30 times Cs1 considering reverse-recovery energy. Snubber inductor Ls should be selected as large as possible to decrease reverse-recovery loss. According to the following equation in [14], larger Ls results in lower Irr : Irr ii dii dt Ii . Ls (23)

Tradeoffs have to be made when designing Ls , Cs1 , and Cb1 . The voltage and current stresses of diodes Da11 , Da12 , and Da13 are equal to the output voltage and the input current. However, lower component ratings are also acceptable due to short snubber operating time. The voltage stress across Db1 and the current stress through MOSFET are increased by VCb1(pk) and ILs(pk) , respectively. The voltage stress across MOSFET and the current stress through Db1 are the same as those without the snubber embedded.

V. E XPERIMENTAL R ESULTS The design specications for an experimental prototype are shown in Table I. The parameter set listed in Table II is used in the implementation of the prototype. Only balanced loads are employed in the tests since a specic control circuit to compensate an eventual imbalance is necessary, which is not precisely the scope of this paper and was not implemented.

The resonant frequency in (16) should be much larger than the switching frequency to ensure the correct operation of the snubber cell.

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Fig. 4. Input current (Ii ) and input voltage (Vi ). Scales: Vi 50 V/div.; Ii 5 A/div.; time5 ms/div.

Fig. 7. Drainsource voltage and draincurrent waveforms in switch S1 . Scales: VS1 200 V/div.; IS1 10 A/div.; time1 s/div.

Fig. 5. Voltage and current waveforms regarding the snubber elements. Scales: VCs1 200 V/div.; VCb1 20 V/div.; ILs 5 A/div.; time1 s/div.

Fig. 8.

Experimental efciency.

Fig. 6. Boost-diode Db1 waveforms. Scales: VDb1 100 V/div.; IDb1 5 A/div.; time1 s/div.

both arrangements, what persists along the load range, and is above 95% under rated power with the snubber. An important advantage inherent to three-level rectiers is the operation with very low conduction losses, and this is the main reason why the snubber has not improved efciency signicantly, i.e., about 1%. However, the increase is supposed to be more evident if the snubber is employed in the three-phase version of the topology. VI. C ONCLUSION This paper has reported signicant analytical results on a single-phase three-level rectier. The topology is supposed to present high efciency once it operates with reduced conduction losses. The device voltage rating is only half of the output voltage, which is desirable for high-power applications, and minimizes both conduction and switching losses. By using an average current-mode control, the converter achieves a nearly unity power-factor operation and a low harmonic content of the input current. The proposed snubber presents only one resonant inductor instead of two magnetic elements as in [10]. Then, reduced cost, weight, and number of devices and, consequently, increased robustness are the direct advantages. The former characteristics such as soft switching, high efciency, unity power factor, and low harmonic distortion are also maintained.

The PFC is shown in Fig. 4, with low harmonic content of the input current, as the displacement power factor is 0.9963, THDI = 5.47%, and THDV = 3.61%. According to the standard IEC 61000-3-2 [15], the topology can be classied as a class-A-type equipment. It was veried that the individual harmonic components are within the acceptable limits. Of course, there is a very well-known compromise between the harmonic content of the input current and the output-voltage regulation, which must be dened in the design of the control circuit [16]. Fig. 5 shows the relevant waveforms of the snubber cell elements, and Fig. 6 shows the soft commutation of diode Db1 . Fig. 7 corresponds to the voltage and current waveforms concerning switch S1 , where it can be seen that it is turned on and off in ZCS and ZVS modes, respectively. Finally, Fig. 8 shows the efciency curves of the converter operating at 100 kHz with and without the nondissipative snubber. Efciency is satisfactory in light-load condition for

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The use of a passive nondissipative snubber provides soft commutation of the main switches, without the aid of auxiliary switches, reducing control complexity. If di/dt and d/dt rates are limited, the ZCS turning on and ZVS turning off can be achieved, as switching losses become negligible. ACKNOWLEDGMENT The authors would like to thank Texas Instruments Incorporated and ON Semiconductor for sending samples. R EFERENCES
[1] D. Alexa and A. Srbu, Three-phase rectier with near sinusoidal input currents and capacitors connected on the AC side, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 16121620, Oct. 2006. [2] J. C. Salmon, Circuit topologies for PWM boost rectiers operated from 1-phase and 3-phase AC supplies and using either single or split DC rail voltage outputs, in Proc. APEC, Mar. 1995, vol. 1, pp. 473479. [3] R. Teichmann, M. Malinowske, and S. Bernet, Evaluation of three-level rectiers for low-voltage utility applications, IEEE Trans. Ind. Electron., vol. 52, no. 2, pp. 471481, Apr. 2005. [4] A. R. Prasad, P. D. Ziogas, and S. Manias, An active power factor correction technique for three-phase diode rectiers, IEEE Trans. Power Electron., vol. 6, no. 1, pp. 8392, Jan. 1991. [5] J. W. Kolar and F. C. Zach, A novel three-phase three-switch threelevel PWM rectier, in Proc. 28th Power Convers. Conf., Jun. 1994, pp. 125138. [6] P. Ide, N. Froehleke, and H. Grotstollen, Comparison of selected 3-phase switched mode rectiers, in Proc. 19th INTELEC, Oct. 1997, pp. 630636. [7] J. C. Salmon, Circuit topologies for single-phase voltage doubler boost rectiers, IEEE Trans. Power Electron., vol. 8, no. 4, pp. 521529, Oct. 1993. [8] B.-R. Lin, Analysis and implementation of a three-level PWM rectier/inverter, IEEE Trans. Aerosp. Electron. Syst., vol. 36, no. 3, pp. 948956, Jul. 2000. [9] K. M. Smith, Jr. and K. M. Smedley, Properties and synthesis of lossless, passive soft switching converters, in Proc. 1st Int. Congr. Israel Energy Power Motion Control, May 1997, pp. 112119. [10] C. M. Wang, A new single-phase ZCS-PWM boost rectier with high power factor and low conduction losses, IEEE Trans. Ind. Electron., vol. 53, no. 3, pp. 500510, Apr. 2006. [11] L. H. S. C. Barreto, E. A. A. Coelho, V. J. Farias, J. C. Oliveira, L. C. Freitas, and J. B. Vieira, Jr., A quasi-resonant quadratic boost converter using a single resonant network, IEEE Trans. Ind. Electron., vol. 52, no. 2, pp. 552557, Apr. 2005. [12] L. H. S. C. Barreto, M. S. Gouveia, L. C. Freitas, E. A. A. Coelho, V. J. Farias, and J. B. Vieira, Jr., Analysis of a soft-switched PFC boost converter using analogical and digital control circuits, IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 221227, Feb. 2005. [13] C. M. T. Cruz and I. Barbi, A passive lossless snubber for the high power factor unidirectional three-phase three-level rectier, in Proc. APEC, Mar. 1995, vol. 1, pp. 909914. [14] N. Mohan, T. Undeland, and W. Robbins, Power Electronics: Converters, Applications and Design. Hoboken, NJ: Wiley, 1989, pp. 462467. [15] Amendments for Equipment with AC Mains Power: Electromagnetic Compatibility (EMC)Part 3-2: LimitsLimits for Harmonic Current Emissions (Equipment Input Current 16 A per Phase), IEC 61000-3-2, 1995. [16] P. C. Todd, UC3854 controlled power factor correction circuit design, UNITRODE, Merrimack, NH, Application Note U-134, 1999.

Ernane Antnio Alves Coelho was born in Telo Otoni, Brazil, on April 1, 1962. He received the B.S. degree in electrical engineering from the Federal University of Minas Gerais, Belo Horizonte, Brazil, in 1987, the M.S. degree from the Federal University of Santa Catarina, Florianpolis, Brazil, in 1989, and the Ph.D. degree from the Federal University of Minas Gerais in 2000. Currently, he is a Titular Professor with the Faculdade de Engenharia Eltrica Ncleo de Eletrnica de Potncia, Universidade Federal de Uberlndia, Uberlndia, Brazil. His research interest areas include pulsewidthmodulated inverters, factor correction circuits, and new converter topologies and digital control using digital signal processing.

Luiz Carlos de Freitas was born in Monte Alegre, Brazil, on April 1, 1952. He received the M.Sc. and Ph.D. degrees from the Universidade Federal de Santa Catarina, Florianpolis, Brazil, in 1985 and 1992, respectively. He is currently a Professor with the Faculdade de Engenharia Eltrica da Universidade Federal de Uberlndia, Uberlndia, Brazil, where he has also been a member of the Power Electronic Research Group since 1991. He has authored a variety of papers, particularly in the areas of soft-switching dcdc, dcac, and acdc converters, ballast, and multipulse power rectier for clean-power systems. He is the author of an evolution of a zero-voltage turnon and turn-off commutation cell which has largely been applied in power electronic research works.

Valdeir Jos Farias was born in Araguari, Brazil, on November 18, 1947. He received the B.S. degree in electrical engineering from the Universidade Federal de Uberlndia (UFU), Uberlndia, Brazil, in 1975, the M.S. degree in power electronics from the Federal University of Minas Gerais, Belo Horizonte, Brazil, in 1981, and the Ph.D. degree from the State University of Campinas, Campinas, Brazil, in 1989, respectively. Currently, he is a Titular Professor with the Faculdade de Engenharia Eltrica Ncleo de Eletrnica de Potncia, UFU. He has published around 260 papers. His research interest is power electronics in general, particularly soft-switching converters and active power lters. Dr. Farias is a member of the Brazilian Society for Automation and the Brazilian Society of Power Electronics.

Fernando Lessa Tofoli was born on March 11, 1976, in So Paulo, Brazil. He received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the Universidade Federal de Uberlndia (UFU), Uberlndia, Brazil, in 1999, 2002, and 2005, respectively. He is currently with the Faculdade de Engenharia Eltrica Ncleo de Eletrnica de Potncia, UFU. His research interests include power-quality-related issues, high power-factor rectiers, and soft-switching techniques applied to static power converters.

Joo Batista Vieira, Jr. was born in Panam, Brazil, on March 23, 1955. He received the B.S. degree in electrical engineering from the Universidade Federal de Uberlndia (UFU), Uberlndia, Brazil, in 1980, and the M.S. and Ph.D. degrees from the Federal University of Santa Catarina, Florianpolis, Brazil, in 1984 and 1991, respectively. In 1980, he began working as an Instructor of the Electrical Engineering Department, UFU. Currently, he is a Titular Professor with the Faculdade de Engenharia Eltrica Ncleo de Eletrnica de Potncia, UFU. He has published around 260 papers. His research interest areas include high-frequency power conversion, modeling and control of converters, and power-factor-correction circuit and new converter topologies. Dr. Vieira is a member of the Brazilian Society for Automation and the Brazilian Society of Power Electronics.