Академический Документы
Профессиональный Документы
Культура Документы
VIPower: SMPS Solutions for Power Line Modem Application with VIPerX2A
F. Cacciotto - F. Gennaro - M. Sciortino
1. ABSTRACT This application note investigates about possible power supply solutions based on VIPerX2A family, realized in order to power a Power Line Modem System (PLMS). As a starting point, the power supplies have been designed and developed according to the specifications for a complete PLMS based on ST7538 (by STMicroelectronics), but other diffused PLMS can be suitably supplied.
2. INTRODUCTION The growth of the automation system in home appliance has brought the development of systems able to exchange information using the electrical network as a communication medium. As a result, there is no need to install extra control cable and all the system components can be connected to the network by plugging them in a wall socket. These virtual networks also improve the flexibility and the expansibility of the system, since new devices can be instantly connected to the system by means of a wall socket. New dedicated modem integrated circuits have been developed in order to make these applications feasible. A typical PLMS is shown in figure 1. The Power Line Modem (PLM) is a half duplex asynchronous FSK modem with a carrier frequency complying with Europes CENELEC EN50065 standard, which specifies the use of carrier frequencies from 125kHz to 140kHz for home automation and US FCC regulations, which specifies the use of carrier frequencies lower than 450kHz. The Power Line Interface (PLI) connects the PLM to the power lines. It consists in a line driver, which amplifies the Analog Transmit Output signal (ATO) from the PLM and a line interface, which adapts the line driver to the power line and insulates the PLMS from the electrical network. Some PLMs directly integrate the line interface on the chip. The PLI has the following functions: - TX Mode: amplifies and filters the transmit signal from the ATO; - RX Mode: provides received signal from power lines to the Receive Analog Input (RAI). The PLM is connected to a microcontroller or to a Personal Computer (through the RS232 driver interface), in order to build a home LAN, where each device is able to use any information required whether it is local (washing machine) or remote (remote control system). In the previous typical application, the power supply has to be able to provide a single output. 3. VIPerX2A DESCRIPTION The VIPerX2A family is a range of smart power devices with current mode PWM controller, start-up circuit and protections integrated in a monolithic chip using VIPower M0 Technology.
May 2003
1/16
Mains 50/60 Hz
PLMS
PLMS
+5V +5V DV CC AV CC
+5V LDO Regulator
Washing machine
Line interface
The VIPerX2A family includes: - VIPer12A, with a 0.4A peak drain current limitation and 730V breakdown voltage; - VIPer22A, with a 0.7A peak drain current limitation and 730V breakdown voltage. The switching frequency is internally fixed at 60kHz by the integrated oscillator of the VIPerX2A. The internal control circuit offers the following benefits: - Large input voltage range on the VDD pin accommodates changes in auxiliary supply voltage; - Automatic burst mode in low load condition; - Overtemperature, overcurrent and overvoltage protection with auto-restart. The internal current mode structure is shown in figure 2. The feedback pin (FB pin) is sensitive to current and controls the operation of the device. The Power MOSFET delivers a sense current IS which is proportional to the drain current ID. R2 receives this current and the current coming from the FB pin. The voltage across R2 is then compared to a fixed reference voltage of 0.23 V.
2/16
DRAIN
60kHz Oscillator
S ID
+VDD
PWM Q LATCH
R
IS
FB
SOURCE
R 2 (I S + I FB ) = 0.23V
Using the current sense ratio of the mosfet, GID and considering (1), ID is given by:
0.23V I D = G ID I S = G ID I FB R 2
(1)
(2)
The FB pin is commonly driven by the emitter of an optocoupler but a discrete BJT or a zener diode can also be used, behaving as a current source. This current is filtered by a small capacitor C to guarantee the feedback stability. It is necessary to keep this capacitor very close to the FB pin, to avoid high frequency instability on the compensation loop. For low drain currents, (2) applies as long as IFB<IFBsd, where IFBsd is an internal threshold of the VIPerX2A. If IFB exceeds this threshold, the device will stop switching. When the output load is decreased and the regulation loop increases the FB current to reach the IFBsd threshold, the device enters burst mode operation by skipping switching cycles and, consequently, reducing the average switching frequency. This is achieved when the power drained by the load goes below:
POUT =
(V
IN DC(min)
t ON(min) )
2L
f SW
(3)
This feature is especially important when the converter is lightly loaded, in order to have very low input power consumption.
3/16
Due to the low power related to the RX mode, as low as possible switching frequency can be chosen, in order to have higher order harmonics in the carrier frequency band. The only way to reduce the switching frequency is to optimise the burst mode operation. 4.1. Clamp Design The drain voltage needs to be clamped in order to prevent voltage spikes, due to leakage inductance, from exceeding the breakdown voltage of the device (730V minimum). The most used solution is the RCD clamp, as shown in figure 3a. This is a very simple and cheap solution, but it impacts on the efficiency even at no load condition. If the standby efficiency is important, a zener clamp is recommended, as shown in figure 3b. However such a solution gives higher power dissipation at full load, even if the clamp voltage is exactly defined. Figure 3: Clamp circuit topology: (a) RCD clamp and (b) Zener clamp
RCD CLAMP . R C +
ZENER CLAMP .
Dz +
(a)
(b)
The capacitor value is calculated in order to charge it with the energy from the leakage inductance and must ensure that the maximum VSPIKE is never exceeded, thus from energy balance consideration, the minimum capacitance value is:
L LK I 2 DLIM 2 (VSPIKE + VR ) 2 VR
(4)
4/16
1 VSPIKE f SW C ln 1 + V R
(5)
PR =
2 VR 1 + L LK I 2 f SW DLIM R 2
(6)
VZ = VR + VSPIKE
with a power capability equal to:
(7)
PZ =
VZ 1 L LK I 2 f SW DLIM 2 VZ VR
(8)
5. APPLICATION DESCRIPTION In this chapter, two solutions are presented in order to power a typical PLMS in both isolated and non isolated applications. The first configuration is typical in home automation systems and the last is suitable for many industrial applications. The regulation is obtained by means of a zener diode in either solution, considering the high output voltage tolerance for this application. The transformer has been designed with lower primary inductance compared to a typical 5W application. This enables the device to work in burst mode during RX condition, reducing the average switching frequency. 5.1. Isolated Solution The first proposed solution regards the isolated Flyback topology with a single input rectifier diode and an input C-L-C filter. Such a filter provides both DC voltage stabilization and EMI filtering. In the considered application, the transformer has a secondary winding with galvanic insulation and an auxiliary winding to supply the VIPer. In table 2 the transformer specifications are listed and the converter schematic is shown in figure 4. Table 2: Isolated transformer specifications
Core geometry Core material BSAT Air Gap Primary Inductance Leakage Inductance Primary Winding Auxiliary Winding Output Winding E13/7/14 N27 or equivalent 380mT 0.24mm 1.8mH 54H 166 turns 52 turns 22 turns
5/16
R-fuse AC IN 10
D1 1N4007
TF1
BYW100-200 D4
L2 22uH
+10V
C6 470uF
C7 47uF
R4 220
+ C3 10uF
FB
CONTROL
OPT PC817
SOURCE
C4 47nF AC IN
C8 2.2nF-2kV/Y2
9.8
185V 220V 265V
9.6
9.4
VOUT (V)
9.2
9.0
IOUT (mA)
6/16
10,0
Rx Mode Full load
9,5
VOUT (V)
9,0 8,5 180
200
220
240
260
280
VINAC(V)
100
185V 230V 265V
90
80
Efficiency (%)
70
60
50
IOUT (mA)
In figures. 8, 9 and 10 typical waveforms in RX mode and full load are shown: it is important to point out that, in RX Mode, the converter works in burst mode, limiting the maximum switching frequency to 30kHz. The startup transient is shown in figure 11. The maximum drain voltage has been measured under worstcase operations, i.e. start-up at VIN=265VAC and full load. The maximum measured value is 594V, as shown in figure 11(b) and the output voltage ripple at full load and VIN=230VAC is shown in figure 12.
7/16
Ch1 Freq 29.41kHz Ch1 Freq 14.65kHz Ch1 Max 376V Ch2 Max 140mA (a)
Ch1 Freq 58.40kHz Ch1 Max 444V Ch2 Max 304mA (b)
Figure 9: Typical waveforms at 230VAC: (a) RX mode and (b) Full load
Ch1 Freq 29.41kHz Ch1 Freq 14.67kHz Ch1 Max 444V Ch2 Max 156mA (a)
Ch1 Freq 58.19kHz Ch1 Max 504V Ch2 Max 296mA (b)
8/16
Ch1 Freq 29.41kHz Ch1 Freq 14.65kHz Ch1 Max 500V Ch2 Max 164mA (a)
Ch1 Freq 58.22kHz Ch1 Max 560V Ch2 Max 296mA (b)
Figure 11: (a) Start up time at 230VAC and (b) VDS during start-up at 265VAC at full load
VDD
VOUT VDS
(a)
(b)
9/16
5.2. Non Isolated Flyback Description For non-isolated applications, the following solution can be used. The transformer specifications are the previous ones, but galvanic insulation and auxiliary winding are not required. The converter schematic is shown in figure 13. The VDD voltage is provided rectifying the transformer output voltage. This allows to have a supply voltage higher of 0.8V (forward voltage drop on D4), avoiding a VDD lower than VDDoff(MAX)=9V. Figure 13: Non isolated Flyback converter
R2 AC IN 1k R1 10 D1 1N4007 L1 470uH DZ1 9.1V D2 1N4148 D3 STTH106 + C3 10uF GND OUT BYW100-200 D4 R2 150k C5 100pF C6 470uF + C7 47uF + L2 22uH +10V
TF1
C1 4.7uF 400V
+ C2 4.7uF 400V
VIPer12A
VDD DRAIN
FB C4 10nF AC IN
CONTRO L
SOURCE
10/16
10,6
185V 220V 265V
10,4
10,2
VOUT (V)
10,0
9,8
IOUT (mA)
11,0
Rx Mode Full load
10,5
VOUT (V)
10,0
9,5
9,0 180
200
220
240
260
280
VINAC (V)
11/16
100
185V 230V 265V
90
80
Efficiency (%)
70
60
50
IOUT (mA)
In figures 17, 18 and 19 typical waveforms in RX mode and full load are shown: even in this case, in RX Mode, the converter works in burst mode, with a maximum switching frequency of 30kHz. The startup transient is shown in figure 20. The maximum drain voltage has been measured under worstcase operations, i.e. start-up @VIN=265VAC and full load. The maximum measured value is 612V, as shown in figure 20(b) and the output voltage ripple at full load and VIN=230VAC is shown in figure 21. Figure 17: Typical waveforms at 185VAC: (a) RX and (b) Full load
Ch1 Freq 19.84kHz Ch1 Freq 29.33kHz Ch1 Max 380V Ch2 Max 112mA
12/16
Ch1 Freq 58.47kHz Ch1 Max 454V Ch2 Max 312mA (a) (b)
Ch1 Freq 29.07kHz Ch1 Freq 19.52kHz Ch1 Max 456V Ch2 Max 128mA (a)
Ch1 Freq 58.23kHz Ch1 Max 518V Ch2 Max 304mA (b)
Figure 19: Typical waveforms at 265VAC: (a) RX mode and (b) Full load
Ch1 Freq 29.76kHz Ch1 Freq 14.67kHz Ch1 Max 512V Ch2 Max 128mA (a)
Ch1 Freq 58.11kHz Ch1 Max 570V Ch2 Max 304mA (b)
13/16
VDD
VOUT VDS
Ch1 Max 548V Ch2 Max 15.2V Ch3 Max 10.3V (a)
7. SPECTRUM FREQUENCY COMPARISON If lower switching frequency is required during RX mode due to interference issues, the primary inductance of the transformer has to be reduced down to 800H, resulting in a higher drain peak current. This imposes a higher drain current capability device such as the VIPer22A, whose minimum peak drain current is of 560mA. In figure 22 the comparison between the solutions with VIPer12A and VIPer22A is shown: it is important
14/16
Ch1 Freq 19.84kHz Ch1 Freq 29.33kHz Ch1 Max 380V Ch2 Max 112mA (a) Figure 23: Harmonic current spectrum with VIPer12A
25
Ch1 Freq 14.79kHz Ch1 Freq 19.70kHz Ch1 Max 334V Ch2 Max 269mA (b)
VIPer12A
20
Amplitude (mA)
15
10
100
200
300
400
500
Frequency (kHz)
15/16
VIPer22A
20
Amplitude (mA)
15
10
Frequency (kHz)
8. CONCLUSION Two solutions have been introduced in order to power a PLMS based on ST7538 chip specifications. The power supplies have been designed and developed using the VIPower device VIPer12A, since it represents the device of choice for the considered output power level in terms of performance and price. The main result of this investigation is that the proposed power supply performs well in terms of line and load regulation, working in burst mode when the PLMS works in RX mode, thus reducing the maximum switching frequency to 30kHz. Using VIPer22A it is possible to reduce the average burst switching frequency to 19KHz, since a transformer with a lower primary inductance than VIPer12A converter can be chosen. Even if this device is more expensive compared to VIPer12A, the performance in terms of frequency reduction will be improved and, consequently, the interference with the PLMS will be reduced.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
16/16