Designing Single Ended UHF BJT Mixer

Designing A Single Ended UHF BJT Mixer Using the ADS Software
Objectives: A simple UHF Mixer operating at 430.0 MHz is designed. The RF signal at 430.0 MHz is down converted into IF frequency of 20.0 MHz. The mixer is targeted to have no attenuation (conversion gain of 0dB) and an operating noise figure of less than 10dB. The design steps are divided into 5 parts. These are the DC biasing of the mixer circuit, S-parameters measurement for RF and IF, input matching, output matching and final design verification. Background: The transistor chosen for the job is BFR92A which comes in SOT-23 package. The maximum IC sustainable by the transistor is 30.0mA, with transition frequency fT = 5GHz. Since this is a large signal nonlinear circuit, substantial harmonics will be generated, therefore the chosen simulation method is the Harmonic Balance Method. The transistor is biased in emitter degenerated common-emitter configuration. The mixer is driven by a RF source with 50Ohms source resistance, and LO (local oscillator) source with 50Ohms source resistance and sustaining a load resistance of 50Ohms. The block diagram of the mixer is shown in Figure 1. Power supply and decoupling Core mixer circuit

RF Source

Input Matching Network

Output Matching Network

Load

Local Oscillator (LO)

Figure 1 Block diagram of the mixer circuit. Step 1: DC biasing and S-parameters measurement The raw circuit of the mixer is shown in Figure 2. LO signal is pumped into the emitter of Q1 while RF signal is imposed on the base of Q1. This configuration improves isolation between the LO, IF and RF signals. You will notice that each signal is connected to different pin of the transistor. The LO signal is quite large, the BE junction

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Designing Single Ended UHF BJT Mixer

of Q1 serves to attenuate the LO power (See book by Razavi [1] or Lee [3]) This will minimize radiation of the LO signal through the receive antenna. To further improve isolation, the IF and RF port should have the following characteristics: At IF port, RF signal should be shunted, only allowing low frequency signal (IF) to pass. At RF port, IF signal should be shunted, only allowing high frequency signal (RF) to pass. These characteristics can be simulated be inserting artificial elements at both ports. The impedance of the element is a function of frequency. In ADS, this is implemented using the equation based linear elements, which can be accessed from the Eqn Based-Linear linear component palette.

For instance for ZIP1 at RF port, the impedance is equal to 1Ohm when signal frequency is less than 100MHz and 1000Ohm at other frequencies. These artificial elements can be realized using lumped elements after incorporating the matching networks at RF and IF port. The subsequent steps will illustrate the procedure.
DC
V_DC SRC1 Vdc=3.0 V R R2 R=1 kOhm DC DC1
Var Eqn

S-PARAMETERS
S_Param SP1 SweepPlan="SwpPlan1"

SWEEP PLAN
SweepPlan SwpPlan1 Pt=20.0MHz Pt=410.0MHz Pt=430.0MHz UseSweepPlan= SweepPlan=

ZIP1 Low impedance at IF and high impedance at RF.

L Lb L=220.0 nH R= R Rb R=47 kOhm

VAR VAR1 freq_LO=410 Mhz freq_RF=430 Mhz RF_pow=-20

NOTE: By convention for a successful analysis of mixer: 1. Set the RF input to PORT 1, IF output to PORT 2 and LO input to PORT 3 (by editing the NUM property). 2. Set the signal with largest amplitude to Freq[1] to ensure convergence of the HB method.

Z1P_Eqn Z1P2 Z[1,1]=Z_IF

C Cc3 C=330.0 pF

Term Term2 Num=2 Z=50 Ohm

Term Term1 Num=1 Z=50 Ohm

C Cc1 C=330.0 pF

pb_phl_BFR92A_19921214 Q1 Z1P_Eqn Z1P1 Z[1,1]=Z_RF

R Re R=330 Ohm

C Cc2 C=10.0 pF

R RLO R=50 Ohm

Z_RF is to simulate short at IF and high impedance at RF. Z_IF is to simulate high impedance at IF and short at RF. A realistic value for short would be 1-5 Ohms while a realistic value for high impedance would be 500-2000 Ohms.
Var Eqn

VAR VAR2 Z_RF=if freq < 100MHz then 1 else 1000 endif Z_IF=if freq < 100MHz then 1000 else 1endif

Figure 2 The schematic of the raw mixer with no matching. DC simulation is performed on the schematic and the transistor voltage and current is as follows: VC VE VB IC 1.82V 0.39V 1.14V 1.17mA

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Designing Single Ended UHF BJT Mixer

S-parameter Simulation For mixer operation, we are only interested with S-parameters at 3 frequencies (IF = 20MHz, LO = 410 MHz and RF = 430 MHz), thus a sweep plan is used instead of measuring the S-parameters at all frequencies. The Sweep Plan window can be accessed from S-Parameters control as shown in Figure 3.

Figure 3 Sweep Plan setting. The result of S-parameters simulation is shown below:
freq 20.00MHz 410.0MHz 430.0MHz S(1,1) 0.968 / -128.490 0.876 / -22.603 0.874 / -23.693 Z(1,1) 1.000 - j24.115 77.551 - j224.546 72.572 - j215.009

freq 20.00MHz 410.0MHz 430.0MHz

S(2,2) 0.817 / -1.036 0.961 / -177.300 0.961 / -177.425

Z(2,2) 493.913 - j44.025 0.999 - j1.178 0.999 - j1.123

The input impedance at IF and RF ports. Assuming linear operation.

Table 1 S-parameters for raw mixer circuit.

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Designing Single Ended UHF BJT Mixer

Step 2: Harmonic Balance Simulation of Raw Mixer Circuit In order to illustrate the effect of having proper impedance matching circuits at both RF and IF ports, we perform a quick analysis of the raw mixer circuit. The schematic is shown in Figure 4. L1 and C1 are arbitrarily added with the purpose of filtering out RF signal from the IF port. Current probes are added as measuring power requires both voltage and current information. If performing Harmonic Balance simulation for a circuit with multi-tone sources, some precautions have to be taken to ensure convergence and sufficient accuracy. The LO source, being larger in magnitude should be assigned to frequency [1] and given a higher order (more harmonics are considered). The MaxOrder variable should follows the order of LO.
DC
V_DC SRC1 Vdc=3.0 V R R2 R=1 kOhm DC DC1
Var Eqn

HARMONIC BALANCE
HarmonicBalance HB1 MaxOrder=7 Freq[1]=freq_LO Freq[2]=freq_RF Order[1]=7 Order[2]=5 NOTE: By convention for a successful analysis of mixer: 1. Set the RF input to PORT 1, IF output to PORT 2 and LO input to PORT 3 (by editing the NUM property). 2. Set the signal with largest amplitude to Freq[1] to ensure convergence of the HB method. I_Probe ILoad

This source will supply 20dBm power to a matched load, in this case 50.

VAR VAR1 freq_LO=410 Mhz freq_RF=430 Mhz RF_pow=-20

R Rb R=47 kOhm L Lb L=220.0 nH R=

L L1 L=100.0 nH R=

C Cc3 C C=100.0 pF C1 C=47.0 pF

I_Probe ISource

pb_phl_BFR92A_19921214 Q1 C Cc1 C=100.0 pF R Re R=330 Ohm C Cc2 C=10.0 pF P_1Tone PLO Num=2 Z=50 Ohm P=polar(dbmtow(0),0) Freq=freq_LO

R RL R=50 Ohm

P_1Tone Prf Num=1 Z=50 Ohm P=polar(dbmtow(RF_pow),0) Freq=freq_RF

Built-in function to convert dBm to Watt

Figure 4 Harmonic Balance simulation of raw mixer circuit. Conversion Gain of Mixer The conversion gain GC is defined as: GC = PowerIF/PowerRF or GC = 10log10(PowerIF/PowerRF) For this raw mixer schematic, it is (Refer to Appendix 2 for the data display) GC = -18.866dB for RF_pow = -20dBm.

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Designing Single Ended UHF BJT Mixer

Step 3: Performing Matching at RF and IF Ports The input impedance at RF port is Zrf = 72.572 j215.009 (From Table 1). We would like to transform this to 50 to match to the RF source impedance. The schematic to achieve this is shown in Figure 5.
S-PARAMETERS
S_Param SP1 Start=0.430 GHz Stop=0.430 GHz Step=1.0 MHz

Var Eqn

VAR VAR1 Z_in=72.572-j*215.009

Term Term1 Num=1 Z=50 Ohm

L Lm1 L=68 nH R=

C Cm1 C=0.335 pF

DC_Block DC_Block1

Z1P_Eqn Z1P1 Z[1,1]=Z_in

We would like to tranform the impedance Z_in into 50 Ohm, from the point of view of the RF source after the L network.

This is the input impedance at RF frequency, from the stand-point of RF source.

Figure 5 Matching network design for RF port. The input impedance at IF port is Zif = 493.913 j44.025 (From Table 1). We would like to transform this to 50 to match to the IF load impedance. The schematic to achieve this is shown in Figure 6.
S-PARAMETERS
S_Param SP1 Start=20 MHz Stop=20 MHz Step=1.0 MHz L Lm2 L=1203 nH R=

Term Term1 Num=1 Z=50 Ohm

DC_Block DC_Block1 C Cm2 C=47 pF

R RL R=50 Ohm

We would like to tranform the load impedance into conjugate of Z_if, from the point of view of the mixer IF output. Z_if = 493.913 - j*44.025

This is the load impedance at IF frequency, from the stand-point of the mixer IF output

Figure 6 Matching network design for IF port.

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Designing Single Ended UHF BJT Mixer

Optimizing the IF Matching Network to Filter Out High Frequency Signal The matching networks from Figure 6 is good enough for the IF port. However it is still not sufficient for suppressing high frequency signals (note that the configuration of the network is low pass). Cm2 = 47pF at 410MHz is only 8.26. We would like to increase Cm2 further to reduce this impedance (recall that the artificial device ZIP2 at RF is only 1). This can be achieved by using a network, with more degree of freedom we can choose Cm2 to suit our purpose. The completed circuit is shown in Figure 7. Now at 410MHz, |XCm2| = 4.00. This should be sufficient for bypassing RF signal, as the load is 50, so this impedance is 10 times smaller than load impedance.
S-PARAMETERS
S_Param SP1 Start=20 MHz Stop=20 MHz Step=1.0 MHz L Lm2 L=800 nH R=

Term Term1 Num=1 Z=50 Ohm

DC_Block DC_Block1

C Cm2 C=97 pF

C Cm3 C=270.5 pF

R RL R=50 Ohm

We would like to tranform the load impedance into conjugate of Z_if, from the point of view of the mixer IF output. Z_if = 493.913 - j*44.025

This is the load impedance at IF frequency, from the stand-point of the mixer IF output

Figure 7 Matching network design for IF port using network. NOTE Note that in carrying out the impedance matching procedure, we are assuming the transistor to be operating in a quasi-linear mode. It is nonlinear so as to produce the mixing effect, yet the linearity is small enough so that the usual linear procedure and concept of impedance can be applied. Usually this is a valid assumption.

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Designing Single Ended UHF BJT Mixer

Step 4: Complete Circuit Simulation and SSB Noise Analysis After including the matching networks, the raw mixer circuit becomes as shown in Figure 8. At RF port, Lb together with Cbyp1 shunts the low frequency IF signal (at 20Mhz, 220nH inductance is considered small, only 27). While at IF port, Cm2 serves to shunt the RF signal.
DC
DC DC1

HARMONIC BALANCE
HarmonicBalance HB1 MaxOrder=7 Freq[1]=freq_LO Freq[2]=freq_RF Order[1]=7 Order[2]=5 NLNoiseMode=yes FreqForNoise=freq_RF-freq_LO NoiseInputPort=1 NoiseOutputPort=2 Other=OutVar="RF_pow"

Var Eqn

VAR VAR1 freq_LO=410 Mhz freq_RF=430 Mhz RF_pow=-20 NOTE: By convention for a successful analysis of mixer: 1. Set the RF input to PORT 1, IF output to PORT 2 and LO input to PORT 3 (by editing the NUM property). 2. Set the signal with largest amplitude to Freq[1] to ensure convergence of the HB method.

V_DC SRC1 Vdc=3.0 V

R R2 R=1000 Ohm

C Cdec C=1000.0 pF

IF power
L Lm3 L=800.0 nH C Cm2 R= C=97.0 pF I_Probe ILoad C Cm3 C=270.5 pF T erm T erm3 Num=2 Z=50 Ohm

OPTIONS
Options Options1 Temp=23.85 TopologyCheck=yes V_RelTol=1e-6 I_RelT ol=1e-6 GiveAllWarnings=yes MaxWarnings=10

R C Rb Cbyp1 R=47 kOhm C=1000.0 pF L Lb L=220.0 nH R=

C Cc3 C=330.0 pF

RF power
pb_phl_BFR92A_19921214 Q1

I_Probe ISource

P_1Tone Prf Num=1 Z=50 Ohm P=polar(dbmtow(RF_pow),0) Freq=freq_RF

L Lm1 L=68.0 nH R=

C Cm1 C=0.33 pF

C Cc1 C=330.0 pF

Output matching network R Re R=330 Ohm C Cc2 C=15.0 pF P_1T one PLO Num=3 Z=50 Ohm P=polar(dbmtow(0),0) Freq=freq_LO

Input matching network

Figure 8 Complete mixer circuit. We now set up the Harmonic Balance Simulation control. This time in addition to the usual harmonic balance analysis, the nonlinear noise analysis is also activated. The Option control is to set the operating temperature. The nonlinear noise window can be accessed via the Harmonic Balance control as shown in Figure 9. The parameters for the Noise[1] tab is as follows: Sweep Type : Point. We are analyzing spot noise here. Input frequency = RF frequency. Frequency: This is the frequency where the noise at IF port is measured. It is equal to IF frequency or (RF frequency) (LO frequency). The Noise[2] and NoiseCons tabs are not used. When noise simulation is enabled, the software will calculate the noise figure (NF) and equivalent noise temperature (TE) at various ports of the circuit. These values will be included in the dataset after the Harmonic Balance simulation is completed.

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To compute spot noise.

The frequency where the noise will be input to the circuit. In this case it is the RF frequency for down-converter, i.e. Noise_freq + LO_freq = RF_freq This is the port where wide-band noise is input (RF port). This is the port where noise power is retrieved (IF port). Enable nonlinear noise simulation

Figure 9 Setting up nonlinear noise analysis through Noise[1] tab. NOTE ON NOISE SIMULATION 1. Small-signal noise is used for circuits like amplifier. In this case the amplifier circuit will be linearized at the d.c. bias point. Equivalent noise source will be impose on elements such as PN junctions and resistors. System noise and noise figure are then computed, either at one frequency (spot noise) or a band of frequency (wideband noise). 2. Nonlinear noise is used for large signal circuits like power amplifier and mixer. It is used with Harmonic Balance simulation where the noise must be computed at the fundamental frequency, but also at the harmonics as well. Moreover the noise voltage and current must be computed at various operating points of the steady voltage and current since the circuit under analysis is a large signal circuit. Thus nonlinear noise analysis requires much more computation power and memory than just pure Harmonic Balance analysis.

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Designing Single Ended UHF BJT Mixer

3. Oscillation noise is used for computation of phase noise of oscillator. Again the noise voltage and current need to be computed at various operating points under steady state condition. 4. There are 2 methods for noise simulation, using the Noise[1] and Noise[2] tabs, and using the NoiseCons tab. NoiseCons tab is used for several noise simulation, this eliminates the need to change the values on the Noise[x] tab. It can be used for noise sweeping calculation. Please refer to online help of ADS for more information. Result Upon running the simulation and using the data display as in Appendix to show the signal spectrum, the conversion gain (for RF input power at 20dBm) is calculated as: GC = -0592 This is a substantial improvement over the raw mixer circuit in Step 2, where the conversion gain is only 18.866dB or 0.013. The voltage and current magnitude spectrum is depicted in Figure 10. From the figure it is proven that output at IF port consists mainly of a 20MHz component, the RF components are highly suppressed. Furthermore the nonlinear noise analysis shows that the noise figure of the mixer is roughly: NFdB = 8.984 dB Which is an acceptable value for single transistor mixer.

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Designing Single Ended UHF BJT Mixer

0.0006

0.0005

0.0004

ILoad.i

0.0003

0.0002

0.0001

m3
0.0000 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

f req, GHz

m1 freq=2.000E7Hz Vout=0.030 / -124.846 m1

0.030

m2 f req=4.700E8Hz Vout=2.016E-9 / 168.315

0.025

0.020

Vout

0.015

0.010

0.005

m2
0.000 0.0 0.5 1.0 1.5 2.0

freq, GHz

Figure 10 Magnitude of output voltage and current spectrum.

40

20

Iout_t, mA Vout_t, mV

-20

-40 0 10 20 30 40 50 60 70 80 90 100

time, nsec

Figure 11A Time domain steady state output voltage and current.

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250 200 150 100

Iin_t, mA Vin_t, mV

50 0 -50 -100 -150 -200 -250 0 10 20 30 40 50 60 70 80 90 100

time, nsec

Figure 11B Time domain steady state input voltage and current. Step 5: Gain Compression Test By modifying the Harmonic Balance Simulation control, we could change the schematic of Figure 8 into a gain compression test. This is done by sweeping the RF power level as shown in Figure 12.
HARMONIC BALANCE
HarmonicBalance HB1 MaxOrder=7 Freq[1]=freq_LO Freq[2]=freq_RF Order[1]=7 Order[2]=5 NLNoiseMode= FreqForNoise=freq_RF-freq_LO NoiseInputPort=1 NoiseOutputPort=2 SweepVar="RF_pow" Start=-30 Stop=10 Lin=10 Other=

Figure 12 Changing the HB Simulation control for gain compression test.

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The result of gain compression test is shown in Figure 13. It is seen that 1dB gain compression occurs roughly at RF input power level of 5dBm.

10

Pif_ext Pif_dbm

-10

-20

-30

-40 -30 -25 -20 -15 -10 -5 0 5 10

RF_pow

Figure 13 Gain Compression test.

References B. Razavi, RF Microelectronics, Prentice Hall, 1998. R. Ludwig, P. Bretchko, RF circuit design theory and application, Prentice Hall, 2000. T.H. Lee, The design of CMOS radio-frequency integrated circuits, Cambridge University Press, 1998.

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Appendix 1 Photograph of the constructed UHF mixer based on schematic of Figure 8

Local Oscillator Input 1.57mm thick FR4 printed circuit board SMA to PCB adapter

IF Output

RF Input

BNC to PCB adapter

To 3.0-3.3V D.C. Source

Appendix 2 Agilent ADS Data Display Used (ADS 2000) Data Display for Conversion Gain and Nonlinear Noise Analysis:

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30 25

600 500 400 300 200 100 0 0.0 0.5 1.0 1.5 2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

15 10 5 0

ILoad.i, uA

Vout, mV

20

freq, GHz freq 0.0000 Hz 20.00MHz 40.00MHz 60.00MHz 350.0MHz 370.0MHz 390.0MHz 410.0MHz 430.0MHz 450.0MHz 470.0MHz 490.0MHz 780.0MHz 800.0MHz 820.0MHz 840.0MHz 860.0MHz 880.0MHz 900.0MHz 1.190GHz 1.210GHz 1.230GHz 1.250GHz 1.270GHz 1.290GHz 1.310GHz 1.330GHz 1.620GHz 1.640GHz 1.660GHz 1.680GHz 1.700GHz Vout 0.000 / 0.000 0.030 / -124.846 5.586E-5 / 115... 1.242E-6 / 79.... 6.083E-9 / -16... 4.881E-8 / -14... 2.469E-7 / -15... 7.107E-6 / 48.... 1.174E-6 / -13... 6.112E-9 / 123... 2.016E-9 / 168... 2.372E-10 / -1... 5.899E-9 / -10... 5.177E-8 / -12... 7.578E-7 / -14... 1.668E-7 / 37.... 6.552E-9 / -13... 1.754E-10 / -5... 3.484E-11 / -1... 3.924E-9 / 9.896 2.127E-8 / 4.076 1.508E-7 / -1.6... 4.352E-8 / 178... 3.191E-9 / 2.201 4.725E-11 / 16... 4.465E-12 / 18... 2.797E-11 / 12... 6.599E-9 / 143... 3.168E-8 / 144... 1.124E-8 / -40.... 1.154E-9 / 135... 3.715E-11 / -4... ILoad.i 0.000 / 0.000 5.908E-4 / -12... 1.117E-6 / 115... 2.483E-8 / 79.... 1.217E-10 / -1... 9.762E-10 / -1... 4.939E-9 / -15... 1.421E-7 / 48.... 2.348E-8 / -13... 1.222E-10 / 12... 4.033E-11 / 16... 4.744E-12 / -1... 1.180E-10 / -1... 1.035E-9 / -12... 1.516E-8 / -14... 3.335E-9 / 37.... 1.310E-10 / -1... 3.507E-12 / -5... 6.967E-13 / -1... 7.847E-11 / 9.... 4.255E-10 / 4.... 3.016E-9 / -1.6... 8.704E-10 / 17... 6.382E-11 / 2.... 9.450E-13 / 16... 8.930E-14 / 18... 5.595E-13 / 12... 1.320E-10 / 14... 6.335E-10 / 14... 2.248E-10 / -4... 2.307E-11 / 13... 7.429E-13 / -4... Mix(1) 0 -1 -2 -3 4 3 2 1 0 -1 -2 -3 4 3 2 1 0 -1 -2 5 4 3 2 1 0 -1 -2 5 4 3 2 1 Mix(2) 0 1 2 3 -3 -2 -1 0 1 2 3 4 -2 -1 0 1 2 3 4 -2 -1 0 1 2 3 4 5 -1 0 1 2 3

freq, GHz

Use the mix( ) function to extract a certain frequency component. Since the simulation has two frequency sources, the frequency component indexes is two dimensional, i.e. {m1,m2}. For example mix(Vout, {-1,1}) extracts Vout at frequency 20MHz. The variables Mix(1) and Mix(2) is the frequency indexes. Usually we employ the list function to display the frequency components of a voltage or current together with the indexes. Eqn Vif = mix(Vout,{-1,1}) Eqn Iif = mix(ILoad.i,{-1,1}) Eqn Pif = 0.5*re(Vif*conj(Iif)) Eqn Pif_dbm = 10*log10(Pif) + 30 Alternatively we could just write: Pif = mix(0.5*re(Vout*conj(ILoad.i),{-1,1},Mix), Mix is variable for all frequency components, it is only needed when we want to extract an expression as in above. The conversion gain G_conv is defined as: G_conv = 10*log(Pif/Prf)

The conversion gain. The index in RF_pow is arbitrary, as RF_pow is a constant, it is the same for all frequencies. Eqn G_conv = Pif_dbm-RF_pow[0]
freq 20.00MHz Pif_dbm -20.592 G_conv -0.592

Noise Figure at IF output and the equivalent Noise temparature

noisefreq 20.00MHz te(2) 2004.840 nf(2) 8.984

Check for Local Oscillator coupling to input port

0.16 0.14 0.12 0.0035 0.0030

mag(Vin)

0.10 0.08 0.06 0.04 0.02 0.00 0.0 0.2 0.4 0.6 0.8 1.0

mag(ISource.i)

0.0025 0.0020 0.0015 0.0010 0.0005 0.0000 0.0 0.2 0.4 0.6 0.8 1.0

freq, GHz

freq, GHz

Examining the time domain signals Eqn Vout_t = ts(Vout) Eqn Iout_t = ts(ILoad.i)
250 200 150 20 40

Eqn Vin_t = ts(Vin) Eqn Iin_t = ts(ISource.i)

Iin_t, mA Vin_t, mV

50 0 -50 -100 -150 -200 -250 0 10 20 30 40 50 60 70 80 90 100

Iout_t, mA Vout_t, mV

100

-20

-40 0 10 20 30 40 50 60 70 80 90 100

time, nsec

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Data Display for Gain Compresssion Test:

Equation to determine the IF output power Eqn Vif = mix(Vout,{-1,1}) Eqn Iif = mix(ILoad.i,{-1,1}) Eqn Pif = 0.5*re(Vif*conj(Iif)) Eqn Pif_dbm = 10*log10(Pif) + 30 Steps to extrapolate the IF power Eqn grad1 = (Pif_dbm[1] - Pif_dbm[0])/(RF_pow[1] - RF_pow[0]) Eqn C1 = Pif_dbm[0] Extrapolate IF power equation: Eqn Pif_ext = grad1*( RF_pow - RF_pow[0]) + C1

10

Pif_ext Pif_dbm

-10

-20

-30

-40 -30 -25 -20 -15 -10 -5 0 5 10

RF_pow

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Appendix 3 Measurement Results A measurement is carried out to verify that the mixer does indeed function properly. The Setup is shown in Figure A31. Key instruments used are an Agilent ESG series signal generator, a normal 100MHz bandwidth bench top digital sampling oscilloscope (DSO), power supply and an Agilent 89XX series Vector Signal Analyzer (VSA). The VSA is only used as a spectrum analyzer in this instance, thus any low cost spectrum analyzer will do.

Agilent ESG series signal generator

Agilent 89XX series VSA 100MHz digital sampling oscilloscope (Tektronix)

Mixer & LO

Figure A31 The measurement setup.

Power supply for LO Variable frequency oscillator (LO) Probe to DSO (IF) Battery to power up mixer

From signal generator (RF) Mixer

Figure A32 Close-up view of the mixer.

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The settings for the various instruments are as follows: LO: RF source: frequency = 430.0MHz, Power = -20dBm into 50 load. LO source: frequency 410 MHz , Power = -5.48dBm into 50 load. Power supply for mixer: 3.0V.

Figure A33 Time domain IF output when RF signal is activated.

Figure A34 Time domain IF output when RF signal is deactivated. The mixer can work properly for RF power level down to 50dBm, when IF output is almost equivalent to the noise floor. It can work to a lower RF power level if the LO power level is increase (say to 0dBm).

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