B.

E PROJECT ON

DESIGN OF CMOS CRYSTAL OSCILLATOR

Submitted by ABHISHEK ARORA (04/EC/07) AKSHAY JAIN (10/EC/07)

In partial fulfillment of B.E (Electronics & Communication Engg.) degree Of University of Delhi.

DIVISION OF ELECTRONICS AND COMMUNICATION ENGINEERING NETAJI SUBHAS INSTITUTE OF TECHNOLOGY UNIVERSITY OF DELHI, DELHI 2011

CERTIFICATE
This is to certify that the project entitled, Design of CMOS Crystal Oscillator by Akshay Jain (10/EC/07) and Abhishek Arora (04/EC/07) is a record of bonafide work carried out by them, in the department of Electronics and Communication Engg., Netaji Subhas Institute of Technology, New Delhi, under our supervision and guidance (along with Mr. Anand Kumar and Mr. Anurag Tiwari from ST Microelectronics) in partial fulfillment of requirement for the award of the degree of Bachelor of Engineering in Electronics and Communication Engg., University of Delhi in the academic year 2010-2011.

______________ Prof. Raj Senani

_____________________ Dr. Tarun Kumar Rawat

(Project Mentors at NSIT)

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ACKNOWLEDGEMENT
We are sincerely thankful to Prof. Raj Senani sir for making this collaboration project possible and constantly motivating us. All the progress made so far by us on the project became possible only by the sincere involvement of our mentor at STM, Anurag Tiwari sir, who took his precious time out for us during the six month period, imparted us the key skills for circuit analysis and also took all our presentations. We also thank Anand Kumar sir for managing our project at STM and supporting and helping us during the project. We are also thankful to Dr. Tarun Kumar Rawat sir for guiding and helping us with our problems. We thank Abhirup Lahiri sir for clearing our doubts and helping us to understand ALC.

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TABLE OF CONTENTS
Certificate ....ii Acknowledgment ....iii Table of Contents ....iv List of Figures......vii Abstract .x Introduction..xi

1. Basics Of Oscillators1 Basic components of an oscillators2

2. Quartz crystal...3 Introduction...3 Electrical Equivalent .........4 Power dissipation ..8

3. General Theory on Crystal Oscillators...9

General form of the oscillator.....9 Negative Resistance...12

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Start-up of Oscillation....15

4. Theory Of Pierce Oscillator Circuits.17

Lossless Circuits.21

5. Frequency Stability..23

Introduction23 Resonator 23 Nonlinear Effects in the Circuits.23

6. Analysis of Start-up of Oscillation in Pierce Oscillator.25 Plots27 7. Design steps for Pierce Oscillator.34

8. Another Approach Towards Design40 Large Signal Analysis 40 Implementation of Gate to Drain Resistance..........45

9. Amplitude Regulation46

Transistor in Weak Inversion ..47

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10. Amplitude Limiter Circuits.49

Basic Analysis.49 Another Approach ..52

Future Scope...53 References ..54 Appendix - I56 Appendix - II..58

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LIST OF FIGURES

Figure 1(a) Figure 1(b) Figure 2(a) Figure 2(b) Figure 3 Figure 4

An AT cut crystal Symbol Equivalent circuit of all possible modes Equivalent circuits of single mode Module and phase of Zp vs. Normalized frequency pulling pC3/Cm General form of oscillator by splitting into motional impedance Zmand circuit impedance Zc(1)

9 9 10 10 13 15

Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11(a) Figure 11(b)

Locus of Zc(1) (|Ic|) Equivalent circuit with negative resistance Intersection of the locus of Zc(1)(|Ic|) with that of -Zm(p) Evaluation of the start-up time Pierce architecture General equivalence circuit of the pierce oscillator MATLAB plot of Zc for Z3infinite Zc for Z3 infinite

16 17 19 22 23 23 25 26

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Figure 12(a)

The plot on matlab shows the center to be approximately at 0 plotted for a range of transconductance

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Figure 12(b) Figure 13 Figure 14(a) Figure 14(b) Figure 14(c) Figure 15(a) Figure 15(b) Figure 15(c) Figure 16(a) Figure 16(b) Figure 16(c) Figure 17 Figure 18(a) Figure 18(b) Figure 18(c)

Ideal curve for gm taking all possible values Small signal model of Pierce oscillator Root locus plot (Case-I) Bode plot (Case-I) Nyquist plot (Case-I) Blot plot (Case-II) Nyquist plot (Case-II) Root locus (Case-II) Blot plot (Case-III) Nyquist plot (Case-III) Root locus plot (Case-III) A 3 MHz oscillator transient Blot plot Nyquist plot Root locus plot

28 31 34 34 35 36 36 37 38 38 39 43 43 44 45

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Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25(a) Figure 25(b) Figure 26

Pierce crystal oscillator Large signal equivalent circuit of the oscillator Drain current variation with time Start-up when transistor is modeled using gm model Growth of oscillation when using a real transistor ALC proposed by Vittoz Filtered Gate voltage V(13) with A=200m Filtered Gate voltage V(13) with A=400m Plot of (VB VT) vs. Vo

46 47 49 52 53 56 56 57 58

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ABSTRACT
This project is a continuation of the Collaboration Project between NSIT and ST Microelectronics. Here, we focus on the Pierce Configuration of Crystal Oscillators. Two different approaches have been used Negative Resistance and Control Theory. The stability analysis has been done to examine the effect of parasitics on the stability and start-up of oscillators. Pierce oscillator design procedure has been developed targeting a desired oscillation amplitude and initial gain. The whole procedure has been simplified by modelling the design in terms of equations with open loop form solutions and providing a solution to them using numerical methods. Basic analysis on ALC proposed by Vittoz has also been done.

INTRODUCTION
A crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical signal with a very precise frequency. This frequency is commonly used to keep track of time as in quartz wristwatches, to provide a stable clock signal for digital integrated circuits, and to stabilize frequencies for radio transmitters and receivers. We focus on the study of Pierce Architecture. Virtually all digital IC clock oscillators are of Pierce type, as the circuit can be implemented using a minimum of components: a single transistor, 2 resistors, 2 capacitors and a quartz crystal. The low manufacturing cost of this circuit, and the outstanding frequency stability of the quartz crystal, give it an advantage over other designs in many consumer electronics applications.

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1. BASICS OF OSCILLATORS
Oscillators are closed loop circuits which due to their inherent design pick up noise at a desired frequency, amplify it and sustain it in the loop .There are many designs and architectures for oscillators today which mainly tradeoff between number of active elements, number of reactive elements, power dissipation, frequency stability etc. For an oscillator to oscillate Barkheusen proposed a condition which was necessary though not a sufficient condition. He states that an oscillator must have : 1. Closed loop gain equal to unity 2. Phase difference around the loop is a multiple of 2. This condition is not a sufficient condition because it does not take into account the growth of oscillation. In terms of impulse response it says that the closed loop poles of the system must lie on the imaginary axis in the complex plane but for the growth of oscillation it is necessary that the poles be located in the right half plane so that the system is unstable. The instability of the system will make the growth possible, though no real active circuit can extract infinite amount of power from the supply voltage the poles of the closed loop system will shift and stabilize onto the imaginary axis.

Figure1. General representation of an oscillator

The second condition states that with rise in amplitude of oscillation the gain must reduce through the non-linearities in the transfer function to limit the oscillation. 1

1.1 Basic components of an oscillator

The oscillator is basically a bandpass filter with its input and output shorted. The essential components are a voltage supply which gives the power necessary to compensate the losses in the circuit to sustain oscillations, a frequency selective element like an LC tank or a crystal which stabilizes the frequency of oscillation , a buffer to extract the oscillatory signal, an active element to compensate the losses in the frequency selective networks and amplitude limiter circuits to limit the dissipation in the oscillator by controlling the bias of the oscillator. We have used crystal as the frequency selective network and an nmos transistor as the active device. The architecture exploited is the pierce architecture which is explained in the further text.

2. QUARTZ CRYSTAL
2.1 Introduction
A quartz crystal utilises the piezoelectric properties of quartz. Piezoelectricity is defined by electric polarization produced by mechanical strain in crystals belonging to certain classes, the polarization being proportional to the strain and changing sign with it. If a stress is applied to a
crystal in a certain direction, electric charges appear in a perpendicular direction. Conversely, if an electric field is applied, it will cause mechanical deflection of the crystal. The basic application for the quartz resonator is to connect it in a manner such that the mechanical vibrations stabilize the oscillators frequency. This is possible since the crystal acts like a tuned circuit when placed in an amplifier feedback arrangement.

The one most commonly used crystal is the AT cut, which is a thin piece of quartz with two parallel or slightly convex surfaces. Electrical connections are made to the crystal by metallizing the two parallel faces on opposite sides of the crystal. (Fig. 1)

Fig 1. (a) An AT cut crystal

(b) Symbol

2.2 Electrical Equivalent

The crystal equivalence is depicted by these factors : Rm - measure of losses in crystal which the circuit must overcome to oscillate. Lm - depends on the mechanical mass of the crystal. Its value varies between Kilo Henry to milli Henry for frequencies from KHz to MHz. Cm - depends on the thickness of the crystal and the area of metal electrodes on the face of crystal.Its value varies between 1 to 30fF in general. C0 - consists of stray capacitance between terminals of oscillator due to crystal pins and package.This value is generally between 0.8pF to 4.0pF. Frequency of oscillation is determined mainly by [Lm, Cm, C0]

Fig. 2 Equivalent circuit (a) all possible modes

(b) single mode

The crystal is modelled as a 3-point component, in order to separate the electrical capacitor C12 from the parasitic capacitances to the packaging case C10 and C20 .
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When the crystal starts vibrating at a particular frequency the overtones can be neglected since the harmonics produced by distortion can not excite these overtones as they are not exact multiples of the fundamental frequency. The resonant angular frequency is

The Quality factor is

This factor is very large, typically ranging from 104 to 106. The complex motional impedance is given by

Now, because of the very large value of Q, the frequency of oscillation will always be very close to m. It is thus very useful to replace by the relative amount of frequency pulling p

Thus, we get the impedance in terms of frequency pulling as

Another crystal parameter is its Figure of Merit, defined as the maximum possible ratio of currents through Zm and C3. Figure of merit gives an idea of how effective a short is generated at the crystal series resonance frequency.

By expressing Zm normalized to 1/C3 ,

Now, Zp , the impedance of the parallel connection of Zm and C3 is given as

For impedance to be real,

Taking negative sign, we get series resonance frequency. The corresponding value of pulling is

Note that, for M >> 1,

pse = 0

i.e., the series resonance frequency is the mechanical frequency of the resonator.
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Taking positive sign, we get parallel resonance frequency, corresponding to the value of pulling

But, for M >> 1,

ppa = Cm / 2C3

i.e., the parallel resonance frequency depends on the electrical (parasitic) capacitance C3. This is the point at which the positive reactance of Lm completely cancels the combined negative reactance of Cm and other parasitic capacitances C10 , C20 , and C11 .

The plot below (Fig. 3) shows the series and parallel resonance frequencies.

Fig 3 Module and phase of Zp vs. normalized frequency pulling pC3/Cm

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2.3 Power Dissipation

The energy Em of mechanic oscillation is simply exchanged from kinetic energy to potential energy. It is all kinetic energy at the peaks of velocity, and all potential energy at the peaks of amplitude. Since the motional current Im represents the mechanical velocity and Lm represent the equivalent mass moving at this velocity,

Since this energy is proportional to the square of the amplitude, it should be limited to avoid destruction and limit nonlinear effects and aging. This is achieved using Amplitude Limiting Circuits (ALC). The motional current is sinusoidal, with an RMS value |Im| /2. The power dissipated in the resonator is thus given by

This power must be provided by the sustaining circuit in order to maintain the amplitude of oscillation. The maximum power that can be dissipated by a crystal is generally given by its manufacturer. So, for a given Rm and Pm , we have to limit our maximum amplitude of oscillation for the crystal to remain stable and reliable.

3. GENERAL THEORY ON CRYSTAL OSCILLATORS

3.1 General Form Of The Oscillator

Fig. 4 General form of oscillator by splitting into motional impedance Zm and circuit impedance Zc(1). In order to sustain the oscillation of the resonator, it must be combined with a circuit to form a full oscillator. The circuit must be nonlinear, in order to impose the level of oscillation. Indeed, a linear circuit would be independent of the amplitude and would therefore not be capable of controlling this amplitude. Now, the current Im flowing through the motional impedance Zm is always sinusoidal due to the high value of quality factor Q. Therefore to analyze the behavior of the oscillator, while including the necessary nonlinearity of the circuit, we split it conceptually into the motional impedance Zm and a circuit impedance containing all electronic components, including capacitors C12, C10 and C20 of the resonator (Fig. 4). The current flowing through the electronic part Ic = Im is then also sinusoidal.

Since Ic is sinusoidal, no energy can be exchanged with the circuit at multiples of the oscillating frequency (harmonics). The nonlinear circuit can therefore be characterized by its impedance Zc(1) for the fundamental frequency defined by

where Ic is the complex value of the sinusoidal current, and V(1) the corresponding complex value of the fundamental component of voltage V. In general, the locus of Zc(1)(|Ic|) can be obtained by means of a circuit simulator according to the following procedure: (a) The circuit is first fully described including its bias. (b) A source of sinusoidal current of amplitude |Ic1| is connected across terminals 1 and 2. (c) The resulting stationary voltage V(t) is calculated by the simulator. (d) The fundamental component V(1) of V(t) is calculated by Fourier analysis and Zc(1)(|Ic1|) is calculated according to the above equation. (e) A new value |Ic2| of the current source is selected and the process is iterated from step (c).

Fig 5. Locus of Zc(1)(|Ic|)

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As long as the sinusoidal current is small enough, the circuit remains linear and the voltage V(t) remains sinusoidal with a complex value V(1) =V. This corresponds to the point where Zc(1) is identical to the small-signal impedance Zc of the circuit. The real part of Zc should be negative to be able to compensate the losses of the resonator. When the current is large enough to produce harmonic components of V(t), the amplitude |V(1)| of its fundamental component is normally progressively reduced, thereby reducing the negative real part of Zc(1). Too much current may produce so much nonlinearities that the real part of Zc(1) becomes positive and the locus moves in the right half plane.

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3.2 Negative Resistance

Fig. 6 Equivalent circuit with negative resistance Let the negative resistance provided by the circuit be Rn = Re { Zc(1)} The total resistance is thus Rm + Rn. It can easily be shown that any existing oscillation with therefore decay exponentially with a time constant given as

If this this net resistance is negative, the value of is positive and the amplitude grows exponentially. Thus, stable oscillation is obtained for = , or Rn = Re { Zc(1)} = - Rm At that point, the imaginary parts must also balance each other, thus the general condition for stable oscillation is simply given by Zc(1)(|Ic|) = Zm(p) i.e., the intersection point S of the locus of Zc(1)(|Ic|) with that of Zm(p) (shown in Fig. 7)
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Fig. 7 Intersection of the locus of Zc(1)(|Ic|) with that of Zm(p) At the intersection point S, the stable amplitude of motional current has the value |Ims| = |Ics| = |Ic|S Equating the imaginary part of Zc(1) at point S with that of Zm expressed earlier, gives the amount of frequency pulling at stable oscillation,

This relation provides the exact relative difference between the frequency of oscillation and the mechanical resonant frequency of the resonator. Critical Condition for Oscillation The critical condition for oscillation occurs when points S and 0 coincide in Fig. 7. By separating into real and imaginary parts,

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Although these equations are only strictly valid at the verge of oscillation, when the amplitude is so small that the circuit remains linear, these equations can be used for a linear approximation of the real nonlinear case. In particular, 2nd equation can be used to obtain an approximate value of frequency pulling ps for larger amplitudes. This approximation gives a negligible error if the circuit is designed to eliminate the effect of nonlinearities on the frequency pulling p.

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3.3 Start-up of Oscillation

As already established from Fig. 3.3(a), any existing motional current of amplitude |Ica| will grow exponentially according to

Differentiating, we get

As long as the current is small enough, the circuit remains linear with an impedance Zc (point 0) and this value is maximum, corresponding to a minimum value 0 of the time constant given by

When nonlinearities start to appear, the margin of negative resistance decreases, thereby increasing the time constant. This time constant become infinite at stable oscillation.

Using the above two equations along with the fact that = for |Ic| = |Ics| (stable oscillation), we get

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Integrating gives the time Tab needed for the oscillation to grow from |Ica| to |Icb|

Shown as the shaded area in Fig. 8.

Fig. 8 Evaluation of the start-up time

Note that this time tends to infinity for |Icb| = |Ics| (fully stable oscillation). In absence of oscillation, some energy is provided by the thermal energy kT, correspondingly there exists a lower limit on |Ica| . Generally, for quartz resonators, the start-up time to reach 90% of the stable amplitude ranges from 7 to 15 times 0.

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4. THEORY OF PIERCE OSCILLATOR CIRCUITS

To create negative resistance in the circuit to compensate for the motional frictional losses of the crystal a single mos transistor can be used, and the architecture is known as pierce architecture (Figure 9). In this architecture the nmos used has its source connected to its bulk which is at ground to make it a three terminal device. Two capacitors which are usually of the same value are the reactive components that basically complete the loop. The crystal which acts as the frequency selective element or a bandpass circuit is connected between the drain and the gate of the transistor. We will first of all focus on a saturated transistor in which we will treat all impedances apart from the crystal as dipoles as shown in the figure 10.

Fig.9 Pierce architecture

Fig. 10 General equivalent circuit of the Pierce oscillator

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Looking from the crystal into the circuit we see the linear circuit impedance to be

This corresponds to the small signal circuit impedance. It is a bilinear function of the trans conductance. The locus of bilinear functions is a circle in the complex plane. We vary the value of Gm from negative infinity to positive infinity. The location of the circle is in the lower half since the all the impedances in the circuit as seen from the crystal are capacitive so the reactance is negative. This impedance becomes equal to negative of motional resistance at two points. The smaller value of the Gm is the critical value of trans conductance. The other value of Gm is the maximum value of Gm. Any value of Gm between these two will provide sufficient negative resistance across the crystal to compensate the motional resistance and the oscillation will start to grow. The maximum attainable negative resistance is for the value of Gm denoted by Gmopt. For the critical condition the pulling takes a value such that the reactive component of the impedance Zc is completely cancelled by the crystal reactive inductance for the pulling

If there is a change in the quality factor the point A moves along the tangent on the circular locus.

Since the quality factor can change by large amounts due to temperature variations and Process corner, the sensitivity needs to be reduced by reducing the slope as much as possible else the

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frequency stability will degrade. This can be done by making the point of intersection as close to the top of the circle where the slope is zero. The sensitivity tends to infinite if the motional resistance is of the order that it is compensated by the active element for Gmopt. The radius of the circle increases with the value of the parasitic impedances across the crystal i.e. Z3.For infinite Z3

The radius becomes infinite and the locus approximates a straight line and becomes a linear function of Gmopt. Now any value of negative resistance is achievable. The sensitivity can be reduced by making this slope equal to zero which is possible if the nature of Z1 and Z2 is purely capacitive and their loss tangents are 0. It can be approached by using high value for the capacitors.

Fig. 11(a) MATLAB Plot of Zc for Z3 infinite

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Fig. 11(b) Zc for Z3 infinite

Infinite value of Z3 is not attainable because of unwanted parasitics that are available across the crystal due to the interelectrode capacitances. The maximum achievable Z3 is dictated by the figure of merit.

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4.1 Lossless circuits

In this case the circuit impedance modifies to

In this case the circular locus is centered on the imaginary axis. The minimum value of time constant can be achieved by using the maximum value of negative resistance

Fig. 12(a) The plot on matlab shows the centre to be approximately at 0 plotted for a range of transconductance
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Figure 12(b) Ideal curve for gm taking all possible values The optimum value of trans conductance can be achieved by differentiating the impedance with respect to Gm and equating it to zero.

The exact value of pulling at the stable point is given by equating the imaginary part of Zc when its real part is Rm to the reactance of the crystal as a function of pulling

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5. FREQUENCY STABILITY
5.1 Introduction
The main feature to be optimized in a crystal oscillator, especially for time keeping applications, is its frequency stability. Separated in three groups, the causes of degradation of this stability will be discussed in what follows, together with possible cures.

5.2 Resonator
The resonant frequency m of the resonator itself is not perfectly constant. Some variation with temperature is always present. This variation depends on the type of resonator, which must be selected in accordance with the specifications of the oscillator. There is no way to avoid some aging of the resonator after fabrication. Since the rate of aging usually decreases with time, it is possible to carry out some pre-aging on the resonator before using it.

5.3 Nonlinear Effects in the Circuit

The amount of frequency pulling ps is proportional to the imaginary part of Zc(1) (the circuit impedance for the fundamental frequency) at the stable point S. This imaginary part may be strongly dependent on nonlinear effects. The nonlinear effects are themselves dependent on various variables, including the supply voltage of the circuits, the threshold voltage of the transistor and the ambient temperature. They must therefore be minimized to improve the frequency stability. The nonlinear transfer function ID(VG) of the active transistor are the first to intervene when the amplitude increases. They limit the amplitude V1 at the gate. To limit the resulting nonlinear effects, the bias current should not be much higher than its critical value,

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typically no more than 10 or 20% above. The inversion coefficient IC0 of the transistor should be selected in order to obtain the desired amplitude. Now, precise values of currents are hard to obtain in integrated circuits, and the critical current itself depends on many possibly variable parameters. Thus, the only possibility to control the amount of overdrive is to implement some kind of voltage amplitude regulation.

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6. ANALYSIS OF START-UP IN PIERCE OSCILLATOR

The small signal model of the generic pierce oscillator is as shown below:

Fig. 13 Small signal model of Pierce oscillator

Here Ro, Co and L are the crystal equivalent parameters. In order to reduce the resistive loading on the crystal, bias resistors are made as large as technology and active device characteristics permit and are typically in the 100 kilo ohms range. Capacitors Cl and C2 set the feedback factor in the circuit, and together with inductive reactance in the crystal, they give the additional 180 loop phase shift required for oscillation. Transconductance gm depends on the active device and its bias conditions and resistors R2 and R1 represent total output and input resistance

respectively, including both active device and circuit contributions. Capacitors Cl and C2 include device capacitances and, in general, are augmented by additional capacitance to control the feedback loop gain. The stability of the circuit has been analysed by breaking the feedback loop at the gate of nmos and finding the transfer function.

Nyquist criterion - It states that the number of unstable closed-loop poles is equal to the number of unstable open-loop poles plus the number of encirclements of the origin of the Nyquist plot of the complex function .

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Root Locus - Root locus is the locus of the closed loop poles as a gain parameter of the open loop transfer function is varied over an infinite set of values. For oscillators the gain parameter is initially so kept that the closed loop system is unstable and the poles are situated in the right half plane. After that as the loss increases with growth of oscillation the gain reduces and the roots travel back and stabilize on the imaginary axis. So, it is necessary for the root locus of an oscillator to be situated in the right half plane for a finite range of gain parameter values.

Bode Plot It is basically used to check if the Barkhausens criteria is being satisified. The frequency at which the phase crosses 180 degrees is called phase cross-over frequency. The gain at that frequency should be greater than 1 for the oscillations to build up.

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6.1 PLOTS We have plotted Nyquist contours for transfer function normalized with the transconductance and root locus with trans conductance as the gain parameter for different values of parasitic capacitance of the crystal and of the biasing resistor, to reflect upon their roleplay in determining the stability of the system. Bode plot has also been plotted to check the Barkheusens criterion. The MATLAB code has been added in Appendix I.

1st case As a starting point we assume that parasitic elements R3 and C3 are removed . The root locus of Fig. shows complex poles due to the crystal, and as gm is increased, the complex poles move into the right-half plane. Bode plots are shown in Fig. and show that the phase of Vo/Vi crosses the critical value of 180 at a frequency w1. Oscillation occurs when the loop gain magnitude exceeds unity at this frequency and the Nyquist plot encircles the point (-(1/gm ), 0). The Nyquist diagram of Fig. is dominated by the circle due to the series resonance. All plots indicate that once the critical value of loop gain is reached, the circuit oscillates for all higher values of loop gain. The root locus branch then extends further into the right-half plane and the Nyquist plot expands further into the right-half plane and the Nyquist plot expands linearly and will always encircle the point (-( 1/gm ), 0). This is the situation which is commonly assumed in oscillator design. The values taken are : Rl=l0Kohm CO=0.01Pf C1 =20pf L=2.533H R2=10kohm C2=20pf R3= C3=0 RO=20ohm

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Fig. 14(a) Root locus plot (Case - I)

Fig. 14(b) Bode plot (Case - I)

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Fig. 14(c) Nyquist Plot (Case - I) 2nd case Parasitic capacitance of 5pf and a bias resistor of 100k has been assumed. In this case the root locus never crosses the imaginary axis and the nyquist diagram also does not encircle the point (-1/gm,0) therefore the oscillator does not oscillate as the negative resistance required is not available for any possible value of transconductance. The problem with the circuit is a complex combination of phase shift due to R1C1 and R2C2 circuits, and the negative feedback due to R3 which is in parallel with the positive feedback path in the crystal. The solutions to the problem can be seen by varying the circuit parameters of the oscillator. First, the crystal parameters are fixed for a particular crystal. Increasing the value of R3 eliminates the start-up problem.

Rl=l0Kohm C3=5pf

C1 =20pf RO=20ohm

R2=10kohm CO=0.01pF

C2=20pf L=2.533H

R3=100k

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Fig. 15(a) Bode plot (Case - II)

Fig. 15(b) Nyquist plot (Case - II)

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Fig. 15(c) Root Locus (Case - II)

3rd case The capacitances C1 and C2 are increased and we see that for a given range of trans conductance the root locus traverse into the right half plane and oscillator works if the start-up gain is constrained by these set of trans conductance values.

Rl=

C1 =20pf

R2=10kohm C2=20pf L=2.533H

R3=100k

C3=5pf

RO=20ohm

CO=0.01pF

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Fig. 16(a) Bode plot (Case - III)

Fig. 16(b) Nyquist plot (Case - III)

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Fig. 16(c) Root locus (Case - III)

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7. DESIGN STEPS FOR PIERCE OSCILLATOR

1. Choice of Crystal A crystal is selected with shears at specific planes that make it oscillate at the desired frequency for its fundamental mode.

2. Choice of Circuit Capacitances C1 and C2 and Estimation of C3 The values of C1 and C2 essentially control the amount of frequency pulling pc by the circuit. If pc is increased, the frequency of oscillation moves away from the intrinsic mechanical resonant frequency of the resonator and becomes more dependent on the sustaining circuit. Frequency stability is then degraded. If pc is reduced, the critical transconductance Gmcrit is increased, resulting in an increase of power consumption. The same formula shows that for a given amount of pulling, Gmcrit is minimum for C1 = C2. C1 and C2 must be large enough with respect to C3 to ensure a maximum value of negative resistance much larger than the motional resistance Rm (Km >>1). This is to minimize the effect of variations of Rm on the frequency of oscillation. If the source of the transistor is grounded, C3 is usually dominated by the intrinsic parallel capacitance C12 of the resonator plus the drain-to-source capacitance of the transistor .

3. Calculation of Pulling and Series Resonant Frequency Knowing Cm, C1, C2 and C3, the frequency pulling pc at the critical condition for oscillation can be calculated , assuming a negligible effect of losses. In a good design, this effect as well as that of nonlinearities should be kept negligible. Hence the pulling ps at stable oscillation will be very

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close to this value. Knowing the specified frequency of stable oscillation fs, the exact (series) resonant frequency fm to be specified for the resonator is given by

4. Calculation of Minimum Start-up Time Constant and Corresponding Transconductance The maximum possible negative resistance |Rn0|max, minimum start-up time constant , Gmopt are then calculated by the relations given in the previous text.

5. Choice of the Amplitude of Oscillation at the Gate If the amplitude of oscillation is too small, the output signal has to be amplified to be used in the system. The input admittance of the amplifier may have a real part proportional to its voltage gain, which adds losses in the oscillator. Moreover, the input referred noise of the amplifier is transformed into a component of phase noise. If the amplitude of oscillation is too large, the power dissipated in the resonator can exceed the acceptable limit, resulting in excessive aging or even breaking of the resonator. Moreover, a large amplitude of oscillation requires a large value of supply voltage to maintain the active transistor in saturation, in order to avoid additional losses and a degradation of frequency stability.

6. Calculation of Power The power dissipated in the resonator is obtained by

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This is always possible since and Rm are always known. The result must then be compared with the maximum acceptable value, as given by the vendor.

7. Choice of the Amount of Overdrive The overdrive current ratio I0/I0crit necessary to obtain a given amplitude can be controlled by IC0, the inversion coefficient of the transistor at I0crit (or by kc, the attenuation of the capacitive divider. A small amount of overdrive should be chosen to minimize the nonlinear effects. This is needed to reduce the risk of oscillation on an unwanted mode. It is also needed for a good frequency stability. But also the larger the overdrive, the smaller the bias current necessary to obtain a given amplitude. Indeed, the absolute minimum is obtained when the transistor is weak inversion.

8. Calculation of Critical Current, Bias Current and Specific Current of the Transistor Once the choice of IC0 has been made, the critical current of oscillation (bias current for zero amplitude) is obtained from

9. Calculation of the Active Transistor The width-to-length ratio of the active transistor W/L is obtained from the definition of Ispec. To avoid additional losses due to the output conductance Gds, the intrinsic voltage gain of the transistor should be much larger than unity. Thus, the channel length L should be more than the minimum possible, to ensure an acceptable value of VM. Knowing the values of L and W, the gate capacitance can be can be calculated to verify that it is only a small fraction of C1, since it is
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voltage dependent. The voltage-dependent drain capacitance is proportional to W, and should only be a small fraction of C2.The drain to gate capacitance is also proportional to W. It must be included in the value of C3.

Fig. 17 A 3 MHZ oscillator Transient

We take the values of the oscillator parameters as: Rl= C1 =27pf R2=10 kohm CO=1fF C2=27pf L=2.533H R3=5.33k C3=1pf

RO=20ohm

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We perform the stability analysis using control theory as described in earlier section, and we get the following curves:

Fig. 18(a) Bode plot

Fig. 18(b) Nyquist plot

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Fig. 18(c) Root locus plot

From the bode plot, we see that when phase is 180 , the magnitude plot is above 1. The nyquist plot cuts the real axis at two points, so we can get stable oscillations for a range of values of gm . Also, initially the roots go into the right half plane, so we can have growth of oscillations. Gradually, as the oscillations build-up, the roots will move onto the j axis giving stable oscillation.

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8. ANOTHER APPROACH TOWARDS DESIGN

In the circuit we will use for the analysis, M1 is the active element which is an nmos transistor. It is biased by a depletion nmos with gate and source shorted. A pmos current source load can be used in its place. Transistor M3 acts as a large resistor to bias M1 in the active region. The crystal is connected externally across two terminals as shown. Capacitors Cl and C2 represent chip and package parasitic plus any added external capacitance. The frequency of oscillation is such that the crystal appears inductive, and together with Cl and C2 produces a 180 phase shift to give a total loop phase shift of 0 degrees. Many crystal manufacturers specify values of C l and C2 in the range 10-30 pF and this is usually added externally. Trimming of the oscillator frequency can also be achieved by making Cl or C2 externally variable.

Fig. 19 Pierce crystal oscillator

7.1 Large signal analysis

Transistor M2 is assumed a perfect current source of value IL which sets the average current in M1 in steady state. Transistor M1 is represented by a controlled current source ID. The crystal is represented by an equivalent inductance L, which absorbs the crystal parasitic capacitance. M3 is
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represented by a resistor R3. The presence of R3 forces the average voltage at V1 and V2 to be equal. For reasonable input and output voltage swings this usually results in M1 entering the ohmic region of its characteristic when V2 goes low and VI goes high. An important design consideration, however, is that neither VI nor V2 be allowed to go negative as this can result in minority carrier injection into the p-type substrate. The analysis of the steady-state condition of the circuit is greatly facilitated by calculation of a large-signal transconductance from V1 to ID. For this purpose both VI and V2 are assumed sinusoidal. This is an excellent assumption for V1 as the crystal only passes current at its fundamental frequency and has a large impedance at all harmonics of the oscillation frequency. Voltage V2 shows more waveform distortion, but the assumption of a sinusoid waveform is a reasonable approximation in practice. In steady state in Figure 20 below

Fig. 20 Large signal equivalent circuit of the oscillator

We take the case for n=1 as we assume C1 and C2 are equal. For the active device M1 we have in saturation

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In triode region we have

In the cut off region ID is zero. The calculation of the current waveform ID is complicated by the fact that M1 operates in three alternate modes. A typical waveform is shown in Fig. where the device is ohmic for wt =0 to , in saturation for wt = to , and in cutoff for wt = to 2. The bias point does not stay the same with the growth of oscillation. As the oscillation amplitude grows, the bias point goes down at the gate and drain. Assuming initially the nmos circuit was biased at voltage Va we have

Also the average value of the drain current is equal to the bias current which is expressed in the relation

Now as the oscillation amplitude grows from the above relation for V1 we see voltage at gate reduces and that at the drain increases. Initially at t=0, Vgd is 2Vo, which assuming a high value is greater than the threshold voltage and the transistor is in deep triode region and the relation is

Now, the current increases with time since the second term is reducing and in the first term VbVocoswt is increasing and its rate of increase more than offsets the rate of decrease of Vb+ VoCoswt - Vt. The current keeps on increasing till the voltage Vgd becomes equal to Vt beyond which the transistor enters the saturation region in which the following relation holds
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Now the current reduces with time until the gate to source voltage reduces below Vt after which the transistor goes into cut off after which the current becomes zero. The current waveform is shown below in figure 21.

Fig. 21 Drain current variation with time Now at the points on the curves in which the transistor changes region the following relation holds

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we expand the current waveform in a fourier series with cosine as the basis functions, the dc term would still be equal to the bias current. That relation gives us a relation between Vb, Va and Vo.In this design procedure we are setting our targets towards an output oscillation amplitude and we are setting the initial loop gain(gm/Gm).Therefore with the knowledge of Vo the relation leaves Va and Vb related. Now when the critical value of trans conductance is reached

I1 is the fundamental component of drain current. Now

Thus

Now we find the fundamental component of drain current in terms of Va, Vb and Vo and use the relation above with the knowledge of the initial gain (gm/Gm) and Vo we again find Va and Vb related. Solving the two equations we get the value of Va and Vb. We can now also calculate the value of I1/IL. We can then decide the value of bias current and having known Va we can calculate the aspect ratios for the transistors.

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7.2 Implementation of gate to drain resistance

The drain-to-gate resistor R3 in the basic grounded-source oscillator is needed to bias the active transistor T1 in saturation. Its value must be sufficiently large to limit the loss. Many processes do not provide any possibility to implement a real resistor. When they do, the sheet resistivity is usually high enough to implement the few kilo ohms needed. But it is usually much too small to implement M resistors on a acceptable area. A possibility to replace a linear resistor by a transistor .There is shift of 180 degrees between the gate and drain at the point of oscillation when C1 and C2 are equal. In that case If we maintain the transistor in deep triode the value of Vds2 can be neglected and we are left with a linear relation between Vds and the current, and it acts a linear resistor. To maintain the transistor in deep triode region it is necessary that Vgd>>Vt. To maintain this condition the gate is connected to the supply.

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9. AMPLITUDE REGULATION
An oscillator is always given a closed loop gain greater than 1 for the growth of oscillations. If the loop gain is not greater than 1 the noise amplitude of the desired frequency wont grow and we will not have the desired SNR for that frequency in the circuit. But with gain greater than one the amplitude will keep on growing. Theoretically, the amplitude will grow upto infinity and the system will be unstable but practically since the source of supply cannot provide infinite amount of energy the active element will go through regions of varying gain finally stabilizing at unity gain. Assuming a theoretical condition in which we always maintain the transistor in saturation region, we will get the output as shown in figure 22.

Fig. 22 Start-up when transistor is modeled using Gm model This shows unconstrained growth. If we use a transistor model we witness a limitation in the growth of the oscillation amplitude(Figure 23)

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Fig. 23 Growth of oscillation when using a real transistor The transistor will limit the oscillation amplitude because of limited bias. It will change its region of operation during the time period of oscillation cycle and make the average gain converge to unity after which it will not reduce the gain further and stabilize the oscillations. It will then act as a unity gain buffer for that frequency. The analysis for a transistor in different regions is as follows:

8.1 Transistor in Weak Inversion

Let us assume that the transistor remains in weak inversion even for the peak value of drain current. In order to avoid losses, it should also remain saturated even for the minimum value of drain voltage. Thus ID =IF and weak inversion is ensured if Ispec>>IDmax. Since the source voltage VS = 0, the drain current given by

Where
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, The dc component of the drain current is obtained by

Where

is the modified Bessel function of order 0. The fundamental component is given by

Where

is the modified Bessel function of order 1.

The transconductance for the fundamental frequency can then be expressed as a function of the bias current I0 and of the normalized gate voltage amplitude V1 by introducing which gives

, at the condition of oscillation. It is the minimum possible value of the critical current as the trans conductance is maximum for a given value of bias current in subthreshold region as the mos transistor behaves like a bipolar transistor in subthreshold region.

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10.
9.1 Basic Analysis

AMPLITUDE LIMITER CIRCUITS

Amplitude limiter circuits are used to reduce the power dissipation that may be caused due to a high initial gain. For quick start-up it is necessary that the initial gain or negative resistance be high but that may lead to power dissipation which is unnecessary. To alleviate it we sample the oscillation amplitude and provide a negative feedback through reduced bias so that the negative resistance keeps on decreasing with the growth of oscillation amplitude. Vittoz had proposed an ALC (Figure 24) which works on the principle of energy conservation. The principle applies as follows: The bias current of a mos transistor is kept constant. When oscillation amplitude is impressed upon the established bias point the current through the mos must increase which is not possible. So the average bias point reduces to keep the current same. Without any oscillation, IB=kp(VDD-VG-VT)2 With oscillation amplitude A IB= kp(VDD-VG-VT)2 + A2/2 That is if A>0, then VG>VG This VG represents the average DC value (filtered DC version of the gate voltage) and which falls with increasing amplitude of oscillation. Thus, VG can be used to control gate of another PMOS , such that as amplitude of oscillation increases, VG increases and current sent to the oscillator core decreases, thereby auto-controlling the amplitude by negative feedback.

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Fig. 24 ALC proposed by Vittoz

Node 3 is where the input sine wave is coupled and node 13 represents the filtered DC version of the gate, i.e. VG. Below are the plots shown in figure 25.

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Fig. 25(a) Filtered gate Voltage V(13) with A=200mv

Fig. 25(b) Filtered Gate voltage V(13) with A=400m We find that with A=0mV, V(13)= 1.704V A=200mV, V(13)= 2.00V A=400mV, V(13)=2.15V Thus, the filtered Gate voltage rises with the rising amplitude.

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9.2 Another Approach

We can also make use of the fact that as oscillation amplitude increases, the bias point VB reduces. Thus, we can have a circuit sense the bias value and accordingly adjust the bias current to control the oscillation amplitude. The plot of variation of VB VT vs. Vo is shown below for different values of VT. All the values have been normalized with respect to VA VT , the overdrive voltage of transistor M1. The corresponding MATLAB code has been shown in Appendix II.

Fig. 26 Plot of (VB VT) vs. Vo

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FUTURE SCOPE
The extension basically can foray into design of an active ALC with reduced dissipation. Also stability analysis of the pierce oscillator coupled with ALC can be done to determine the factors affecting the design of ALC. Sub threshold resistor implementation can be done in the vittoz ALC to reduce the area on chip, since the low pass filter in the ALC has a very high value it is not possible to implement it using the sheet resistance. Implementation of a digital ALC is also possible which can digitally deduct the bias current by the use of counters and multiplexers.

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REFERENCES

1. Vittoz, E.A.; Degrauwe, M.G.R. and Bitz, S. "High-performance crystal oscillator circuits: theory and application", IEEE Journal of Solid-State Circuits, Volume: 23 , Issue: 3 1988 , Page(s): 774 - 783. 2. R. G. Meyer and D. Soo, MOS crystal oscillator design, IEEE J.Solid-State Circuits, vol. SC-15, pp. 222-228, Apr. 1980. 3. .M. A. Unkrich and R. G. Meyer, Conditions for start-up in crystal oscillators. IEEE J. Solid-State Circuits, vol. SC-17. no. 1. D.D..87-90, Feb. 1982.

4. R. J. Matthys, Crystal Oscillators Circuits. New York, NY: Wiley-Interscience,1983.

5. Razavi B., Design of analog CMOS integrated circuits, New Yorks, McGraw-Hill, 2001. 6. Jin-Qin Lu,Yasuo Tsuzuki, Analysis of Startup Characteristics of crystal oscillators, Proceedings of 39th Frequency Control Symposium, 1991. 7. Andreas Rusznyak, Start-up Time of CMOS Oscillators, IEEE Trans. on Circuits and Systems,Vol.CAS-34,No.3,March l987.

8. Santos, J.T. and Meyer, R.G. "A one-pin crystal oscillator for VLSI circuits" IEEE Journal of Solid-State Circuits, Volume: 19 , Issue: 2 Year: 1984 , Page(s): 228 - 236. 9. Masahiro Toki, High Effective Q Cmos Crystal Oscillator Design , 1999 Joint Meeting EFTF - IEEE IFCS.

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10. John A. T. M. van den Homberg, A Universal 0.03-mm2 One-Pin Crystal Oscillator in CMOS, IEEE Journal Of Solid-State Circuits, VOL. 34, NO. 7, JULY 1999.

11. Benjamin Parzen/Arthur Ballato, Design of Crystal and Other Harmonic Oscillators, John Wiley & Sons. 12. Dwyer, D.F.J., Characteristics of Quartz Crystal Oscillators, Electronic Engineering, pp 24-25, April 1977. 13. Shun Yao, Hengfang Zhu, Xiaobo Wu, Design of Low Power CMOS Crystal Oscillator with Tuning Capacitors, Engineering Letters, 14:1, EL_14_1_8 (Advance online publication: 12 February 2007). 14. B. J. Skehan, Design of an Amplitude-Stable Sine-Wave Oscillator, IEEE Journal Of Solid-State Circuits, pp 312-315, September 1968.

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APPENDIX I
%Control theory plots clc; clear all; close all; % Enter component parameters here: r1=10e40; r3=10e4; r2=10e3; c1=20e-12; c2=c1; c3=5e-12; c0=0.01e-12; r0=20; l=2.533; %calculation of transfer function t1s=[r1*r2]; t2s=[r1*c1*r2*c2 r1*c1+r2*c2 1]; t3s=[r1*r2*c2+r1*c1*r2 r1+r2]; ds=[l*c0*r3*c3 (r0*c0*r3*c3+l*c0) ((1+(c0/c3))*r3*c3+r0*c0) 1]; ns=[r3*l*c0 r3*r0*c0 r3]; num=conv(t1s,ds); d1=conv(t2s,ns);
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d2=conv(t3s,ds); den=d1+d2; voi=tf(num,den) %plotting the curves rlocus(voi); figure; bode(voi); figure; nyquist(voi);

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APPENDIX II
%Plot of Vb-Vt vs Va clc; clear all; close all; vt = 0.7; vo = 0.2; for i=1:5; c=i; syms x y ; ezplot(y*y*acos(c/(2*x)) +3*x*y*sin(acos(c/(2*x)))-c*y*acos(c/(2*x))-x*y*sin(acos(c/(2*x)))3*x*x*(acos(c/(2*x))/2+sin(2*acos(c/(2*x)))/4)+ c*x*sin(acos(c/(2*x)))+c*y*acos(c/(2*x))+3*x*c*sin(acos(c/(2*x)))c*c*acos(c/(2*x))+x*x*(acos(-y/x)/2+sin(2*acos(-y/x))/4 - acos(c/(2*x))/2sin(2*acos(c/(2*x)))/4)+y*y*(acos(-y/x)-acos(c/(2*x)))+2*x*y*(sin(acos(-y/x))sin(acos(c/(2*x)))) - pi,[0,4,-2,2]); hold on; end xlabel('Vo/(Va - Vt)'); ylabel('(Vb - Vt)/(Va - Vt)');

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