Академический Документы
Профессиональный Документы
Культура Документы
Chapter No.
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12.
Description
General Architecture of Digital Switching System Functional Architecture of OCB 283 switch Hardware architecture of OCB-283 Switching Systems Main control station SMC Switching multiprocessor station (SMX) Auxilary Multiprocessor Station (SMA) Trunk multiprocessors station (SMT) Maintenance multiprocessor (SMM) Synchronisation and time base station (STS) Locavar Defence Arrangement of Power Plant Environment requirements of ocb-283 system
Page No.
1-3 4-8 9-12 13-33 34-49 50-55 56-72 73-85 86-118 119-141 142-154 155-164
OCB 283
2.0 2.1
2.2
It is a digital switching system with single T stage Switch. A maximum of 2048 PCMs can be connected. It supports both analogue and digital subscribers. The system supports all the existing singalling systems, like decadic, MF (R2), CAS and also CCITT#7 signalling system. It provides telephony, ISDN, Data communication, cellular radio and other value added services. The system has automatic recovery feature. When a serious fault occurs in a control unit, it gives a message to SMM (O & M Unit). The SMM puts this unit out of service, loads the software of this unit in a back up unit and brings it into service. Diagnostic programmes are run on the faulty unit and the diagnostics is printed on a terminal.
(vi)
OCB-283 has a double remoting facility. Subscribers access unit CSND can be placed at a remote place and connected to the main exchange through PCM links. Further, line concentrators can also be placed at a remote location and connected to the CSNL or CSND through PCMs. This special feature can meet entire range of necessities viz. urban, semi-urban and rural.
(vii)
Various units of OCB-283 system are connected over token rings (IEE 802.5 standard). This enables fast exchange of information and avoids complicated links and wiring between various units.
(viii)
The charge accounts of subscribers are automatically saved in the disc, once in a day. This avoids loss of revenue in case of total power supply/battery failure.
(ix)
The traffic handling capacity of the system is huge. It can handle 8,00,000 BHCA and 25,000 erlangs of traffic. Depending on the traffic, a maximum of 2,00,000 subscriber or 60,000 circuits (or trade off between these two) can be connected.
(x) (xi)
The exchange can be managed either locally or from an NMC through 64 Kb/S link. All the control units are implemented on the same type of hardware. This is called a station. Depending on the requirement of processing capacity, software of either one or several control units can be located on the same
station. For all these control units, only one backup station is provided, enabling automatic recovery in case of fault. (xii) The OCB-283 system is made up of only 35 types of cards. This excludes the cards required for CSN . Because of this, the number of spare cards to be kept for maintenance, are drastically reduced. (xiii) (xiv) The system has modular structure. The expansion can be very easily carried out by adding necessary hardware and software. The SMMs (O&M Units) are duplicated with one active and other hot standby. In case of faults, switch over takes place automatically. Moreover, as discs are connected to both SMMS. there is no necessity of changing cables from one system to another. (xv) The hard disc is very small in size, compact and maintenance free. It has a very huge memory capacity of 1.3 Giga bytes. The detail billing data are regularly saved in the disc itself, from were they can be transferred to mag tape for processing (xvi) The space requirement is very small. No separate room is required for OMC. (xvii) There is no fixed or rigid rack and suite configuration in the system. It provided great flexibility and adjustment in the available space. (xviii) The environment requirements of the system are very flexible. False floor and ceiling are not essential. Air conditioning requirements are also not stringent. The system can work at temperatures 5 to 45o C, though the optimum temperature is 22 o C. 2.2 SUBSCRIBER FACILITIES PROVIDED BY OCB 283 OCB 283 provides a large number of subscriber facilities. Some facilities are available to only digital subscribers and as such they can not be availed by analogue subscribers. To avail these facilities subscriber number are given special categories by man machine commands. Facilities to analogue subscribers:
A line can be made only out going or incoming. Immediate hot line facility The subscriber is connected to another predetermined subscriber on lifting the handset without dialing any number. Delayed hot line facility When subscriber lifts the handset. Dial Tone is provided he can dial any number. If he does not dial a number, within a predetermined time, he is connected to predetermined number.
(iv)
Aviated dialing The subscriber can record a short code and its correspondence full number in the memory. Later to dial this number, he has to only dial short code.
(v)
Call forwarding When activating to the number mentioned The facility is by the incoming calls to the subscriber gets transferred especially very useful for the people who are activating the facility.
(vi)
Conference between 4 subscribers The subscriber conversation, can include two more more subscribers by pressing B while in dialing their number
(vii)
Call waiting indication When a subscriber is engaged in conversation and an incoming call, an indication is given in the form of a tone. Hearing this, the subscriber has option, either to hold the subscriber in conversation and attend the waiting call or to disconnect this subscriber and attend to the waiting call. In the former case, he can revert back to the earlier subscriber.
(viii)
Automatic call back on busy If this facility is activated and if the called subscriber is found busy, the calling subscriber simply replaces the receiver. The system keeps watch on the called subscriber and when it becomes free, a ring is given to both the subscribers. On lifting they can talk to each other.
(ix)
Priority line Calls from this line are processed and put through even when the number of free channels are within a threshould or when the system is operating in a catastrophic mode.
(x) (xi)
Malicious call identification When this category is given to a subscriber, the number of calling subscriber (to this number) is printed on the terminal. 12 to 16 kHz meter pulses The system can send 12 or 16 kHz meter pulses on the subscriber line for the operation of the home meter.
Battery reversal The system extends battery reversal when called subscriber answers. This is useful in case of CCBs. Detailed billing The system provides detailed bills giving details of date, time metered units etc. Absent subscriber service When activated, the incoming calls are diverted to absent subscriber service for suitable instructions or information. FACILITIES TO DIGITAL SUBSCRIBERS
Digital subscriber are provided all the facilities available to analogue subscribers. In addition, they are provided following facilities which are called ISDN services. An ISDN subscriber can use many electronic devices on its telephone line and can utilise them for 2 or more simultaneous calls of either. VOICE DATA VIDEO
The ISDN or Digital Subscriber of OCB-283 can be provided the following types of connections. 2 B + D Line :- 2 Voice Channels of 64 kbps & 1 Data channel for 16 kbps 30 B + D Line :- 30 voice channels of 64 kbps & 1 Data channel of 64 kbps
ISDN SUBSCRIBERS
EPABX
OCB-283
The following is the list of some of the service to Digital subscribers (a) (b) (c) (d) (e) It provides 64 Kb/s digital connectivity between two subscribers for data communication. The system can provide Group 2, 3 or 4 Facsimile (FAX) services. It provides videotext services. The system provides display of calling subscriber number on called subscribers telephone. The system also provides the facility for restriction of the display of calling subscriber number on called subscribers terminal. To avail this facility, the subscriber has to be given a category. (f) The system provides the facility of displaying connected number on the calling subscribers terminal. This is especially useful when called subscriber has activated call transfer facility. The calling subscriber can choose to speak on forwarded number or disconnect the call. (g) (h) (i) The above facility can be restricted byu giving special category to the subscriber. Charging advice The system is capable of providing charging advice either in real time or at the end of the call. User to user signalling The system permits transfer to mini messages between calling and called subscribers during call set up and ringing phase. (j) Terminal portability during the call A subscriber (calling subscriber as well as called subscriber) can unplug terminal,
carry it to some other place or room and resume the call within 3 minutes. (k) Listing unanswered calls - The number of calling subscribers, who calls during the absence of called subscriber, are recorded in called subscribers terminal. The called subscriber can then check up these numbers and call them back if, he so wish.
------------------------------------ PROCESSING CAPACITY 220 CA/S OR 800, 000 BHCA ERLANGE TRAFFIC 25, 000 MAX. 200,000 MAX. CIRCUITS 60, 000 SUBSCRIBER
OCB-283 OR ALCATEL 1000 E-10 CAN WORK WITH ALL TYPE OF NETWORK
PACKET SWI TCH Intelligent Net wor
VALUEADVDED NETWORKS
VANS
OCB
TMN
TELECOMM MANAGEMENT
NETWORK
MOBILR TELEPHONE
Broadband
ISDN
The E-10 (OCB-283) consists mainly of: control stations. software machines, a communication local area network
This architecture also has other units including the STS (synchronization and time base station) which provides the timing signals for processing digital data. Figure 5. shows the architecture of the E-10 (OCB-283) and the systems interfaces.
Local network
Telephonic network
SMX
Signalling network
SMA
Data network
SMM
SMC
SMC
SMC
TMN
OCB/283/SYS/0005 AA
RCX : switching matrix TMN : telecommunication management network SMA : auxiliary equipment control station SMC : main control station SMM : maintenance station SMT : trunk control station SMX : matrix control station STS : synchronization and time base station
Fig. 5 Architecture of the E-10 (OCB-283) The Alcatel 1000 E-10 (OCB-283) in the telecommunication Network The E-10 B (OCB-283) can be used for all switching applications: local exchange. regional or national transit exchange.
international transit exchange. intelligent network service switching point. mobile service switching point.
The E-10 (OCB-283) can also provide the STP (signallinmg transfer point) function of the N0 7 signalling network.
Service switching point (SSP) OCB-283 SCP SMP
Intelligent network
(ii)
OCB-283
Transit exchange
(ii)
OCB-283 OCB-283 Local exchange Access Netweok BSC (iv) Mobile services switching centre (MSC)
CSN CN
CN
BSC : Base Station Controller BTS : Base Transceiver Station CN : digital concentrator CSN : subscriber digital access units SCP : Service Control point SMP : Service Management Point
All the tools are available. All the material as per equipment list are received. Availability of power plant and earth should also be ensured. All cable trays for subscriber, PCM & Power cables & alarm cables are fitted.
DIMENSIONS FOR OCB 283 EXCHANGE Rack Size in (mm) No of Rows (Suits) in a Switch Room No of Racks per suite : : Not Fixed Not Fixed : 2200 Hz 950 Wx 690 D
but for practical convenience may be limited upto Inter suite Gap mm Clearance from Sidewalls Height of Ceiling Minimum Approximate floor area for a 6k exchange Sequence of lay out of racks in suites restriction (other than specific to site) except for
: : : : : : :
CA & DBM racks to be installed together preferably in middle of Suites of exchange. XA Racks to be installed in continuity & in Identical location s in two suites for the branches A & B. OCB283 RACKS - Front View
CA SMC STS 2200 MM SMMA AL ANN PER DBM CB SMC CC SMC SMC SMC SMC SMC 5 SMCs CSN-BASIC UCN CNL0 CNL1 CNL2 CNL3 UCN+4 CNL (ICNE) SMX1 SMX2 SMX E SMX E Only SMXs CSN-EXTN. CNL4 CNL5 CNL6 CNL7 CNL8 5CNL (ICNE) XA UA SMC SMT-A SMT-B SMT-A SMT-B 1 SMC + 2 SMTs
SMMS 1 SMC + STS+SMMA/B UB SMC SMT-A SMT-B SMA SMA SMA 1 SMC + 2 SMT+2
LAYOUT OF ROOM :- Layout of the exchange is one of the foremost documents to refer. It gives the positions of various racks & equipments & devices. LAY OUT OF AN OCB-283 SWITCHING ROOM EXAMPLE :- BOMBAY SION TELEPHONE EXCHANGE
ALL DIMENSIONS IN MM
TR07
UEI
CSN 021
TR06
DBM
CA UC1
SDE1 CB1
XAIA
XAZA
I R P
TR05
CSN 010
UD1
UC2
XAIB
XAZB
TR04
CSN 061 16 16 15 15 14 14 13 13 12 12 11 11 10 10 9 9
CSN 060 8 8
CSN 051 7 7
CSN 050 6 6
CSN 041 5 5
CSN 040 4 4 3
CSN 031 2 3
CSN 030 1 2 1
VDU
VDU
VDU ACDB
I R P
Installation
CONFORMITY OF HARDWARE T1
ALARMS TEST T11 APPLICATION OF TRAFFIC LOAD T12 SYSTEM STABILIZATION T13 SITE DATA CHECK T14 OPERATION AND MAINTENANCE TESTS DEFENCE TRAFFIC OBSERVATION T15 SUBSCRIBER AND SWITCHING FACILITIES T16 INTERWORKING SIGNALLING TEST T17 PREPARATION FPR ACCE[TANCE T18 HANDOVER PREPARATION T19
COMMISSIONING T20
HARDWARE PROGRAMMING
Hardware programming is done on all the stations of OCB-283 except CSNs for the purpose of making the PHYSICAL ADDRESS of the MULTIPROCESSORS STATION on the communication multiplexes. HARDWARE PROGRAMMING is done on the TWO DIP switches on the Back plane of each shelf of the stations of OCB-283 as follows:
SUBSCRIBER AND SWITCHING FACILITIES T16
1. OFF ON
2.
3.
4. LS
5.
6. MS
7.
8. OFF LS ON
1. MS TYOR
2.
3. LS
4. MS
5.
6.
7.
8.
DCOP
APSM (MSB)
It is indicated by DIP SWITCH2s switches from 4 to 8 (5 MSBs) & DIP SWITCH1s switches 1 to 4 (4 LSBs) = 8 bit field. The value of these switches in binary indicates the physical address of the station. The various stations can have the following APSMs. APSM = 1STS, = 2 SMMA = SMMB APSM = 4 TO 63 SMCAPSM = 64 TO 95 SMX (COM switches) AMSM = 96 TO 223 SMA APSM = 224 TO 479 SMTs
TYOR : (TYPE OF UNITS) Type of units is indicated by switches 1 to 3 of DIP SWITCH 2. TYOR = 0 -> SMM A,SMMB, SMTB TYOR = 1 -> SMTA TYOR = 3 SMX TYOR = 2 SMC or SMA TYOR = 7 Handler
DCOP : (COUPLER FIELD) Coupler field DCOP is switch nos. 6 to 8 DIP SWITCH 1. It indicate the communication multiplex.
TYCP is a single switch no5 of DIP Switch.: TYCP = 0 SECONDARY COUPLER TYCP = 1 MAIN COUPLER
The following is the list standard OCB-283 documents supplied alongwith exchange equipments. They contain (A) (B) The specific documents for site specific data & layouts and Cabling charts. General documents common to all sites. (eg. Commands, Operator sheets etc.)
Sl. No.
TOM-VOL-FILE NO.
TITLE OF DOCUMENT LIST OF DOCUMENTS (B) GUID TO SYSTEM DOCUMENTATION (B) OPERATION & MAINTENANCE (B) PREVENTIVE MAINTENANCE (B) SUBSCRIBER LINE MANAGEMENT ALARMS AND MALFUNCTIONS MALFUNCTION REPORT MESSAGE (B) RTOS DICTIONARY OF MALFUNCTIONS (B) RTOS DICTIONARY OF MALFUNCTIONS (B) OPERATOR SHEET A TO F (B) OPERATOR SHEET G TO 0 OPERATOR SHEET P TO U SYSTEM OPERATINMG AND MAINTENANCE MANUAL (B) RTOS MNEMONIC DICTIONARY (B) PERIODIC TASKS (B) SPECIFIC DOCUMENT (A)
PURPOSE INDEX SYSTEM ARCH. SYSTEM COMMISSIONING TERMS, ABBR., GLOSSORY, IDENTIFICATION INTRODUCTION TO O&M SYSTEM & TELEPHONE USERS O&M SHEETS SYSTEM ACTIVATION TOTAL SYSTEM FAILURE SMM O&M SUBSCRIBER LINE MANAGEMENT ALARMS DICTIONARY OF MALFUNCTION REPORT
1. 2.
1-1-1 1-1-2
2-1-1 2-2-1 2-3-1 2-4-1 2-4-2 2-4-3 2-5-1 2-5-2 2-5-3 2-5-4 2-6-1 2-7-1 2-9-1 3-1-1
DICTIONARY OF MNEMONICS AND SYMBOLS O&M COMMANDS SHEETS FOR OPERATIOR FROM A TO F O&M COMMANDS SHEETS FOR OPERATOR FROM G TO 0 O&M COMMANDS SHEETS FOR OPERATOR FROM P TO U O&M RTOS OPERATOR SHEETS MACRO COMMANDS DESCRIPTION OF PERPIODIC TASKS INSTALLATION DOCUMENT
17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28.
3-1-2 3-1-3 3-1-4 3-1-5 8-1-1 8-1-2 8-1-3 10-1-1 10-1-5 10-1-6 10-1-7 10-1-8
OPERATING DTA REDA (A) ACCEPTAN CE TESTING PROCEDURES (A) INSTALLATION DOCUMENT (A) EQUIPMENT LOG (A) SOFTWARE DOCUMENTATIONS (B) FILES OF TR, TX ETC. (B) OM & CSN FILES INSTALLATION DOCUMENT (A) INSTALLATION DOCUMET COMMISSIONINBG DOCUMENT (A) COMMISSIONINBG DOCUMENT (A) COMMISSIONINBG DOCUMENT (A)
INSTALLATION DOCUMENT A/T PROCEDURES INSTALLATION TECHNICAL STATUS SOFTWARE SOFTWARE SOFTWARE HARDWARE DETAILS HARDARE DETAILS GUIDE TO COMMISSIONING] GUIMES GUIDE TO COMMISSIONING] GUIMES GUIDE TO COMMISSIONING] GUIMES
Chapter 1
General Architecture of Digital Switching System A digital switching system uses the S.P.C. concept and a digital switch. The following diagram indicates the basic building blocks of any digital switching system. (Fig.1)
N x 2 Mbps links
DIGITAL SWITCH
CONTROLLERS Other auxiliary inter faces consisting of Tone generator Frequency receives Conference call facility CCS# 7 Protocol Manager V 5.2 access manager
1.1
1.2
PCM interface:
Any digital exchange can only accept intelligence in PCM decoded form and hence trunks from other exchange or links from remote subscriber units or other access systems e.g. V 5.2 will be inform of PCMs. These PCMs are terminated in a PCM interface. The basic function of the PCM interface would be HDB3/ Binary code conversion, CAS handling and forwarding CCS# 7 signals to suitable protocol handler. PCM interface on the other hand are connected to switch and other controllers.
1.3
Auxiliary interface :
The auxiliary interface is again a service peripheral which take care of one or more of the following functions:(a) (b) (c) (d) (e) Tone generation e.g. DT, BT, RBT NU etc. MF Signalling dual tone Conference call facility CCS #7 protocol management Access Network (V 5.2) protocol management
1.4
Controllers :
Various controllers are required to control switching based on the digital informations received from subscribers or over the trunks. The main control function are :-
1.4.1. 1.4.2
Call handler (Register) : This is the control function which processes a call right from the point of seizure to called party connection. Translator : This control function basically maintains all data base of subs & trunks and provides necessary information to call handler enabling the same to establish connection between calling links T/S to called link T/S. Charger : Computation of charge based on set principles is carried out by this control function. Other control functions could be controllers for connection, message distribution and formatting and defence for connections and CCS # 7 protocol management functions etc.
1.4.3
The various control processes may be centralised or distributed depending upon type of system. 2. The Switch : A digital switch of different configuration e.g. a pure Time Switch or a combination of time and space switches are used in different type of exchanges and various service peripheral like subs access/trunk access etc. are connected to this by n X 2 Mbps link as shown, Switch connections are established by controllers like call handlers. OM functions : A general purpose computer is generally used with dedicated software to dialogue with the system in order to carryout various operation and mtce. activities like data base creation, fault/alarm message output diagnostics, creation of new equipments etc. Additional Features in new Switches: New switches are capable of providing ISDN where in i.e. the subs loop is also digital. The ISDN feature necessiates CCS# 7 signalling also.
3.
4.
Chapter - 2
FUNCTIONAL ARCHITECTURE OF OCB 283 SWITCH 1. The functional architecture : The main functional blocks of a OCB-283 switch are :Subscriber access sub system which carries out connection of different types of analogue and digital subscriber. Connection & Control Sub system which carries out connections and processing of calls including PCM connections. Operation and mtce. sub function which does the management of database and helps in carrying out various maintenance procedures in built in the systems.
Figure 1 shows general functional breakdown and figure 2 shows the detailed functional architecture of OCB-283 switch.
V 5.2 access CCS # 7 Network
Telephone Network
Data Network
Fig. 1
PCM From CSND CSED V 5.2 access Circuits (CAS & CCS # 7) Recorded Announcement
n=7
MR MQ GS TX TR GX CC PC
Control functions
O&M
Fig. 2 (OCB 283 Functional Architecture) The various connection and control functions in OCB-283 system are distributed with appropriate redundancy as indicated in the diagram.
2.
Brief description of the functional components :2.1 BT (Time base) : Time pulses are generated in triplicate and distributed to LRs at
Switching unit. The time base is usually synchronised with the network by a synch. interface. Synchronisation interface gets the clock from PCMs which carry traffic also and synchronises the local clock with the PCM clock and thus network synchronisation is achieved.
2.3
2.3.3 V 5.2 Protocol Handler : The signalling protocol between an access network an
d local exchange is processed and managed by this function.
2.5
2.6
(Subs or Circuit). This also prepares detailed billing messages and forwarding the same to the operation & maintenance function for further processing. Besides the charge related function the TX also is responsible for carrying out some traffic observation on subscriber and trunks.
GX also carrier out monitoring of connections and checks data links periodically..
2.10 OM Function:
This function enables to create all data required for subs/circuits and their testing. This also enables spontaneously issuing fault and alarm messages in case of indications coming from OCB units. OM function further provides features for saving detail billing/ bulk billing messages on mag tape (cartridge) . The OM function possess a two way communication path with the exchange system.
OCB 283 system does not include the subs access systems but can support different type of subs access systems. 2. There are different type of subs access units like CSNL/CSND i.e. local and distant digital (Numerique) subs connection unit and CSED i.e. (Distant analogue subs connection unit). A detail description of subs interface provided in OCB shall be discussed in yet another chapter. 3.
3.1 3.2
SMT: Trunk multiprocessor station This implements the URM function for PCMs i.e. responsible to handle CAS and be transparent to CCS# 7 signalling. SMA : Auxiliary multiprocessor station. These stations implement one or more auxiliary functions like ETA, PU/PE or V 5.2 functions. However, while ETA & PU/PE functions can be implemented in one station, V 5.2 function is implemented in SMA without any other auxiliary function.
3.3 SMX: Switch multiprocessor station This implements the switching function (COM) and contains the switch matrix system also. 3.4 SMC : Command or control multiprocessor station. This type of station implements one or more control functions like MQ, TR, TX, MR, GX, PC etc. 3.5 SMM: Maintenance multiprocessor station implementing all OM functions. This supports process for, dialogue with OCB, data base management and handling spontaneous message generated by OCB units.
3.6 4.
STS : Synchronisation and time base station. This station is responsible for generating exchange clock and synchronise the same with the network. GENERAL CONCEPT OF A STATION A station in OCB is a hardware unit consisting of number of processors and couplers connected on a common bus referred to as BSM i.e. Multiprocessor Station Bus as shown below. Each processors or couplers is a Motorola 60830 processor with sufficient on board RAM and known as an agent on the BSM. Each agent is loaded with one or more application e.g. MR. TR, TX etc. depending upon memory space required and traffic. The couplers besides supporting applications may supports other functions also e.g. couplers to connect token rings used for communication between different stations, couplers to support GT/RF/CCF and CCS#7 functions etc. The diagram shows structure of a SMC type of station Fig. 1
MIS
BL
C M P
C M S
2
P U P
C M S 3
M C
P U S
1
P U S
2
P U S
3
P U S
4
BSM BUS
MAS - 1
C M S 1
MAS - 4
C M S 4
Fig. 1 CMP : Principal Multiplex coupler for coupling to MIS token. CMS 1 to CMS 4 : Secondary multiplex couplers coupling to 1 to 4 MAS tokens. PUP : Principal processing unit. PUS 1 PUS 4 : Secondary processing unit BL : Local bus MC : Common memory. Functional architecture of different station are described in little more detail in subsequent chapters. 5. Inter Station Communication : The control stations communicate among themselves on a token ring called MIS i.e. Inter Station Multiplex, while the other stations are connected on 1 to 4 MAS i.e. station Access Multiplexes. The concept of token ring is similar to the connection of computers in a LAN. The MAS are connected to control stations also, so that the MAS domain units can communicate with control stations. Most of the time cross over from MAS to MIS domain or vice verse may require a gateway function and this is provided in the SMC with marker function. The application softwares are referred to as logical machines (ML) and are loaded as per some standard configurations in various agents of a station. The various logical machines are : {MLMR, MLTR MLTX, MLMQ, M,LGX, MLPC, MLCC} SMC MLPU/PE, MLETA, MLAN } SMA MLURM } SMT MLOC, MLOM } SMM MLCOM } SMX Little more elaborate description of individual stations shall be discussed in the following chapters.
6.
Redundancy Principles:
For reliability reasons the provisioning of hardware is more than what is required as per traffic, so that either load may be shared or transferred. The redundancy criterion is different in different station. (a) Station: SMC N +1 (N+1)th taking load on failure of any SMC. SMA (PU/PE) (N+1) (N+1) th reconfiguring on failure of any of the N PU/PEs. SMA (ETA) N (load sharing) SMA (V 5.2) 2 N (Pilot/Reserve) SMX 2 N (Parallel) SMT 2 N (Pilot stand by) MR 1 to 7 , MQ, TX, TR, GX, PC are duplicate but PC works on Pilot/Reserve mode & all others on load sharing/mode. Number of MR depends or capacity and traffic.
(b)
Logical Machines :
Chapter 4
MAIN CONTROLS TATION SMC
1.
Role of SMC:
All the control functions are supported in SMC and one or more of these functions can be used during call processing. The main control functions are MR, TR, TX, MQ, GX, PC, CC etc.
S M A MAS (1 to 4
S M X
SMC
MIS (1)
SMC
MAL
SMM
2.
3.
MIS
BL
CMP
PUP
MC
PUS 1
PUS 2
PUS 3
PUS 4
CMS 1
CMS 2
CMS 3
CMS 4
MAS 1
MAS 3 connections to MIS token ring One Principal Multiplex Coupler (CMP) for implemented in ACAJA/ACAJB One to four Secondary Multiplex Coupler for Connection to 1 to 4 MAS token ring implemented in ACAJA/ACAJB One Principal Processing Unit PUP/ implemented in (ACTUR 5) 1 to 4 Secondary Processing Unit - (PUS) also implemented in ACTUR5 One common memory ACMCS Secondary alarm coupler (CSAL) implemented in ACALA Power supply convertors (DC to DC) 5 V 40A AE 5 V 40
4.
CSAL
MISB A C A J B
MISA
MC
PUS (1<4)
A C A J A
A C U T R 5
A C M C 5
A C U T R 5
A C U T R 5
AC V 5 V 40 5V
A C V 5 V 40
A C A J A 5 MAS 1
A C A J B 5
4.1 Function of various agents on BSM 4.1.1 ACAJA 5 / ACAJB MASA5 4 as CMP
MASB 1 ACAJA
MASB 4 5 is a Motorolla 68020 processor based coupler with a 128 Kb EPROM and 4 Mb DRAM required for booting. This board is connected as an agent or BSM bus and connected to MISA ring. ACAJB 5 is similar to ACAJA 5 but there is no direct connector with BSM. It gets connected to BSM through ACAJA via a daughter board ADAJ and connects MISB.
This also supports registers ICMAT and ICLOG for storing hard and soft fault conditions.
The CMP :
NB : Enables communication between different SMCs & SMM on MIS token ring Enables loading of telephone application data A station gets inserted on MIS right on powering up but on MAS after getting initialised i.e. after application software are loaded.
4.1.2
-
A SMC with marker function (MLMQ) does the job of linking messages between MIS & MAS domain. The messages may be like status setting/operational/and security defence related message.
4.1.3
ACTUR 5 AB as PUP
The PUP i.e. main processing unit also referred to as station processor routes the exchanged informations between different entities present in the station. Each executable function e.g. TR, TX, MR, MQ, PC etc. have their own exchange function requiring practically all the storage capacity of PUP. The PCB presently in use is ACUTR 5 AB. This has Motorola 68030 processor with modularly expendable on board RAM in steps of 64 Mb. The PUP is connected to the common memory ACMCS over a 32 bit local bus.
4.1.4
ACTUR 5 AB as PUS :
The secondary processors hardware wise are similar to PUP but connected only to BSM. The PUS generally support MR (MACRO) TX (macro) MQ exchanger etc. TR and PC functions are essentially supported on PUP. The processors ACTUR 5 AB consists of MOTOROLLA 68030 40 MHz processor with 128 Kb EPROM, 4 Mb DRAM registers ICMAT & ICLOG for storing hardware and software faults respectively and a local bus interface, and a BSM interface.
4.1.5
ACALA board :
This is used as a secondary alarm coupler and do the preliminary processing of converter alarms for onward transmission to SMM over a MAL ring.
5.
(b)
6.
Internal Interfaces :
The BSM and the BL are the internal interface. While all agents are connected or BSM bus, PUP is connected to memory on local Bus. The station processor PUP use 32 bit BL for certain transactions.
BOARDS ORGANISATION IN SHELF FOR SMC STATION The PCB with their relative slot positions in shelf are indicated in the figure below:s
Location and rack assembly Location SLOT 138 132 126 120 114 108 102 96 90 82 78 70 66 58 54 46 42 34 30 24 15
ACMCS ACUTR ACAJA ACAJB ACAJA ACAJB ACAJA ACAJB ACAJA ACAJB ACAJA ACAJB ACALA AE5V40
FRONT VIEW
AE5V40 ACUTR ACUTR ACUTR ACUTR
FIG. 4
CA
CB
CC
UA
UB
UC
SMC SMC
SMC SMC
SMC
SMC SMT1G
SMM
SMA SMA
SMA SMA
SOFTWARE ARCHITECTURE OF SMC The software orgainsation is as under := The application Software which are supported by :A basic Software Hypervisor. MLSM for communication, loading and defence.
Hypervisor Functions:
This is the software enabling more than one application e.g. MQ, TR, TX etc. to be supported on same agent and it performs: Communications within the station Management of time delays Time allotment for various applications.
The elemental tasks corresponding to an application is taken care of by a software SUPERVISOR which in case of MR & TX is known as sequences. Thus Hypervisor is one per agent but supervisor is one per application on the agent.
ML SM/P
ML
ML SM/S
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
ML SM/S
MLi
MLj/E ou MLk/P
Main processor (PUP) SEQ ML SM/P ML SM/S MLi MLj/E MLj/M MLk/P MLk/S : : : : : : : : sequencer (SMR or TX) main component of MLSM
secondary component of MLSM MLi (Single component) interchange unit software module of Mlj (multi-component) macro component MLj(multi-component) main component (new structure multi-component) secondary conponent (new structure multi-component)
5.2 5.2.1
CMS 3 M L S M / S M L T R M L M R / E
M L S M / P
M L M Q
M
L G X
M L S M / S
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L M R / M PUS 1
M L S M / S
M L M R / M
M L S M / S
M L T X/ E
M L S M / S
M L T X/ E
M L P C
PUS 2
PUS 3
PUS 4
Fig. 7
5.2.2
CMS 2 M L S M / S
SUPERVISOR HYPERVISSIOR
PUP M L S M / S M L T X / E
SUPERVISOR HYPERVISOR
SUPERVISOR HYPERVISOR
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L T R
M L G X
M L S M / S
M L T X / M
M L S M / S
M L T X/ E
M L S M / S
M L M Q
M L P C
PUS 1
PUS 2
PUS 3
PUS 4
Fig. 8
(B)
SMC = MR
CMP M L S M / P
SUPERVISOR HYPERVISOR
CMS 1 M L S M / S
SUPERVISOR HYPERVISOR
CMS 2 M L S M / S
SUPERVISOR HYPERVISSIOR
PUP M L S M / S
SUPERVISOR HYPERVISOR
M L M R / E
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L M R / M
M L S M / S
M L M R / M
M L S M / S
M L M R / M
M L S M / S
M L M R / M
PUS 1
PUS 2
PUS 3
PUS 4
Fig. 9
(C)
SMC = TX + MQ + PC
CMP M L S M / P
SUPERVISOR HYPERVISOR
CMS 1 M L S M / S
SUPERVISOR HYPERVISOR
CMS 2 M L S M / S
SUPERVISOR HYPERVISSIOR
CMS 3 M L S M / S M L T X / E
SUPERVISOR HYPERVISOR
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L T X / M
M L S M / S
M L T X / M
M L S M / S
M L T X/ E
M L S M / S
M L P Q
M L P C
PUS 1
PUS 2
PUS 3
PUS 4
Fig. 10
5.2.3
CMP M L S M / P
SUPERVISOR HYPERVISOR
CMS 2 M L S M / S
SUPERVISOR HYPERVISSIOR
CMS 3 M L S M / S M L T R
SUPERVISOR HYPERVISOR
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L G X
M L P C /N
M L S M / S
M L P C / I
M L S M / S
M L M Q
M L T X/ E
M L S M / S
M L T X/ M
PUS 1
PUS 2
PUS 3
PUS 4
Fig. 11
(B)
CMP M L S M / P
SUPERVISOR HYPERVISOR
CMS 1 M L S M / S
SUPERVISOR HYPERVISOR
CMS 2 M L S M / S
SUPERVISOR HYPERVISSIOR
PUP M L S M / S M L C C / P M L M R / E
SUPERVISOR HYPERVISOR
BSM
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
HYPERVISOR SUPERVISOR
M L S M / S
M L C C / S PUS 1
M L G S / S
M L S M / S
M L C C / S
M L G S / S
M L S M / S
M L M R / M
M L S M / S
M L M R / M
PUS 2
PUS 3
PUS 4
Fig. 12
5.2.4
EXCHAN GER MR
MACRO MR
MACRO MR
MACRO MR
MACRO MR
Each MR MACROPROGRAM BLOCK can generate up to 256 MR REGISTERS simultaneously. An MR REGISTER is a software unit which controls and supervises the establishment pr breaking off of a communication. The EXCHANGER BLOCK carries out interface between all the MR registers (256, 512, 758 or 1024) and the other software machines. Two of the registers in a macro program are reserved for exchange administration.
Fig. 13
5.2.5
EXCHAN GER TX
MACRO TX
MACRO TX
MACRO TX
MACRO TX
BSM
Each STX MACROPROGRAM BLOCK can manage up to 1500 TX REGISTERS simultaneously. The TX REGISTERS is a software above to charge a communication. The EXCHANGER BLOCK ensure interface between all the TX REGISTERS (1500, 3000, 4500 or 6000) and the other software machines.
Fig. 14
5.2.6
Main CC
Secondary CC
Secondary CC
Secondary CC
Secondary CC
BSM
Each secondary MLCC can manage up to 3000 process of communication command (or calls) simultaneously. A process is a software in charge of the treatment of a communication (setting-up or breaking down) The main component MLCC assume the function of exchanger (routing of messages received at the MLCC level to the correspondent process (cc)).
Fig. 15
5.2.7
Main GS
Secondary GS
Secondary GS
Secondary GS
Secondary GS
BSM
Each component of the secondary MLGS can manage up to 3000 service management task (or servers calls) simultaneously. A task is a software in charge of checking the calls to the server at the LEG level (SSP application). The MLGS main component have the exchanger function (send back) the received messages at the MLGS level to the correspondent task manager).
Fig. 16
The distribution of various application on various agents basically depends upon the traffic and certain standard configurations have been fixed for small, medium and large systems. There can not be any choice for a different combination of applications in different agents than those specified by ALCATEL. DEFENCE: In case of any problems encountered e.g. watch dog time out or a hard fault etc. the agent supporting the related application initiates a defence function and communicates to the SMM via CMP. SMM then issues appropriate fault or alarm messages and also initiates testing of faulty station for detecting any hard fault. The stations while extending malfunction message conveys the content of ICMAT & ICLOG registers for the connivance of SMM to issue appropriate message for maintenance personnel. Generally an isolated message may not give useful informations but number of messages related to a function may give sufficient clue to fault.
POWER REQUIREMENT :
ACUTR ACMCS ACAJA ACAJB 6.5 W at 5 V - 5 such boards total 32.5 W 3 board X 4.5 W per board 13.5 V 5 boards X 1 UW per board 50 W 5 boards X 3.5 W per board 17.5 W Total 113.5 W
Hardware addressing :
Every station on token ring has a unique hardware address. The address is programmed by setting of a pair of dip switches provided on a daughter board AARCH at the back panel of the station as follows. OFF = 1 ON = O
APSM (LSB T Y C P DOCP TYOR
A C
APSM (MSB)U
T E
For 65% convertor efficiency consumption = 173.5 --------.65 Add 4 W at 48 V for ACALA Thus total = 179 W APSM Physical address of SM (in a bits) DOCP Domain of coupler TYCP Type of coupler TYOR Type of organ
= 175 W at 48 V 6 . 5 W a
t 5 V NOTE : Refer commissioning guide document for switch positions and value of the various fields set in the Switch. -
5 s u c h b o a r d s t o t a l 3 2 . 5 W A C
M C S
Chapter 5
SWITCHING MULTIPROCESSOR STATION (SMX) 1. ROLE : A SMX is one module of the entire switch matrix system with 3 independent control. The station is responsible for carrying out connection of an incoming LR time slot to an out going LR Time slot. b FUNCTIONS :Switching may effect connection between subscribers, subscriber to o etc. or there junction, junction to junction subs to tone or RF, junction to tone or RF may be a semi permanent connection for certain data link. a Besides the connection function, functions: 2. r the SMX performs following other d
1.1
Clock reception from STS and distribution. Fault and alarm processing Defence of the station etc.
X 4 . 5
LAE
SAB A
I L R A
LCXE A
M A T R I X A
LCXS A
I L R A LRSA
SAB A
W p
SAB B
LREAA
I L R B
LCXS B
M A T R I X B
LCXS B
I L R B
RSB SAB B
LAS
e r b
o a r d 1 3 .
MAS
TO CONTROL UNITS eg.MR
5 V A
LCXE Links
C
From other SMXS
SWITCH
STS
LRS (A)
A J
S A B A 5 A B B
S A B A 5 A B B
I L R A
I L R B
LRS (B)
5 b o
a The SMX is connected on 4 Mbs links (LR) to units like CSN, SMT and r SMA referred to as service peripherals. CONTROL On the other hand SMX is also connected to control units over UNITS d MAS token rings which provide particulars of connections to be effected. s The Network synchronised clock from STS is supplied to SMX. Switching is done on the strobe of clock and also this clock is supplied to the service peripherals X i.e. CSN, SMT & SMA on LR links. The inlets from other SMXs also make an entry to SMX as LCXE links. 1 BASIC FEATURES OF SMX U The switch in OCB-283 is a pure time switch. Ultimate capacity of switch matrix is 2048 X 2048 LR. W Modularity 256 X 256 LR in 8 SMX Module 64 X 64 LR matrix by adding PCBs Each module of SMX is p duplicated and Switching takes place in either branch parallaly . e issuing from 2 Mbps access links LA CSN, SMT or SMA are converted into 4 Mbps LR links by a SAB r interface card. The SAB is a functional component of SMX but the hardware is put in service peripherals. Branch is selected by receiving SAB functional unit. b - Switching is done at 16 MBps rate but reception & o issue of LR links is at 4 Mbps rate. a CONCEPT OF PURE TIME SWITCH A REMINDER r
3.
4.
A pure time switch consists of a speech buffer a control buffer and d a Read/Write controller. Digital Samples of data carried by TS of LRs are written sequentially in consecutive locations of the speech memory. 5 0
W A C The control buffer contains the addresses of a location of speech A memory to be read at a defined TS i.e. write operation on speech memory is sequential while J read operation is controlled, by the contents of control memory B The contents of the control memory are based on the connection particulars decided by the MR by going through the call processing sequence. Based on above mentioned logics, the functional architecture of 5 a switch shall be as shown in diagram below:
SPECH BUFFER LRE 4 Sl to parallel conversion
20 1<
b
LRS o Parallel to serial conversion
a r d s X
CONTROL MEMORY
MATRIX Controller
4
20
4
20
Here speech and control memory constitutes the switch matrix. 3 The digital samples of T/S of LRE are as it is reproduced in the speech memory e.g. location 4 . then location contains the speech sample of TS 4. If TS 4 is to be connected to T/S 20 4 of control memory should point to address of location 20 of speech 5 memory and location 20 of control memory should point to address of location 4 of speech memory as shown. These contents are written by matrix controller by getting the connection particulars from MR. W
5.1
p A SMX station uses the concept of digital pure time switch as discussed above e and further provides a coupling to the MAS token ring for communication with control units for obtaining connection particulars. Also the station r should have interface for receiving time links and the inlets from other SMX station for realising full availability of inlets in each station. Accordingly functional diagram shall be as shown below : b o a r d 1 7
. 5 W T
LCXE
Fig.
S A B A S A B B
4 Mb Paral-lel
o a l 1 1 3 . 5
ILR
Control
BTT
MATRIX COUPLER
Fig. 3 Functional diagram of SMX 5.2 PHYSICAL IMPLEMENTATION AND PURPOSE OF PCBs OF SMX . C
W A
U of RCMT The MATRIX is constituted and RCSM boards. T One RCMT board is capable of providing E a square matrix of 64 LRs i.e. 64 X 64 Switchings are possible. Thus for one SMX module 4 RCMTs are required to cater to 256 LRs. Since we need to have the capability of switching any incoming LR time slot to any O/G LR T/S the LRs of other SMXs as LCXE links are 6 module 256 multipled by providing RCMT boards. Thus in a SMX LRs are connected through LR interface (ILR) to 4 RCMT boards and . there can be a max of 28 more RCMT boards provided in each SMX 5 to receive inlet LCXE links from other (max 7) SMXs. Whereas number of outlets derivable are 256 only. Each SMX module therefore can be said to serve a max ,of 2048 inlets and 256 unique outlets. Of W SMX will 256 LRE course the size of the rectangular matrix supported in each depend upon actual number of LRs and hence number of SMXs CSN SAB SMT equipped. MAX 256 X 7 LCXE LINKS or a Multiplied from other MAX 7 SMXs SMA 5.2.1 The connection of RCMTs/RCSM in a SMX branch are as shown below: t 16 RCID
Serial to parallel
256 LCXE
4 RCMT
5
28 RCMTs
V
256 LRS to SAB of receiving unit
5 s u Fig. 4 Connection of RCMTs/RCSM in SMX c h As shown in diagram max no of RCMT boards required is (4 + 28) i.e. 32, of which 4 belong to SMX itself catering to 256 inlets of its own and other 28 are referred to as receptors for the I/C (2048-256) LRs served by other SMXs. No of SMXs required b will be as per traffic & no. of connector units. o Writing takes place on all RCMT boards corresponding to inlet in all SMXs a and buffered in a RCSM boards corresponding to outlet in particular SMX to which the outlet belongs. r d The ultimate capacity of switch 2048 X 2048 is realised in two group of 1024 X 1024. s The RCSM boards are provided for buffering the read output of RCMT (at 16 MHz), but set out at 4 MBPs in 4 groups of 16 LCSM links. The finalt readout is at 4 Mbps rate from RCSM board giving 64 LCXS links at 4 MBps . One RCSM can o accommodate 64 LRs and hence 4 RCSMs are required. However for more than 1024 LR capacity each SMX t module needs extension shelf to accommodate RCMT boards. Inlets corresponding to a the RCMTs in extension shelf when required to be switched to a outlet of SMX, the buffering is done in RCSM provided in extension shelf only i.e. max number of l RCSM required for ultimate capacity of 2048 X 2048 will be 8 per SMX. 5.2.2 The interface for LRs (ILR) is differential interface implemented by PCB 3 RCID. Each RCID is capable of supporting 2 GLRs (or 16 LRs) and hence one SMX will have 16 2 RCID boards to cater to the 256 LRs. The RCID boards receive the LREs in serial format and convert the same to parallel 4 Mbps format known as . LCXE links. Similarly the output from RCSM board is in parallel format (LCXS) Parallel to serial 5 convertion again taken place in appropriate RCIDs board and LR s is derived. Read/write operations on the MATRIX System (Speech & control memory) is done W by a MATRIX coupler implemented by a PCB RCMP. The RCMP carries out read and write operations at strobe of Network clock, which it receives in triplicate A from STS. RCMP board has a majority logic decision interface for choosing the best clock C out of the three received. M Read and write controls are independently carried out in the main and C shelves. extension shelves. For this RCMP is provided both in main & extension S The speech buffer is duplicated & Read & write are done in alternate frames. 5.2.4 SAB function is performed by different PCBs in CSN, SMT & SMA e.g. TCBTL (CSN) ICIDS (SMT 2 G) & ICID (SMA). This hardware units are a part of SMX but physically mounted in CSN, SMT or SMA.
5.2.3
b o a 6.0 What is SAB Function & How implemented r d selection of a SAB stands for selection & amplification of branch. The logic used for branch is :(1) Sending unit calculates the parity in the data sent and sends the parity to receiving unit. Receiving SAB also calculates parity on data received and X branch A and compares with parity received. If there is difference in parity or branch B then the one which matches with sent parity is chosen. 4 out to check A bit by bit comparison of data on branch A & B is carried whether there is any change because this is likely even with parity . tallying. There should be a method to send parity bit from source to destination or an 5 error indication either in parity received on bit by bit Comparision made. For this purpose three additional bits are required. Actually 8 bits are added in every time slot making 16 bits per slot i.e. the rate on LR link W becomes 4 Mbps. This addition is done by SAB function.
CSN SMT OR SMA
(2)
p
2 Mbps
LA
8bits
S A B
I L R
MATRIX e
Fig. 5 Position in SMX b of switch. There are two types of checks on connections in the two branches o is made by (1) Permanent Check : This is done whenever a connection calculating the parity and comparing the same with sentaparity and also by making a bit by bit comparison of samples coming on two r branches. d Multiframe check : This type of check is initiated by GX when SAB defects a fault of switching and conveys the same to GX via COM.
(2)
In Permanent mode:
Bit Bit 13 14 is O (Zero) Value is Zero on O/P and I/P line and is 1 or1 input line if an error is detected in comparison. 3 . 5
is use for marking multiframe of 32 frames. This bit will be 31 times 1 and 32 nd time O. Thus a change from 1 to O marks V end of multiframe. on output lines it is control bit for multiframe the status bit of the SAB. A line is and or input C A J
Bit
14
5 b reception of One bit of CRC every frame and after 32 frames o 32 bit CRC is received. a Functions of various PCBs in SMX. r Bit 15 d s X 1 U W p e r b o a r d 5 0 W A C A J B
5 b o
7.0
R C I D
R
C I D
R CI D
R CI D
r b o 0 16 LCSM
64LCXS
RCMT Board
FIG. 6
64
16 LCSM d 2 64 enter the 4 RCID boards in groups of 16 and 64 LCXE are 64multiplexed X 64 64 X 64 derived . Four LCXE link at 4 Mbs/parallel are to16derive a 16 Mbps LCSM 3 parallel link and at 16 Mbps the contents of Time slots are written sequentially in the speech memory of RCMT board. After switching in RCMT 64 LCSM links are received in four groups. The output is buffered in RCSM boards from RCSM 64 LCXS links are read out at 4 Mbps and by parallel to serial conversion LXE 1 again at the LXSto the output GLRs LRs RCID board corresponding links are obtained. 7 As shown in the diagram for 64 LRs only one chip of 64 X 64 .matrix out of 4 in the board is used. Others are used when the size of matrix grows. This is 5 discussed case of 128 X 128 LR Matric (refer figure)
R C S links M
64 LCXE
RCMT 0
16 16 16 16 16
to RCSM 0
T o t
128 LCSM
l 1 1
16 16 16 RCMT 1
to RCSM 1
3 . 5 W
A C
64 LCXE
T For 128 X 128 two RCMT boards will be required 64 LCXE will enter E RCMT No. 1 & another 64 LCXE in RCMT No. 2 . By interaid connector the multiplexed LCXE link (L X S) 1t 16 Mbps from one RCMT is connected the 64 X 64 LR matrix chips in the second column n of second RCMT. Switching among the 128 LRs are thus possible in the 4 chips of 64 X 64 LR in first RCMT card only as shown. 2 nd card 6 these in to 16 in this case is used only to receive the 64 LCXE links and multiplexing Mbps LSX link. The interaid is done by a front connector between . two adjacent RCMT board. 5
FIG. 7
Case 64 LCXEof
RCMT0 is extended 4 RCMT cards are used and each pair of The above concept O Wrealised from cards is connected in such a way that 2 X 128 X 256 LR connection is two pairs of RCMT. 64
64 M
RCMT 2
The same principal isLCSM further extended to realise bigger switch a sizes.
64 LCSM M
LCSM
t
64 LCSM M
V RCSM boards
To 4
64 LCSM
64 LCSM M 64 LCSM M 5
64 LCSM M
64 LCXE
64 LCXE
s u
Fig. 8
h b o a r d s t o t a l 3 2 . 5 W A C M C S
3 b o a r d
X 4 . Standard Racks
XA00
ILR (A) ILR (B) SM X A1
5
XA01
SMX A1 SMX A2
ILR (A1) ILR (A2) ILR (A)
SMX B1
For upto 1024 LR Each rack will have 2 SMXs of one branch So two racks required for two branches for upto 512 LR and 4 racks will be required for more than 512 LRs Fig. 9
p SMX (Ext.) For beyond 102 4 LRs e Requires extension shelves r to accommodate additional RCMTs i.e.bbeyond 16 RCMTs o a r d
ILR (B)
Maximum No of rack required for ultimate capacity i.e. all 8 SMXs will be four per branch.. 8. 8.1 Function of PCBs of SMX 1
RCMP:
3 in extension There can be two RCMP boards in a SMX, viz one in min. shelf and other shelf. The min, shelf RCMP carries out following function. . (a) (b) (c) (d) Performs majority logic decision on BTT from STS. 5 Clock distribution to RCID boards, main switch and extension with BSM bus. Interface with BSM bus. Serial transmission and reception of information with differential interface V (RCID), main and extension switch. A (e) Generator of alarms towards ACALA board The extension shelf RCMP carries out : C (a) Ensures retransmission to the boards of its shelf, the serial control link A clock and signals received from main RCMP board J and (b) ensures retransmission tot he main RCMP board of the serial A link signals received from the boards of its shelf. 5 b o a r
8.2RCID board :
(a) (b) (c) (d) (e) Provides interface between connection units and switch matrix. Connection security. Help in fault location for locavar.. Serial to parallel and parallel to serial conversion. Clock reception and distribution.
s X
8.3RCMT board :
1 (a) Time switching of 128 LCXE links to yield 128 LCSM links. (64 LCXE belonging to itself and 64 received from counterpart through inter aid). U (b) RCMT consists of two 128 X 64 buffer memory blocks. One of the blocks switches LCXE (0 to 127) lines towards LCSM (0/63) lines and other switches LCXE W (0 to 127) lines towards LCSM (64 to 127) lines.
8.4RCMS board :
(a) (b)
p Receives 64 LCSM links at 4 Mbps in four sets of 16. e of different Sending of 64 LCXS differentially at 4 Mbps to boards interface with sifting at high impedance control for configuration above r 1024 LR (c) Sending of time signals accompanying the LCXS lines to the differential interface boards if installed in the main switch. b o a r d 5 0 W A C A J B 5 b o a r d
X 3
. boards have their usual function like coupling to token ring and secondary processing of converter and time base related alarms respectively. 5 W p e
R R r R R R C I 1 C C I 1 1 4 3 8 I 1 I 1 I 1 C O N V E C C C C I I 0 0 19 1 8 R C M D D D
9.
R C I D 0
R C I D 0
R R R R R C C C C C I D 0 I I I 0 I 0 D D 0 0
R R R R C C C C I 0 I I I 0
R I 1
R R R R C C I 1 1 D D I 1 I I 1
R R R R R R R R R R R C C C C C C C C C I I I 0 I I 0 0 0 4 9 8 I I I I D 0 D D D D D D D D 0 0 0 0 0 0 2 03 9 9 0 4 R R C M T
(1)
O N V E 0 R0 0 5 T
C C C D D
D D D
D D 0 0
D D
D b D D D
1 0 1 11 22 0 4 8 2
2 43 5 3 6 3 7 4 8 4 9 5 0 5 1 5 26 36 47 5 7 7 0 0 01 3 6 0 4 5 2 6 0 4 8 2 6 0 3 7 8 8 2 6 A C A J R R R R R R R R R R C C C C C C T C C R C T R C T T R
1 1 7 1 1 5 6 8 0 0 1 1 2 6 0 4 R C R C T R C T
10 11 1 2 1 3 2 2 3 3 a 2 6 0 4
o r
1 5 1 1R 4 4 5 2 6 1 T C O N V E
(2)
C O N V E 0 R0 0 0 0 T6 A C A L 0 A 0 9 A C A J R C M T R C M T C C P T C C M
M M M S M M M M S M M M M S T M T T T M T
M M T
M S
0 B0 A 0 1 2 2 6 0 4
0 0 00 00 0 0 0 00 01 01 11 0 0 0 00 00 00 01 0 1 2 3 3 4 4 5 6 6 7 7 8 8 9 0 0 1 8 2 08 1 4 0 8 8 4 9 0 2 6 3 2 1 60 2 1 8 4 4 5 0 2 4 28
11 01 0 1 0 1 11 1 2 2 3 3 366 2 7 8 3 248
1 5
1R 4 6T
1
C O A C A L A R R R R R R C M M M S P T 0 0 0 1 0 0 R R R R R R C C T 1 1 T 1 4 R R C T 0 5 C R C R R C T 1 3 C T 0 6 R C T 0 7 R C M 0 3 R C M T 1 4 R C M T 1 5
7 . 5 W
1 4 6
C O N V E R T
(3)
N V E R T
C C C C C C C C C M M M M S T 0 2 T 0 3 0 0 8 9 0 1 T M T T M T 1 0
M M M M
S M M M M T 0 2 1 2
M S
T
0 0 0 0 0 6 0 0 9 0 2 8 0 3 2 0 3 8 0 4 4 0 4 8 0 5 4 0 6 0 0 6 6 0 7 2 0 7 6 0 8 2 0 8 8 0 9 4 1 0 0 1 0 4 1 0 8 1 1 6 1 2 2 1 2 8 1 3 2 1 3 8
o t a l 1 1 3 . 5
Wiring of GLRs and LCXE as viewed from Rear of rack T PARTIAL REAR VIEW OF A SMX RACK (indicating wiring for GLRs & LCXE Cables)
Y C P
Wiring of GLRs and LCXE as viewed from Rear of rack PARTIAL REAR VIEW OF A SMX RACK (indicating wiring for GLRs & LCXE Cables)
30 31
2 3
0 1 ILR SHELF
L C X E
L C X S
L C X E
L C X S
L C X E
L C X S
L C X E
L C X S
L C X E
L C X S
L C X E
SMX SHELF
RCM T9
RCM T8
RCM T0
RCM T1
RCM T0
Fig. 11 : PARTIAL REAR VIEW OF A SMX RACK (Indicating wiring for GLRs & LCXE Cables)
2.
SMA Environment
8 LR
SMA
1 GLR
SMX
The SMA is connected to the switch by one GLR (i.e. 8 LR links), On the other side it is connected to MAS token ring over which it communicates with control units. A MAL ring collects converter alarms of the station. The time base is obtained by the SMA from STS via the switch over GLR cable.
3.
Coupler CSMP Coupler signalling Multiprotocol for CCS#7 or V 5.2 signalling implemented by ACHIL 2 & ACHIL 3 PCBs. The functional architecture is indicated diagramatically below:MAS BL
C M P C T S V
P U P
C M C S M P
P U S
C L O C K
BSM
C T S VCouplers Max 12
4. 4.1
One ICTSH board can implement 8 such facilities. (b) Tone generator function : (GT) This function is for generation of tones like dial tone, busy tone etc. The frequencies may be single or combination of one two three & four frequencies with different pauses. One ICTSH board generates 32 voice frequency signals. (c) Frequency reception & generation function (RGF). This function takes care of generation and reception of dual frequencies used for R2 MF signalling One ICTSH board can implement 8 RGF terminals and one ICTSS board 16 RGF terminals. (d) Modulation detection function: This function carries out supervision of modulation on recorded announcement time slots. This is processed as a particular RGF code defined.
Sending flag, CRC Calculation and O insertion Elimination of O inserted, flag framing, CRC verification.
CCITT 7 direction Send Automatic sending of filler frames Receive Automatic elimination of filter frames which do not carry useful information.
4.3
ICHOR Board
This board ensures generation of accurate exchange clock required for correctly labelling various messages flowing between various units.
4.4
ACAJA/ACAJB card:
This board provides coupling of SMA station with token ring over which communications is made with control units. Following type of informations are exchanged:CAS R2 MF signalling Status messages and CCS# 7 related messages
4.5
Distribution of 8 access links (LA) Case : 1 LA 1 LA 2 LA 3 LA 4 LA 5 LA 6 LA 7 LA 8 Case : 2 SMA 1 or SMA 2 with clock, GT, RGF and ACHIL function. CCF GT ACHIL ACHIL 2 RGFS 2 RGFS 2 RGFS 1 RGF
LA 1 & LA 2 to Two CCF (ICTSH) LA 3 & LA 4 TO Two ACHIL LA 5, LA 6, LA 7, LA 8 each to pair of RGFs (Total 8 RGFs) Total 12 Couplers SMA Rack card layout:
A E 5 V 4 0 1 4 A C A L A 2 3 A C A J B 2 9 A C A J A 3 3 A C U T R 4 1 A C M C S 4 7 I C T S H 5 3 I C T S H 5 9 A C H I L 2 6 5 A C H I L 2 7 1 I C T S H 7 7 I C T S H 8 1 I C T S H 8 5 I C T S H 8 9 I C T S H 9 3 I C T S H 9 7 I C T S H 10 1 I C T S H 10 5 A C U T R 11 3 I C I D A 11 9 I C I D B 12 5 A E 5 V 40 142
ACUTR 5 AB PUP ICTSH for CCF ICTSH for GT in SMA 1 & SMA 2 and for CCF in other SMA Slot 71, 77, 81, 85, 89, 93, 97, 101 ICTSH or ICTSS for RGF Slot 105 either ICTSH/ICTSS for RGF or ICHOR (SMA 1 and SMA 2) Slot 119 & 125 are ICIDs for SABA & SABB function TYPE OFRACKS MOUNTING SMA : UC UE SMC SMC SMA SMT SMA SMT SMA SMA & MA SMA
41 53 59
SOFTWARE ARCHITECTURE
Following Software machines in different combination are loaded in SMA depending upon requirement: MLSM (P) MLSM (ACHIL) MLSM (S) + ML PU/PE MLSM (S) + MLETA in in in in CMP ACHIL board (for level 2 function of CCS # 7) PUP for CCS # 7 protocol management PUS for ETA function
Firmware for GT, CCF, RGF, etc. or various CTSV (ICTSH or ICTSS) depending upon Slot locations as indicated earlier.
2.
Function of SMT:
(i) Provide terminations of a maximum of 128 PCM CSND . (ii) Carrying out URM (Multiplex connection unit function) consisting of : (a) (b) (iii) HDB 3/ Binary code conversion. Injection and extraction of CAS on time slot 16 and making over to another functional unit called CLTH for processing.
Transforming the intelligence in PCM TS to LR T/S for switching to destinations TS and transforming the switched LR time slot into PCM TS.
3.
Can support higher order PCM multiplexes e.g. 34 M bit /S. Can support ISDN PRA (30 B + D) links. Reduction of load on MIS/MAS by introducing decentralised processes in a software way.
4.
SMT Environment :
SMT on one end receives the external PCM which are HDB 3 coded and after decoding in Binary extends LR links to Switch matrix. For the purpose of
communication with the control stations SMT is connected to MAS token ring. For reliability reasons SMT logic part is duplicated and there is a link for inter communication between two logic parts. The timing links for synchronisation are also derived from some dedicated PCM terminals of SMT. Accordingly the environment of SMT shall be as shown diagramatically below:
Synch PCM 2 Mb HDB 3 Coded PCM from and to circuits CSND or CSED Link LISM to other logic (Receive)
STS
MAL to
Fig. 1
SMT Environment
5.
6.
BETP 1 (A)
C M P & V B
M A S
S M T A
BETP 2 (A)
E T U 1
E E E T T T U U U 2 3 4
E E T T U U 25 26 64 LA
E T U 27
E T U 28
4X2 64 PCM
Br.. B S GLR (8) Br. A A B To MCX GLR (8) Br. A S Br. AB
ILSM 64 LA
C M P & V B
S M T B
BETP 1 (A) E E T T U U 5 6 E T U 7 E T U 8 E E T T U U 29 30 E T U 31 E T U 32
4X2 64 PCM
BETP 2 (B)
(ETU) ET 1 ET 2 ET 3 ET 4 MULTIPLEX : ETP ETP ETP ETP EXCHANGE TERMINAL UNIT (ETU) SUPPORTED BY ICTRQ BOARD EACH ETU SUPPORTS 4 ET (PCM) ALONG WITH CORRESPONDING PROCESSOR (ETP) SAB INTERFACE SUPPORTED BY ICIDS BOARD EACH ICIDS SUPPORTS 2 GLRS CMP A&B, LOGICS AND ETU ALONGWITH SAB INTERFACE ALL EQUIPPED IN TWO SHELVES REFD. TO AS SMTA SMTB
CONTROLL LOGIC BETP BUS A&B LAPD PROTOCOL ICTSM BOARD 750 Kb/S (DUPLICATED) INTERCHANGE WITH CONTROL UNITS OVER MAS THROUGH PRINCIPAL COUPLER AND CONTAINS A COMMN. MEMORY INTER COMMON BTN. LOGICS ON LISM LINK IN HDLC (LAPD at 250 Kbls)
-82-
As already mentioned before, the SMT consists of three parts viz. logic part (duplicate) PCM terminator part (not duplicate) and the SAB part. Interconnection of the three components are indicated in the diagram. 6.1 The PCM part is implemented on a functional unit known as ETU (Exchange termination unit) which consists of 4 ET (exchange termination for 2 Mb/s PCM) and 4 ETP i.e. ET processor. Partial processing of PCM & CAS signals is carried out by ETP .
6.2
The logic part is duplicated which on one side is connected to ETU by BETP bus and on the other side is connected on MAS ring via coupler for communication with control units. There are signalling links, Switch over links and PRS (Pilot/Reserve) links between the two parts of logic. The information on the PCM Time Slots are subject to a code conversion i.e. HDB 3 to binary for incoming junction and Binary to HDB 3 for O/G junctions at the ETU level. The binary coded access links (LA) are connected to SAB unit which issue a 16 bit LR link toward the Switch matrix.
BETP 1 MAS CM P PUP BL MC BSM NB: PUP is optional CLTH means HDLC Transmission Link Coupler. (Fig. 3)
CLTH 1
BETP 2
CLTH2
To ETU
6.3
2 Mb/S
from & to SMXB There is an inter aid link between branch A and branch B SAB function card s for 8 LRE + 8 LR + a the purpose of receiving the sample of TS on counter part branch so that comparision may be possible.
timing
SA B A
SA B B
2 GLR (E & S)
7.
7.1
Functions of the hardware components of SMT : ETU : The ETU i.e. exchange termination unit is implemented on a PCB ICTRQ
and this consists of 4 ET (exchange termination for PCM) and 4 ETP (exchange termination processor) This card carries out following functions: (a) (b) HDB3 Binary conversion for 120 PCM s Looping of PCM viz. external, internal, both side and through connection. This is done by a connector (4 connectors are provided per ICTRQ PCB).
There is a arrow mark on the connector and type of loop depends on the direction of arrow as shown below: (Fig. 5)
External loop
Through Loop or both connector exchange and external side Fig. 5 Hardware link for PCM looping
(c)
Synchronisation on local call The time slot contents are received and buffered at the clock rate coming from other station but are read and switched at local clock rate. The local clock itself is synchronised with the network by extracting clock from some defined s PCM .
(d)
CRC 4 : This cyclic redundancy check is an optional feature and is performed for s measuring the transmission quality of 2 Mb/s PCM . Alarm Processing: The ICTRQ board has a alarm processing sub function for handling following type of alarms:F I i.e. fault indication alarm Failure of clock by code convertor part Frame loss Faulty ICIDS etc.
(e)
Alarm conditions are conveyed to CLTH for onward relaying to CMP and then to central defence i.e. SMM for editing and message output on appropriate terminal. (f) Processing of positioning messages sent by CLTH. The position messages are:link. command) (g) PCM LA Switching For CAS looping I/C trunk on O/G trunk Trunk assignment control Micro controller reset control etc. etc. Loop on TS 0 for LA continuity check (refer GLRCT Disabling recognition of signalling transition on PCM
There is no cross connection between PCM T/S and LA T/S. These are one is to one. A 8 bit to 16 bit conversion is also done at ICTRQ card level so as to make use of DACS, unlike 8 bit/16 bit conversion by SAB in other cases. All T/S except TS 16 and TS 0 are switched through between PCM end to LA end. (h) Signal processing: In case of CAS TS 16 is injected (for O/G calls) and extracted for I/C calls. The signalling information for I/C calls is made over to CLTH for forwarding to MR for handling the call. For O/G calls signalling conditions are conveyed by MR to CLTH via CMP of SMT. CLTH in turn makes it over to ICTRQ which injects appropriate bits in TS 16 for onward transmission over PCM. For CCS#7 signalling the ICTRQ card remains transparent. The ICTRQ also processes the CAS and semaphore signalling from CSED of E-10 B. (i) Synchronisation link for STS There are defined ETU ET for deriving timing clock from receive part of PCM to drive the synchroniser part of STS. BETP bus management: BETP is a full duplex point to multipoint bus connecting one CLTH to 64 ETP. In order to ensure communication between only one ETP and one CLTH a contention system is designed. A ET wanting to send a message has to claim the BETP bus acquire this and then send the message.
(j)
7.2
Processing System :
This consists of principle coupler implemented by ACAJA 4/ACAJB 4 or ACAJA 5/ACAJB 5, CLTH function implemented by two ICTSM boards Common Memory implemented by ACMGS board. are already covered
CLTH (ISTSM)
CONFLICT RESOLVING BUS PCLTH 68030
C2
CMP
ACAJA &B
MC
PCLTH 68030
BETP
SERVES BANK OF ETPS WITH MULTIDROP MULTILAP DISREGARDING EACH OTHER LISM
TRANSMISSION ARCHITECTURE
CMP RECEIVES MESSAGE OVER MAS AND ACCORDING TO DESTINATION TRANSFERS IT TO MC. PROCESSOR PCLTH EXTRACTS THE MESSAGE FROM MC AND LOADS IN ITS PRIVATE MEMORY. PCLTH CHECKS DEST ADDRESS AND TRANSFERS MESSAGE TO PHDLC PHDLC THEN CHECKS THE DESTINATION, IF IT IS ETU THEN COLLECTS FROM BUFFER AND TRANSFERS TO ETU IN LAPD PROTOCOL. ETP INJECTS SIGNALLING (CAS) ON TS 16 OF APPROPRIATE FRAME
NOTE : THE EXCHANGE CAN BE EFFECTED ON CLTH COUNTERPART ON LISM LINK e.g. a MODIFICATION COMMAND LIKE ETUMO.
-88-
* SYNCH MUL. FR. * SIGN. INJ/EXTRN. * DETN/CONFN OF STATUS TRANSITION * TRANSFER OF DACS SIG ON LA
LRE MTRB TRANSCODING MSJB RESYNCH SIGNAL PROCESSING SAB INTER -FACE LRS OSCILLATOR
:: :: ::
DT
(ET PART)
BUS
128 Kb REFROM
BETPEDA
128 Kb RAM
H D L C
I C T S M
L L T H
LISM
CONT. CONTAINS
3 HDLC CONTROLLER 3 TIMER (WATCHDOG/PROGMBL REAL TIME INTRPT. INTERRUPT CONTROLER PORTS/ADD DECODING
H D L C
I C T S M
C L T H
GENERATES TIMER FOR MTRB (ETP PART) REC. TIME SIG FROM SAB REL TIME SIG FAB BETP FROM CLTH BLOCKING FUNCTION &/REINSTATEMENT EXTL PCM TIMER FROM REC PCM
TO RECOGNISE BLOCKING/REINST FRAME AND ACCORDINGLY BLOCK OR REINSTATE TR AMP AND RESET
MANAGEMENT OF CONTAINMENT BUS DETN. OF FREE STATUS ON CONT. BUS PUTS A CLAIM TO ACQUIRE BETP BUS ON RECEIPT RES (FROM HDLC (CONTLR) ON ACQUIRING BUS ENABLES BETPRO AMPLIFIER SENDS A CTS SIG. TO HDLC CONTRLR TO ENABLE TRANSMISSION OF HDLC FRAME.
WHEN A ET WANTS TO COMMUNICATE WITH LOGIC CORRESPONDING ETP FIRST LOOKS FOR P/R STATUS, THEN LOOKS FOR STATUS ON CONFLICT RESOLVING BUS. IF BUS IS FREE THEN ACQUIRES IT AND SENDS THE HDLC FRAME.
This board is organised around a 68030 CLTH microprocessor (PCLTH) having a 4 Mb DRAM and BSM interface. There is a second microprocessor in this board known as HDLC microprocessor for supporting ETP interfacing over BETP bus. Messages related to signalling from MR are received by PCLTH through common memory. PCLTH after checking address of destination transfer this to PHDLC. PHDLC checks the address. If the address is for a ETU then transfers the message in HDLC format to the ETU. The other functions supported by CLTH are:Inter SMe dialogue : For this the first ICTSM board is linked to its counterpart by a HDLC link known as LISM link. SMe switch over management device implemented only on the first ICTSM.
Transmission architecture in CLTH is shown diagrammatically in Fig. 6. Fig. 7 explains the communication between CLTH & ETP
MLMR
MAS
CMP
MLURM (P)
MLURM (S)
IN LAPD
NB : ACCORDING TO TTC TABLES THE MLURM (S) DECIDES THE NATURE OF MESSAGE e.g. OFF/ON HOOK OR DIGITS etc.
(information related to tele call set up on the basis of int/ext. past events call status at any point of time is in TTC and transactions are decided accordingly) JOB OF MLURM (S)
FIG. 8
7.3
NOTE: The ICIDS boards are entirely independent of the ACTIVE/STANDBY concept, which remains an operating mode affecting only the control system, if adopted. .
8.
PCM A C A J B
A
C A J A
I
C T S M
I C T S BSM M
BETP Buses
ICTRQ I
LA C I D LR
to SMX
Fig. 9
9.
10.
Software Organisation :
Just like other stations the application ML are supported on a basic software (Hypervisor) and on the system software. The hypervisor allows cohabitation of more than one ML on same agent, and carries out following: Communication within the station Management of time lags
s Processor sharing by different ML .
Supervisor in each agent takes care of elemental tasks. The applications are :(i) MLSM (P) loaded in CMP. This carries out positioning, defence, audit security and communication. (ii) (iii) MLSM (GETU) loaded in CMP This carries out the management of ETU MLURM (P) - Main component of MLURM loaded in CMP. This carrier out Communication with control units
1. -
Context Management Timing Management Handling UR/TS/EQ/LR positioning CSED positioning] UR-PCM extension Observation Initialisation of exchange date Traffic migration inch Regeneration MLURM (S) secondary component loaded on CLTH carrying out Processing of TTC tables CCS#7 processing Inch of PRS configuration Switch over supervision Regeneration, alarm processing PCM & CRC4.
CMP (ACAJB/ACAJA)
ML (GETU) MLURM (P) Supervisor Hypervisor CLTH 1 (ICTSM) CLTH 1 (ICTSM) HYP SUP MLSM (CLTH) MLURM (S) LAPD Comm. ETP HYP SUP MLSM (CLTH) MLURM (S) LAPD Comm. ETP CLTH 2 (ICTSM)
Chapter 8
Maintenance Multiprocessor Station (SMM) 1. 1.1 ROLE : The SMM provides the facility for carrying out operation and mtce. of
OCB units and also manage the data base.
It carries out following functions:(a) (b) (c) (d) (e) Data base management and storage (secondary) Central defence of the OCB system Supervisor of token rings Processing of various commands General initialisation of the exchange.
It provides local link for data processing devices and administration terminals. This can also be connected through X-25 link to a network management system (NMS).
2.
SMM ENVIRONMENT :
In order to carry out the function mentioned above the SMM should be accessible to exchange units on one side and to the dialogue peripherals on the other side. The SMM should also have access to mass storage devices for storage of data. Accordingly the environment shall be as indicated below Fig. 1
SMT
SMX MAS (1 to 4)
SMA
SMC 1
SMC 2 MIS
SMC
SCSI BUS
X 25 Synch V 24 links asynch links for TMN For dialogur terminal via suitable coupler
3.
HARDWARE ARCHITECTURE :
The SMM consists of two processing subsystem. One acting as pilot and other as a hot standby. Both systems share a common communication bus supporting various communication peripherals and common SCSI bus for access to mass storage devices. The two subsystems are referred to as SMMA and SMMB. The overall, hardware architecture is indicated below in (fig. 2) and Fig. (3).
Disk.
AD=0 AD=1 (*) Disk. MTU A B AD=0 AD=1 (*) Disk. Stream A B SCSCI bus AD = 0 A C A BS C G B S G A C A J B A C AJ A AD = 0
MIS A B
A C BS G Disk.
A C BS G
MIS B A
A C A J A
A C AJ B
A C BS G
XBUS
XBUS
A C F T D
U T
A C M G S
U T
A C M G S
A C C S G
A C C S G
U T
A C M G S
U T
A C M G S
A CF T D
Local bus
Local bus
Local bus
Local bus
From/to
(380 Mb) or ACDDG1 (1.2 Gb) (525 Mb) or ACSTG1 (1.2 Gb) or ACUTG 2
to SMM A
to SMM B
A B
A C J 6 4
A C T U J
A C R A L 2
MAL
links J 64 (4)
Async V 24 (8)
A C A L A 16 A1
A C A L A
A C A L A
1 or 2
1 to 4 1 or 6
1 to 2
- Lime Couplers -
Fig. 3
4.
PROCESSING SYSTEM :
The processing system comprises following functional component connected on a common bus referred to as the X-bus.
(a)
(b)
(c)
(d)
(e)
9 Console functions:
The console function consists of some physical keys and lamps on the ACCSG board edge strip and the PCB. These are : Switch V 1 : middle position normal lower position for automatic RTOS startup Switch V 2 : up position temporary reset middle position is normal lower position is for permanent reset Switch I 1 : up position for manual start & down position for automatic start
Switch I2 : relevant only when I 1 is down i.e. if. It is up with I1 down and a reset is given by V2 up then OM & exchange both will initialise and If I2 is down with I1 down and reset is given then only OM will initialise with through connection to exchange. lamp D 1 when lit indicates pilot system D 2 when lit indicates RTOS loaded in system.
It addition to these keys there are two more physical keys V 3 and V 4 on a DACLE mini board placed behind ACCSG board in the back panel. Switch V 3 up position is the idle position middle position (stable) defining sub system always master. lower position (instable) indicating sub system is master. Switch V 4 up position is idle indicates manufacture absent mid position (stable) and lower position (instable) indicate manufacturer present.
6.
LOGICAL KEYS
Beside the physical keys there are a set of 48 logical keys. 16 keys are dedicated to RTOS, 16 keys are divided between RTOS and TMNK, sixteen keys are dedicated to OM. The logical keys can be set in assisted mode (V 1 down) from console and in RTOS environment by MMC from WAM. Normal setting of these keys is Zero but depending upon requirement. These can be set. Some of the key settings are defence of the system. Only with the V 3 switch set to manufacturer present state the dangerous keys can be set.
7.
LINE COUPLERS:
Besides the X-Bus components there are different line couplers for different type of peripherals. The peripherals used are TTY, CV, IR & WAM type of terminals. These type of terminals are connected to asynchronous lines derived from ACTUJ boards. One ACTUJ board gives eight asynchronous lines. A max of 48 asynchronous line can be derived from a max of 6 ACTUJ board. ACTUJ board consists of an EPROM (for self test and code loading function via terminal bus) and a coupler software on ACFTD board of X-Bus supporting the terminal bus. Other peripherals could be computers at NMS connected to SMM over 64 Kbps X-25 links. These links are derived out of PCB ACJ64. One ACJ64 card can support 4 synchronous links. The ACJ 64 boards are connected or terminal bus supported by ACFTD board. In new supplies ACV11 board is being supplied which has inbuilt modem. In addition to the synchronous and asynchronous line couplers the terminal bus also supports MAL rings through line coupler ACRAL 2.
8.
Alarm processing function : Just as other stations SMM also has ACALA board
one in each system to take care of convertor alarms in main shelf and for streamer also.
9.
9.1 Hard disk (ACDDG 2) This PCB is an integral PCB supporting a coupler to SCSI bus and disk drive. The disk capacity supplied at present is 4 Gb or 10 Gb. There are two hard disks supported on different controllers of SCSI bus and physically mounted in the SMMA and SMMB shelf. These are known as DISK A and DISK B. 9.2 Quarter inch Streamer (ACSTG 2)
<
This PCB also is an integral PCB supporting a streamer drive and its controller for SCSI bus. This is generally used for initial loading of software and also during upgrades.
9.2.1
Magnetic tape units: This is an optional item of provided, there will be two mag tape units with controllers for SCSI bus inbuilt and mounted on a separate rack. Mag tapes are used for data management and for storage and processing of bulk billing and detail billing data. At present with release R24 mag tapes are not being supplied but mag tape management functions are still in use for which one hard disk partition has been ear marked to function as a mag tape and referred to as external support LFNE = DGMA.
10.
10.1
DEFENCE :
Hardware defence : Hardware defence is provided by duplication of SMM subsystems. In case of a fault in the working system stand by is made operational and a locavar is initiated on the faulty one.
10.1.1 Software defence : A supervisor software keeps on watching the activity of other software sets loading and presence and keeps track of malfunction messages transmitted by these. In case of a major failure switch over or reinitialisation is initiated. In the event of a major problem in the pilot subsystem a post mortem dump (PMD) is generated and possibly reloading of faulty system.
11.
MEB/PEB
SMC STS
ABUTP
(SMM A)
ABLAS or ABLAS 2
SSE
Terminal bus
ABUTP
(SMM B)
ABLAS subrack (for CAO2) = SSE (infrastructure alarms/rack lamp panel controls) + announcement machine and streamer + terminal bus with 4 ACTUJ + 2 ACJ64 ABLAS2 subrack (for CAO3) = same as ABLAS excepted for terminal bus where 6 ACTUJ can be fitted (or 2 ACJ64 + 4 ACTUJ) ABUTP subrack=SMM A or B + SCSI devices (other than the steamer)
BACKPLANES The ABUTP subrack has two back planes : one AFUTP backplane connecting the boards of a processing unit with its converter and its ACALA board and two ACDDG1 (or ACDDT) locations. one AFALI backplane connecting one or two AE12V boards and an AE5V40 converter (see next section). - ABUTP SUBRACKA E 5 V 4 0 A C A L A A C A J B A C A J A A A A C C C U MU T G T G S G . A C M G S . A C U T G . A A A C C C M U M G T G S G S . . . A A A C C C B B C S S S G G G A A A A C C C C F F D D T T D D DD G G 1 1 . . A E 1 2 V A E 1 2 V . A E 5 V 4 0
AFALI
FIG. 5 SMM or SMMB SUBRACK WITH X-BUS COMPONENTS AND ONE HARD DISK (ABUTP)
In CA02 rack The ABLAS subrack has three backplanes : one AFMML2 backplane connecting the line coupler boards one AFMPS backplane connecting the ACST2 (or ACSTG1) streamer, an ACALA board marshalling the subrack alarms and where applicable the two announcement machine boards. 1 AFMMA2 backplane connecting the SSE boards. -ABLAS SUBRACKA I I A C C C C SSE A M S S L P M T A N P (2 ou 2 G 1) . . AFMPS A A C C J J 6 6 4 4 .. A A A A A A C C C C C C T T T T U UU U J J J J ... R R A A L L 2 2 . A A E E 5 5 V V 4 4 0 0
AFMMA2
AFMML2
12.
SMM Software :
Basic operating system RTOS Administrative Exploitation system (AES) Station Alarm Interface ( 1AS) Supervisor OM application software Software for TMN connection System and telephone application
RTOS
application wanting to use RTOS. The likely switch over might be initiated by either RTOS or another application.
12.7 System and Telephone application functions : 12.7.1. Telephone Application : Subs Management
Translation & routing Trunk circuit Management Charging Management Observation Management etc. 12.7.2.System Applications Comprises: Equipment Management Fault/Alarm Management Locavar Management Terminal Management Data Management
CHAPTER 9 SYNCHRONISATION AND TIME BASE STATION (STS) 1. This is the clock system of OCB-283 system which happens to be the most vital unit of any digital switching system as switching takes place at the strobe of clock. Since all modern switches not only switch voice but also picture graphics and other data, the clock needs to be synchronised with the network. This ensures almost a common clock at every switching station. The clock system in OCB-283, therefore consists of two parts i.e. synchronisation part and time base generator part. Functional Components of Clock System & their Role The clock system consists of. HIS Synchronisation system implemented by two RCHIS PCBs working on mutual exclusion. The synch interface carries and following functions. Receives MAX 4 clock inputs from PCMs commg. from other exchange (higher level) selects one of the PCMs as basic input on the basis of a defined crithrian (usually first priority goes to first PCM and so on) and tries to phase lock its clock with the clock of chosen PCM. In the event of a error detected on the chosen PCM it shifts to other PCM and gives alarm concerning the faulty PCM. It maintains reasonably high quality of clock in terms of precision of frequency irrespective of the quality of Synchronisation links. Counteracts losses of all Synchronisation links by very high stability oscillator. 2.1.5 2.2 2.2.1 2.2.2 In the event of loss of PCM Synch runs on free run mode. Triplicate time base (BTT) carries out following functions:BTT is driven by Synchroniser and distributes the clock to the switch. In the event of loss of synch. BTT is capable of maintaining stable clock over a reasonably.
2. 2.1 2.1.1
LSRX
PCM
S M T LMES
3 X 16 Supplies
STS
LH8M LSBT
ALARMS
3.
Fig. 1 Environment STS Environment : The location of STS with respect to other OCB-283 units is indicated diagramatically in Fig. 1.
The STS has following links in its environment. 3.1 Reception: 3.1.1 1 to 2 LSRX (one for each synch unit from high stability caesium clock (optional) 3.1.2 1 to 2 LCAL links (one for each synch unit) at 5 MHZ for calibration (resetting) 3.2 Transmission: 3.2.1 48 LH8 M/LSBT Each BT at the output gives 16 LH8M links at 8192 KHZ and 16 LSBT link at 8 KHZ for Synchronisation of trainees. This is given to switch matrix. 3.2.2 3.2.3 1 to 2 LMES links (1 for each synch.) for frequency measurements of synch pilot. Alarm link to the MAL.
4.
Functional Architecture:
There are two functional level of STS viz : HIS - Synchronisation level which is duplicated with priority to HIS. BTT - Triplicated time base giving clock to the entire system irrespective of whether HIS is operational or not.
5.
Hardware implementations: STS comprises two RCHIS boards and 3 RCHOR board with one converter for each RCHIS and RCHOR.. Besides these there are two ACALA board for processing of alarms in the HIS and BTT parts.
RCHIS0
4 LCM 4
1 1
RCHOR1
1 1
16
6 16
RCHOR1
3 1 1 1 6
DLSRX LCAL
RCHIS1
3 LMES
5 5/ 1
RCHOR2
16
AHIS 1 FHIS 1
DH4M
MSHIS1
NFLSR 1 NFLSRX
ACALA
ACALA
NFH 1 NFHIS0
6/
NFHIS1 NMSEXT
ALARM RING
CONVERTER 4 CONVERTER 3
HIS backpanel
pos 144 134 130 110 084 pos 064 052 040 028 019 010 001
BTT backpanel
Fig. 3
5.1 5.1.1
5.1.2
5.1.3
STS is mounted on a CA rack in the position of the second shelf. Function of hardware components of STS. RCHIS Board. Deliver a reference frequency to ensure RCHOR and BTT board Synchronisation in the presence or absence of Synch links. Monitor the quality of Synchronisation links with respect to cuts, frequency jumps frame alignment loss, Error rate etc. Allotment of next best quality PCM link for Synchronisation on failure of highest priority link and return to highest priority link or restoration of PCM. The priority order for Synchronisation is LCAL, LSRX LSRO-LSRI-LSR2-LSR3 Filtering of jitter Generate alarms related to quality of LSRX and LSR links. Generate visual signal on edge strip of RCHIS board. RCHOR board: To deliver faithfully 8.192 MHZ clock and clock synch link (DLH8M-DLSBT) Ensure clock supply inspite of failure of one RCHOR and identify the faulty board. Generate alarms related to clock and HIS> Generate visual indicator related to alarms on edge strip of RCHOR board. ACALA board: There are two ACALA board One ACALA processes the alarm related to RCHOR and its converters and second related to RCHIS and its converters.
6.
6.1
Normal synch regime: STS is synchronised with one of the several synch links like LCAL, LSRX or LSRO to LSR3. Normal independent regime In case of loss of synchronisation (i.e. missing of external synchronisation links.. The RCHIS contribute to give out the last memorised frequency and drives the RCHOR.
6.2
6.3
BTT regime : The RCHIS no longer drives the BTT but the RCHORs continue to deliver the last memorised frequency at the time of faul in RCHIS.
6.4
Free Oscillation Regime : The STS is used with the synchronisation links. The frequency delivered is that generated in free run mode of the RCHOR. The frequency stability is defined by factory calibration.
7.
7.1 7.2
AHIS 1 : HIS 1 alarm FHIS 1 : HIS 1 fault MSHIS 1 : non synchronous HIS 1
7.3 7.4
RCHOR : reception
1 DSY 8 K link and 1 DMSY link for each HIS
RCHOR : transmission
1 4096 KHz DH4M link to each HIS. DH4M : 4.096 MHz clock differential 16 8192 KHz DLH8M links and 16 DLSBT links at 8 KHz. DLH8 M : 8.192 MHz clock differential link DLSBT : time base synchronization differential link 6 alarms to an ACALA of BTT module. NFHISO : non-clock fault (i= 0 to 2). NFHISO : HISO no fault. NFHIS 1 : HIS 1 no fault NMSEXT : external synchronization present.
7.5
7.6
FIG . 4
= HIS alarm -flashing = HIS alarm by manual deactivation -steady = no HIS external synchro (free oscillation) -steady = synchronization on LSRX -steady = synchronization on LSR -flashing = synchronization on LCAL (external calibration) -momentary high position = activates sequence for reinitialization of (definition of synchronization link priorities) - middle idle position = normal operation - permanent low position = manual deactivation (conditional) - steady = rapid control status -steady/flashing = active LSRX input - steady/flashing = active LSR3 input - steady/flashing = active LSR2 input - steady/flashing = active LSR1 input - steady/flashing = active LSR0 input
configuration
V1 FHIS1 V2 FHIS0
Fig. 5
= = = = = =
clock error on RCHORO clock error on RCHOR1 clock error on RCHOR2 lack of external synchronization on BTT (free oscillation) no HIS 1 synchronization no HIS 0 synchronization
CONVERTER 4 CONVERTER 3
HIS backpanel
pos 144 134 130 110 084 pos 064 052 040 028 019 010 001
BTT backpanel
DH4M 3 1
DH4M
LSMP
DSY8K DSY8K DMSY DMSY 3 3 4 4 LCM 3 1
3 1 1 1
16
RCHIS0
RCHOR0
1
5 DSY8K DMSY 5 3 5/
1 1
6 6
1 1
RCHOR1
1
16 16
RCHIS1
LMES
RCHOR2
AHIS 1 FHIS 1
DH4M
MSHIS1
NFLSR 1 NFLSRX
ACALA
ACALA
NFH 1 NFHIS0
6/
NFHIS1 NMSEXT
ALARM RING
CONT. CONTAINS