Semiconductor

CA3094, CA3094A, CA3094B

30MHz, High Output Current Operational Transconductance Amplier (OTA)
Description
The CA3094 is a differential input power control switch/amplier with auxiliary circuit features for ease of programmability. For example, an error or unbalance signal can be amplied by the CA3094 to provide an on-off signal or proportional control output signal up to 100mA. This signal is sufcient to directly drive high current thyristors, relays, DC loads, or power transistors. The CA3094 has the generic characteristics of the CA3080 operational amplier directly coupled to an integral Darlington power transistor capable of sinking or driving currents up to 100mA. The gain of the differential input stage is proportional to the amplier bias current (IABC), permitting programmable variation of the integrated circuit sensitivity with either digital and/or analog programming signals. For example, at an IABC of 100A, a 1mV change at the input will change the output from 0 to 100A (typical). The CA3094 is intended for operation up to 24V and is especially useful for timing circuits, in automotive equipment, and in other applications where operation up to 24V is a primary design requirement (see Figures 28, 29 and 30 in Typical Applications text). The CA3094A and CA3094B are like the CA3094 but are intended for operation up to 36V and 44V, respectively (single or dual supply).

March 1997

Features
CA3094T, E, M for Operation Up to 24V CA3094AT, E, M for Operation Up to 36V CA3094BT, M for Operation Up to 44V Designed for Single or Dual Power Supply Programmable: Strobing, Gating, Squelching, AGC Capabilities Can Deliver 3W (Average) or 10W (Peak) to External Load (in Switching Mode) High Power, Single Ended Class A Amplier will Deliver Power Output of 0.6W (1.6W Device Dissipation) Total Harmonic Distortion (THD) at 0.6W in Class A Operation 1.4% (Typ)

Applications
Error Signal Detector: Temperature Control with Thermistor Sensor; Speed Control for Shunt Wound DC Motor Over Current, Over Voltage, Over Temperature Protectors Dual Tracking Power Supply with CA3085 Wide Frequency Range Oscillator Analog Timer Level Detector Alarm Systems Voltage Follower Ramp Voltage Generator High Power Comparator Ground Fault Interrupter (GFI) Circuits

Ordering Information
PART NUMBER (BRAND) CA3094T, AT, BT CA3094E, AE CA3094M, AM, BM (3094, A, B) TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 PACKAGE 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC PKG. NO. T8.C E8.3 M8.15

Pinouts
CA3094 (PDIP, SOIC) TOP VIEW
EXT. FREQUENCY COMPENSATION OR INHIBIT INPUT DIFFERENTIAL VOLTAGE INPUTS GND (V- IN DUAL SUPPLY OPERATION) SINK OUTPUT (COLLECTOR) V+ DRIVE OUTPUT (EMITTER) 2 4 5 IABC CURRENT PROGRAMMABLE INPUT (STROBE OR AGC) DIFFERENTIAL VOLTAGE INPUTS 3 4 GND (V- IN DUAL SUPPLY OPERATION) 5 IABC CURRENT PROGRAMMABLE INPUT (STROBE OR AGC) 6 EXT. FREQUENCY COMPENSATION OR INHIBIT INPUT 1

CA3094 (METAL CAN) TOP VIEW

SINK OUTPUT (COLLECTOR) 8 TAB 7 V+

1 2 3

8 7 6

DRIVE OUTPUT (EMITTER)

NOTE: Pin 4 is connected to case.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright

Harris Corporation 1997

File Number

598.5

3-1

CA3094, CA3094A, CA3094B

Absolute Maximum Ratings
Supply Voltage (Between V+ and V- Terminals) CA3094 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V CA3094A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V CA3094B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V Differential Input Voltage (Terminals 2 and 3, Note 1) . . . . . . . . . 5V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to VInput Current (Terminals 2 and 3). . . . . . . . . . . . . . . . . . . . . . 1mA Amplier Bias Current (Terminal 5). . . . . . . . . . . . . . . . . . . . . . . 2mA Average Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Peak Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA

Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 130 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A Metal Can Package . . . . . . . . . . . . . . . 175 100 Maximum Junction Temperature (Metal Can Package). . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)

Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.

NOTES: 1. Exceeding this voltage rating will not damage the device unless the peak input signal current (1mA) is also exceeded. 2. JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specications
PARAMETER INPUT PARAMETERS Input Offset Voltage

TA = 25oC for Equipment Design. Single Supply V+ = 30V, Dual Supply VSUPPLY = 15V, IABC = 100A Unless Otherwise Specied SYMBOL TEST CONDITIONS TA = 25oC TA = 0oC to 70oC Change in VIO between IABC = 100A and IABC = 5A TA = 25oC TA = 0oC to 70oC TA = 25oC TA = 0oC to 70oC IOUT = 0mA MIN TYP MAX UNITS

VIO |VIO| IIO

8 70

0.4 1 0.02 0.2 10 110 28.8 0.5 13.8 -14.5 30 4 0.4 1.4 0.68 4 15 18 1.8 1.0 2.6

5.0 7.0 8.0 0.2 0.3 0.50 0.70 12 150 -

mV mV mV A A A A mW dB V V V V MHz kHz % % V V/oC V/V n V Hz

p A Hz

Input Offset Voltage Change Input Offset Current

Input Bias Current

II

Device Dissipation Common Mode Rejection Ratio Common Mode Input Voltage Range

PD CMRR VICR

V+ = 30V (High) V- = 0V (Low) V+ = 15V V- = -15V

27 1.0 12 -14 -

Unity Gain Bandwidth Open Loop Bandwidth at -3dB Point Total Harmonic Distortion (Class A Operation) Amplifier Bias Voltage (Terminal 5 to Terminal 4) Input Offset Voltage Temperature Coefficient Power Supply Rejection 1/F Noise Voltage 1/F Noise Current Differential Input Resistance Differential Input Capacitance

fT BWOL THD

IC = 7.5mA, VCE = 15V, IABC = 500A IC = 7.5mA, VCE = 15V, IABC = 500A PD = 220mW PD = 600mW

VABC VIO/T VIO/V EN IN RI CI f = 10Hz, IABC = 50A f = 10Hz, IABC = 50A IABC = 20A f = 1MHz, V+ = 30V

0.50 -

M pF

3-2

CA3094, CA3094A, CA3094B

Electrical Specications
PARAMETER TA = 25oC for Equipment Design. Single Supply V+ = 30V, Dual Supply VSUPPLY = 15V, IABC = 100A Unless Otherwise Specied (Continued) SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OUTPUT PARAMETERS (Differential Input Voltage = 1V) Peak Output Voltage (Terminal 6) Peak Output Voltage (Terminal 6) Peak Output Voltage (Terminal 8) Peak Output Voltage (Terminal 8) With Q13 ON With Q13 OFF Positive Negative With Q13 OFF With Q13 ON Positive Negative VOM+ VOMVOM+ VOMVOM+ VOMVOM+ VOMVCE(SAT) V+ = 15V, V- = -15V, RL = 2k to 15V V+ = 30V, IC = 50mA, Terminal 6 Grounded V+ = 30V hFE CO V+ = 30V, VCE = 5V, IC = 50mA f = 1MHz, All Remaining Terminals Tied to Terminal 4 V+ = 30V, RL = 2k to 30V V+ = 15V, V- = -15V, RL = 2k to -15V V+ = 30V, RL = 2k to GND 26 11 29.95 14.95 16,000 27 0.01 12 -14.99 29.99 0.040 14.99 -14.96 0.17 2 100,000 5.5 17 0.05 -14.95 0.80 10 pF pF V V V V V V V V V A

Collector-to-Emitter Saturation Voltage (Terminal 8) Output Leakage Current (Terminal 6 to Terminal 4) Composite Small Signal Current Transfer Ratio (Beta) (Q12 and Q13) Output Capacitance Terminal 6 Terminal 8 TRANSFER PARAMETERS Voltage Gain

V+ = 30V, IABC = 100A, VOUT = 20V, RL = 2k

20,000 86 1650

100,000 100 2200 500 50 0.70

2750 -

V/V dB S V/s V/s V/s

Forward Transconductance to Terminal 1 Slew Rate (Open Loop) Positive Slope Negative Slope

gM SR IABC = 500A, RL = 2k IABC = 500A, RL = 2k

Unity Gain (Non-Inverting Compensated)

Schematic Diagram
EXTERNAL FREQUENCY COMPENSATION OR INHIBIT INPUT D3 Q4 Q6 D2 Q5 Q9 DIFFERENTIAL VOLTAGE 2 INPUT DIFFERENTIAL VOLTAGE INPUT AMPLIFIER BIAS INPUT 5 IABC 8 Q1 Q2 Q12 3 Q11 Q10 Q3 D1 R2 47k D6 6 SOURCE (DRIVE) OUTPUT SINK OUTPUT Q13 Q7 D4 Q8 D5 R1 2k 1 7 V+

INPUTS OUTPUT MODE Source Sink OUTPUT TERM 6 8 INV 2 3 NONINV 3 2

V-

3-3

CA3094, CA3094A, CA3094B Operating Considerations

The Sink Output (Terminal 8) and the Drive Output (Terminal 6) of the CA3094 are not inherently current (or power) limited. Therefore, if a load is connected between Terminal 6 and Terminal 4 (V- or Ground), it is important to connect a current limiting resistor between Terminal 8 and Terminal 7 (V+) to protect transistor Q13 under shorted load conditions. Similarly, if a load is connected between Terminal 8 and Terminal 7 (V+), the current limiting resistor should be connected between Terminal 6 and Terminal 4 or ground. In circuit applications where the emitter of the output transistor is not connected to the most negative potential in the system, it is recommended that a 100 current limiting resistor be inserted between Terminal 7 and the V+ supply. 1/F Noise Measurement Circuit When using the CA3094, A, or B audio amplier circuits, it is frequently necessary to consider the noise performance of the device. Noise measurements are made in the circuit shown in Figure 20. This circuit is a 30dB, non-inverting amplier with emitter follower output and phase compensation from Terminal 2 to ground. Source resistors (RS) are set to 0 or 1M for E noise and I noise measurements, respectively. These measurements are made at frequencies of 10Hz, 100Hz and 1kHz with a 1Hz measurement bandwidth. Typical values for 1/f noise at 10Hz and 50A IABC are:
E N = 18nV Hz and I N = 1.8pA Hz .

Test Circuits
30V

NOTES:

E OUT 3. Input Offset Voltage: V IO = ----------------. 100 4. For Power Supply Rejection Test: (1) vary V+ by -2V; then (2) vary V- by +2V. 5. Equations: E 0 OUT E 1 OUT (1) V+ Rejection = -----------------------------------------------200 E 0 OUT E 2 OUT (2) V- Rejection = -----------------------------------------------200

7 5 2 CA3094 3 100 100 4 8

300k 9.9k

6 1 10k 1k 100pF EOUT

15V

30V

1 -. 6. Power Supply Rejection: ( dB ) = 20 log -------------------------------------------V REJECTION Maximum Reading of Step 1 or Step 2

FIGURE 1. INPUT OFFSET VOLTAGE AND POWER SUPPLY REJECTION TEST CIRCUIT
30V

7 5

RABC 1M 8 7

30V

2 CA3094 3 1 4 220 0.001F 15V 150k EOUT 15V 3 6

300k 5

CA3094A + 4

1M

NOTES: 7. PDISSIPATION = (V+)(I)

E OUT 8. I OS = ------------------------------VO LT S 6 10 -------------------AMPS

I NOTE: I I = -2

FIGURE 2. INPUT OFFSET CURRENT TEST CIRCUIT

FIGURE 3. INPUT BIAS CURRENT TEST CIRCUIT

3-4

Test Circuits

(Continued)
30V 7 4.7k 10k 8 2

100

CA3094 6 4 10k EOUT 1k + 1

NOTES: 9. 100 26V CMRR = -------------------------------------------. E 2OUT E 1OUT

100 3 VCMR 0.8V TO 27.2V 9.9k

10. Input Voltage Range for CMRR = 1V to 27V. 100 26V CMRR (dB) = 20 log -------------------------------------------. E 2OUT E 1OUT

11.

200 15V

100pF

FIGURE 4. COMMON MODE RANGE AND REJECTION RATIO TEST CIRCUIT

+15V IABC 500

3.6k

RS 2

5 7

CA3094A +

6 4 3k CC -15V OUTPUT (RMS)

120 RS

IABC (A) 5 50 500

CCOMP (pF) 0 50 500

NOTE: RS = 1M (1/F Noise Current Test). RS = 0 (1/F Noise Voltage Test).

FIGURE 5. 1/F NOISE TEST CIRCUIT

FIGURE 6. OPEN LOOP GAIN vs FREQUENCY TEST CIRCUIT

FIGURE 7. OPEN LOOP SLEW RATE vs IABC TEST CIRCUIT

FIGURE 8. SLEW RATE vs NON-INVERTING UNITY GAIN TEST CIRCUIT

3-5

Test Circuits

(Continued)

+15V

120VAC V+ = 30V

56k R5 5 7 R2 2 R1 3 8 R3 3 S1 R6 6 4 51 RC CC COMMON -15V 1 2k OUTPUT R7 C1 D1 4 2 + CA3094A 7 8 5

CA3094A +

CLOSED LOOP GAIN (dB) 0 20 40

R1 (k) 10 10 1

R2 (k)

R3 (k) 10 10 10

1 0.1

FIGURE 9. PHASE COMPENSATION TEST CIRCUIT

FIGURE 10. PRESETTABLE ANALOG TIMER

Application Information
For additional application information, refer to Application Note AN6048, Some Applications of a Programmable Power/Switch Amplier IC and AN6077 An IC Operational Transconductance Amplier (OTA) with Power Capability. Design Considerations The selection of the optimum amplier bias current (IABC) depends on: 1. The Desired Sensitivity - The higher the IABC, the higher the sensitivity, i.e., a greater drive current capability at the output for a specic voltage change at the input. 2. Required Input Resistance - The lower the IABC, the higher the input resistance. If the desired sensitivity and required input resistance are not known and are to be experimentally determined, or the anticipated equipment design is sufciently exible to tolerate a wide range of these parameters, it is recommended that the equipment designer begin his calculations with an IABC of 100A, since the CA3094 is characterized at this value of amplier bias current. The CA3094 is extremely versatile and can be used in a wide variety of applications.

3-6

Typical Applications
Z1 Z2 + EOUT (NOTE) EIN CA3094 EOUT (NOTE)

EIN + CA3094

Where EOUT = EIN

NOTE: In single-ended output operation, the CA3094 may require a pull up or pull down resistor. FIGURE 11A. INVERTING OP AMP FIGURE 11B. NON-INVERTING MODE, AS A FOLLOWER

FIGURE 11. APPLICATION OF THE CA3094

FIGURE 12. RC TIMER

FIGURE 13. RC TIMER TRIGGERED BY EXTERNAL NEGATIVE PULSE

3-7

Typical Applications
+

(Continued)

MIN R 10k 1M MAX 2.7M 3 5VDC 2 C1 0.01F PAPER OR MYLAR 7 5 TYPE 1N914 8

+15V 510 47k 100k 2 20k + CA3094 3 1N914 4 47k C 5 7 8 OUTPUT 1k

CA3094 + 6 4 EOUT

330k C

2ms EOUT 120s

NOTES: 14. R = 1M, C = 1F. 15. Time Constant: t RC x 120. 16. Pulse Width: K(C1/C).
CURRENT INPUT OR VOLTAGE INPUT R

LINE

FIGURE 14. FREE RUNNING PULSE GENERATOR

FIGURE 15. CURRENT OR VOLTAGE CONTROLLED OSCILLATOR

30V

510 300k LED

R 100k 2

5 7 8 + CA3094A

3 C

6 4

FIGURE 16. SINGLE SUPPLY ASTABLE MULTIVIBRATOR

FIGURE 17. DUAL SUPPLY ASTABLE MULTIVIBRATOR

3-8

CA3094, CA3094A, CA3094B Typical Applications

(Continued)

+15V 150k +15V 300k 2k 5 R (NOTE 17) 51k INPUT 3 7 8 OUTPUT INPUT RA 200k 2 RB 200k R1 100k -15V 51k 3 5 7 8 2k OUTPUT

CA3094 + 6 4

CA3094A + 6 4

2 R1 100k R2 100k

NOTES: 19. RB Upper Threshold = [ V+ ] --------------------------------------- R1 RA --------------------- + R B R1 + RA .

NOTES: 17. 18. R1 R2 -. R = -------------------R1 + R2 R1 - . Threshold = [ Supply ] -------------------R1 + R2 20. R1 RB --------------------R1 + RB - . Lower Threshold = [ V+ ] --------------------------------------- R1 RB --------------------- + R A R1 + RB FIGURE 18B. SINGLE SUPPLY

FIGURE 18A. DUAL SUPPLY

FIGURE 18. COMPARATORS (THRESHOLD DETECTORS) DUAL AND SINGLE SUPPLY TYPES

TYPE D1201F PTC TEMP. SENSOR 10 117V 60Hz 26V 60Hz +

1.5M

1N914

HEATER 330k 68k 7 5 1.5k MT2 8 CA3094 3 6 G MT1 1k 0.01F

50F 50V

75k

10k TEMP. SET

2 1N914

R 75k

75k

FOR NTC SENSOR, INTERCHANGE POSITION OF SENSOR AND R .

NOTE: All Resistors are 1/2W.

FIGURE 19. TEMPERATURE CONTROLLER

3-9

CA3094, CA3094A, CA3094B Typical Applications

2 V+ INPUT (NOTE 21) 3 4 REF. 1.6V 6 7 R 5k 0.01F 10k

(Continued)
NOTE 23 5.6 8 +15V REG. OUTPUT

CA3085A VOLTAGE REG.

NOTES:
0.0056F

21. V+ Input Range = 19V to 30V for 15V output.

1.5k COMMON RETURN 200k

22. V- Input Range = -16V to -30V for -15V output. 23. Max IOUT = 100mA. 24. Regulation: V O UT Max Line = ----------------------------------------------------------- 100 = 0.075% V [ VO UT ( Initial ) ]V IN

100 5.1k 2

1 5 7 + CA3094A 0.03F

6 4

V O UT Max Load = --------------------------------------- 100 = 0.075% VO UT VO UT ( Initial ) (IL from 1mA to 50mA)

8 -15V REG. OUTPUT 10k 1%

V- INPUT (NOTE 22) 10k 1%

FIGURE 20. DUAL VOLTAGE TRACKING REGULATOR

36V 1mA ILOAD 3 33k +3V RTRIP 200mV RANGE 200 3.3 k IABC 10A 3.3M IA 20A 100 VOLTS

CIRCUIT TRIPS ON POSITIVE PEAKS WILL SWITCH WITHIN 1.5 CYCLES VOLTAGE BETWEEN TERMINALS 2 AND 4 VOLTAGE BETWEEN TERMINALS 3 AND 4 (ADJUSTABLE WITH RTRIP) 60mV TYPICAL GROUND FAULT SIGNAL 60Hz

5 R 47k (NOTE 3) L C 0.02F C2 0.1F (NOTE 4) 47k 3 100k 2 7 t

CA3094B + 6 4 8 CIRCUIT BREAKER CONTROL SOLENOID

NOTES: 25. Differential current sensor provides 60mV signal 5mA of unbalance (Trip) current. 26. All Resistors are 1/2 Watt, 10%. 27. RC selected for 3dB point at 200Hz. 28. C2 = AC bypass. 29. Offset adj. included in RTRIP . 30. Input impedance from 2 to 3 = 800k.

1k

0.001F

31. With no input signal Terminal 8 (output) at 36V.

FIGURE 21. GROUND FAULT INTERRUPTER (GFI) AND WAVEFORMS PERTINENT TO GROUND FAULT DETECTOR

3-10

CA3094, CA3094A, CA3094B Typical Applications

TREBLE BOOST (CW) 15k 0.12F 68 0.001F 0.001F 5F + 5600 220 1W 1800 220 1W 15F + Q2 2N6292 2N6292 VCUT (CCW) 0.01F 820 + 4700F

(Continued)
D1 - D4 1N5391 V+ D1 D2 D3 D4 3H 120V 60Hz STANCOR NO. P-8609 OR EQUIVALENT (120VAC TO 26.8VCT AT 1A)

+
INPUT VOLUME C1 (NOTES 32, 33) R1 2 + CA3094B 3 8 6 4 5 680 k 0.2F 25F + 0.02F CUT (CCW) 10k C2 0.47F 0.47 F 1 8 LEAD TO-5 THERMAL COMPENSATION NETWORK 7 1 27 Q3 30 6.8pF Q1 0.47 0.47 2N6107

4700 F

330

22 RL 8 R2 1.8M (NOTES 32, 33)

47

OPTIONAL THERMAL
COMPENSATION NETWORK

1k BOOST 100k (CW) BASS

8.2 1N5391

JUMPER (NOTES 32, 33)

TYPICAL PERFORMANCE DATA FOR 12W AUDIO AMPLIFIER CIRCUIT Power Output (8 load, Tone Control Set at Flat) Music (at 5% THD, Regulated Supply) . . . . . . . . . . . . . . . . . . 15W Continuous (at 0.2% IMD, 60Hz and 2kHz Mixed in a 4:1 Ratio, Unregulated Supply) See Figure 8 in AN6048 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12W Total Harmonic Distortion At 1W, Unregulated Supply. . . . . . . . . . . . . . . . . . . . . . . . . 0.05% At 12W, Unregulated Supply. . . . . . . . . . . . . . . . . . . . . . . . 0.57% Voltage Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40dB Hum and Noise (Below Continuous Power Output) . . . . . . . . . 83dB Input Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250k Tone Control Range . . . . . . . . . . . . . . . . . . See Figure 9 in AN6048 NOTES: 32. For standard input: Short C2; R1 = 250k, C1 = 0.047F; remove R2. 33. For ceramic cartridge input: C1 = 0.0047F, R1 = 2.5M , remove jumper from C2; leave R2 .

FIGURE 22. 12W AUDIO AMPLIFIER CIRCUIT FEATURING TRUE COMPLEMENTARY SYMMETRY OUTPUT STAGE WITH CA3094 IN DRIVER STAGE

3-11

Typical Performance Curves

FIGURE 23. INPUT OFFSET VOLTAGE vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

FIGURE 24. INPUT OFFSET CURRENT vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

FIGURE 25. INPUT BIAS CURRENT vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

FIGURE 26. DEVICE DISSIPATION vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

FIGURE 27. AMPLIFIER SUPPLY CURRENT vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

FIGURE 28. COMMON MODE INPUT VOLTAGE vs AMPLIFIER BIAS CURRENT (IABC, TERMINAL 5)

3-12

Typical Performance Curves

50 45 1/F NOISE VOLTAGE (nV/Hz) 40 35 30 25 20 50A 15 10 101 IABC = 5A 500A V+ = +15V, V- = -15V RS = 0, TA = 25oC FOR TEST CIRCUIT, SEE FIGURE 20

(Continued)

102 FREQUENCY (Hz)

103

FIGURE 29. 1/F NOISE VOLTAGE vs FREQUENCY

FIGURE 30. 1/F NOISE CURRENT vs FREQUENCY

FIGURE 31. COLLECTOR EMITTER SATURATION VOLTAGE vs COLLECTOR CURRENT OF OUTPUT TRANSISTOR (Q13)

FIGURE 32. COMPOSITE DC BETA vs COLLECTOR CURRENT OF DARLINGTON CONNECTED OUTPUT TRANSISTORS (Q12, Q13)

FIGURE 33. OPEN LOOP VOLTAGE GAIN vs FREQUENCY

FIGURE 34. FORWARD TRANSCONDUCTANCE vs AMPLIFIER BIAS CURRENT

3-13

CA3094, CA3094A, CA3094B Typical Performance Curves

100 V+ = +15V, V- = -15V, TA = 25oC FOR TEST CIRCUIT, SEE FIGURE 22

(Continued)
100

V+ = +15V, V- = -15V, IABC = 500A, TA = 25oC FOR TEST CIRCUIT, SEE FIGURE 23

SLEW RATE (V/s)

10

SLEW RATE (V/s) 1 10 100 1000

10

1.0

1.0

0.1 AMPLIFIER BIAS CURRENT (A)

0.1 0 20 40 60 80 100 CLOSED LOOP VOLTAGE GAIN (dB)

FIGURE 35. SLEW RATE vs AMPLIFIER BIAS CURRENT

FIGURE 36. SLEW RATE vs CLOSED LOOP VOLTAGE GAIN

PHASE COMPENSATION CAPACITANCE (pF)

1000

100

80 60 40 20

CC

1000 800

10

8 6 4 2

RC

600 400 200

1 0 10 20 30 40 50 60 70 CLOSED LOOP VOLTAGE GAIN (dB)

FIGURE 37. PHASE COMPENSATION CAPACITANCE AND RESISTANCE vs CLOSED LOOP VOLTAGE GAIN

3-14

PHASE COMPENSATION RESISTANCE ()

V+ = +15V, V- = -15V, IABC = 500mA, TA = 25oC 100mV OUTPUT SIGNAL WITH 10% OVERSHOOT FOR PHASE COMPENSATION TEST CIRCUIT, SEE FIGURE 24