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AT30

High Performance Off-line Controller

Description
The AT30 is a high performance green-energy offline power supply controller. It features a scalable driver for driving external NPN or MOSFET transistors for line voltage switching. This proprietary architecture enables many advanced features to be integrated into a small package (TO-92 or SOT23-5), resulting in lowest total cost solution. The AT30 design has 6 internal terminals and is a pulse frequency and width modulation IC with many flexible packaging options. One combination of internal terminals is packaged in the space-saving TO-92 package (A/B/C/D versions) for 65kHz or 100kHz switching frequency and with 400mA or 800mA current limit. The E version (SOT23-5) can be configured for higher current limit. Consuming only 0.15W in standby, the IC features over-current, hiccup mode short circuit, and under-voltage protection mechanisms. The AT30 is ideal for use in high performance universal adaptors and chargers.

Features
High Performance with 0.15W Standby Power Current Mode Operation PWM/Pulse-Skipping Switching Control Emitter Drive Allows Safe NPN Flyback Use 65kHz or 100kHz Switching Frequency Leading Edge Blanking Complete Protection Circuits including Over-Current Protection, Under-Voltage Protection and Hiccup Mode for Short Circuit Flexible Packaging Options(including TO-92) Selectable 0.4A to 1.2A Current Limit Lowest Total Cost Solution

HIGH VOLTAGE DC

R1

D2

Q1

R2

Applications
IC1

Offline PWM AC/DC converter for Battery Charger Power Adaptor Universal Off-line Power Supplies Standby Power Supplies
C1 D1

DRV

AT30
GND

VDD

OPTOCOUPLER

Figure1. Simplified Application Circuit of AT30

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AT30

Ordering Information
Part Number AT30A AT30B AT30C AT30D AT30E Switching Frequency 65kHz 65kHz 100kHz 100kHz Selectable Current Limit 400mA 800mA 400mA 800mA Adjustable Temperature Range -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C Package To-92 To-92 To-92 To-92 SOT23-5 Pins 3 3 3 3 5

Pin Assignments
TO-92 SOT23-5

AT30A AT30B AT30C AT30D AT30E

Functional Pin Description

Pin Number TO-92 SOT23-5 PIN NAME Pin Function

1 2

1 2

VDD GND

Power Supply Pin. Connect to optocoupler's emitter. Internally limited to 5.5V max. Bypass to GND with a proper compensation network. Ground Driver Output (TO-92 Only). Connect to emitter of the high voltage NPN or MOSFET. For AT30A/C, DRV pin is internally connected to DRV1. For AT30B/D, DRV pin is internally connected to both DRV1 and DRV2. Driver Output 1 (SOT23-5 Only). Also used as supply input during startup. Driver Output 2 (SOT23-5 Only) Frequency Select (SOT23-5 Only). This terminal has an internal 200k pull down resistor. Connect to VDD for 100kHz operation. Connect to GND or leave unconnected for 65kHz operation.

DRV

5 4

DRV1 DRV2

FREQ

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AT30 Thermal Information

Junction Temperature------------------------- -40C to +150C Storage Temperature Range---------------- -55C to +150C Lead Temperature (Soldering, 10sec) ------------------300C

Absolute Maximum Ratings

VDD,FREQ Voltage------------------------------ -0.3V to + 6V VDD current---------------------------------------------------20mA VDRV, DRV1, DRV2 Voltage ---------------- -0.3V to + 18V Continuous DRV, DRV1, DRV2 Current--------------------Maximum Power Dissipation -------Internally limited 0.6W for TO-92 0.39W for SOT23-5

ESD Classification
Human Body Model-----------------------------------2000V Machine Model-------------------------------------------200V

Note Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device.

Electrical Characteristics
(TA = 25C, VDD=4V if not otherwise noted)
Parameter VDD Start Voltage V DD Clamp Voltage Supply Current Startup Supply Current VDD Under-Voltage Threshold Symbol V START VDD_CLP I DD IDDST U UV V DD = 4V before V Falling edge DRV1 must be DRV1 Start Voltage VDRVST higher than this AT30B/D voltage to start up. DRV1 Short-Circuit Detect Threshold V DRVSC AT30A/C AT30A/B or FREQ = 0 Switching frequency F SW AT30C/D or FREQ = V Maximum Duty Cycle Minimum Duty Cycle D MAX D MIN V DD =4V V DD =4.6V AT30A/C Effective Current Limit ILIM VDD =V UV +0.1V AT30B/D V DD to DRV1 Current Coefficient VDD Dynamic Impedance DRV1/DRV2 Driver On-Resistance DRV1 Rise Time DRV1 Fall Time DRV1 and DRV2 Switch Off Current G GAIN R VDD R DRV1, 2 I DRV1 = I DRV2 = 0.05A 1nF load, 15 pull-up 1nF load, 15 pull-up Driver off, V
DRV1 DD UV

Test Conditions Rising edge I(V DD )=10mA

Min 4.75

Typ 5

Max Units 5.25 V V 0.1 mA mA V 10.5 V 11.5 V 85 kHz 125 83 % %

5.15 5.45 5.75 0.7 0.23 0.45 3.17 3.35 3.53 AT30A/C 8.6 9.6 6.8 55 75 67 65 100 75 3.5 400

mA 800 -0.29 9 3.6 30 20 = 10V 12 30 A/V k ns ns A

=V

DRV2

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AT30
N-channel MOSFET. This emitter-drive method

Operation Description
Figure 2 shows the Functional Block Diagram of the AT30. The main components include switching

takes advantage of the high V

CBO

of the transistor,
CBO

allowing a low cost transistor such as 13003 (V = 700V) or 13002 (V control logic, two on-chip medium-voltage coupled with the turn-off characteristics of an power-MOSFETs with parallel current sensor, driver, external NPN result in lower EMI. oscillator and ramp generator, current limit VC The driver peak current is designed to have a generator, error comparator, hiccup control, bias and negative voltage coefficient with respect to supply undervoltage-lockout, and regulator circuitry. voltage V As seen in Figure 2, the design has 6 internal automatically results in higher DRV1 peak current. terminals. V
DD DD CBO

= 600V) to be used for a

wide AC input range. The slew-rate limited driver

, so that lower supply voltage

is the power supply terminal. DRV1 This way, the optocoupler can control V
DD

directly

and DRV2 are linear driver outputs that can drive the to affect driver current. emitter of an external high voltage NPN transistor or

DRV1 VDD BIAS & UVLO REGULATOR

DRV2

9k

3.6V(AT30A/C) 4.6V(AT30B/D) HICCUP CONTROL PWM/PULSE -SKIPPING SWITCHING CONTROL LOGIC SLEW 1x 56x 56x

FREQ
200k

OSC & RAMP CURRENT

20k

ILIM VC GENERATOR -

ERROR COMP

+ 40

20k

4.75V

GND

GND

Figure 2. Block Diagram of AT30

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AT30 Normal Operation

In normal operation, the feedback signal from the secondary side is transmitted through the optocoupler as a current signal into VDD pin, which has dynamic impedance of 9k
DRV1

Startup Sequence
Figure 1 shows a Simplified Application Circuit for the AT30. Initially, the small current through resistor R1 charges up the capacitor C1, and the BJT acts as a follower to bring up the DRV1 voltage. An internal regulator generates a V 3.6V for AT30A/C (V limits it to 5.5V max. As V
DRV1 DD

The resulting V

DD

voltage equal to V

voltage affects the switching of the IC. As seen from the Functional Block Diagram, the Current Limit VC Generator uses the V
DD

4.6V for AT30B/D) but

DD

crosses 5V, the

DD

voltage difference with

regulator sourcing function stops and V drop due to its current consumption. As V

begins to
DD

4.75V to generate a proportional offset at the negative input of the Error Comparator. The drivers turn on at the beginning of each switching cycle. The current sense resistor current, which is a fraction of the transformer primary current, increases with time as the primary current increases. When the voltage across this current sense resistor plus the oscillator ramp signal equals Error Comparator's negative input voltage, the drivers turn off. Thus, the peak DRV1 current has a negative voltage coefficient of -0.29A/V and can be calculated from the following: IDRV1PEAK for V
DD

voltage

decreases below 4.75V, the IC starts to operate with increasing driver current. When the output voltage reaches regulation point, the optocoupler feedback circuit stops V
DD

from decreasing further. The

switching action also allows the auxiliary windings to take over in supplying the C1 capacitor. Figure 3 shows a typical startup sequence for the AT30. To limit the auxiliary voltage, use a 12V zener diode for AT30A/C or a 13V zener for AT30B/D (D1 diode in Figure 1). Even though up to 2M startup resistor (R1) can be used due to the very low startup current, the actual R1 value should be chosen as a compromise between standby power and startup time delay.

= 0.29A/V (4.75V V < 4.75V and duty cycle < 50%.

DD

When the output voltage is lower than regulation,

Figure 3. Startup Waveforms

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AT30
each switching cycle (with minimum on time of 500ns) to the output causes VDD to increase slightly above 4.75V. The PWM Switching Control Logic block is able to detect this condition and prevents the IC from switching until V
DD

the current into VDD pin is zero and VDD voltage decreases. At V
DD

=V

UV

= 3.3V, the peak DRV1

current has maximum value of 400mA.

Current Limit Adjustment

The IC's proprietary driver arrangement allows the current limit to be easily adjusted between 400mA and 1.2A. To understand this, the drivers have to be utilized as linear resistive devices with typically 3.6 (rather than as digital output switches). The current limit can then be calculated through linear combination as shown in Figure 4. For TO-92 package, the AT30A/C are preprogrammed to 400mA current limit and the AT30B/D are preprogrammed to 800mA current limit. For AT30E (SOT23-5) packages, both DRV1 and DRV2 terminals are provided.

is below

4.75V again. This results in a pulse-skipping action with fixed pulse width and varying frequency, and low power consumption because the switching frequency is reduced. Typical system standby power consumption is 0.15W.

Short Circuit Hiccup

When the output is short circuited, the AT30 enters hiccup mode operation. In this condition, the auxiliary supply voltage collapses. An on-chip detector compares DRV1 voltage during the off-time of each cycle to 6.8V. If DRV1 voltage is below 6.8V, the IC will not start the next cycle,

DRV1

I LIM

400 mA

causing both the auxiliary supply voltage and V reduce further. The circuit enters startup mode when V
DD

DD

to

DRV2

drops below 3.3V. This hiccup behavior

DRV1

DRV2 RD

I LIM

400 mA

7 .2 R D 3.6 R D

continues until the short circuit is removed. In this behavior, the effective duty cycle is very low resulting in very low short circuit current.

DRV1

To make sure that the IC enters hiccup mode

DRV2

I LIM

800 mA

easily, the transformer should be constructed so that there is close coupling between secondary and

RD DRV1

I LIM
DRV2

400 mA

RD 3. 6

auxiliary, so that the auxiliary voltage is low when

the output is short-circuited. This can be achieved with the primary/auxiliary/secondary sequencing

Figure 4. Driver Output Configurations

from the bobbin.

Pulse Skipping
The PWM/Pulse Skipping Switching Control Logic block operates in different modes depending on the output load current level. At light load, the VDD voltage is around 4.75V. The energy delivered by

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AT30 Layout Considerations

The following should be observed when doing layout for the AT30: 1. Use a "star point" connection at the GND pin of AT30 for the VDD bypass components (C5 and C6
OUTCV

Application Example
The application circuit in Figure 6 provides a 5V/0.75A constant voltage/constant current output. An AT30 is used in combination with the TL431 for highest efficiency and lowest component count. To change the constant output voltage V constant current limit I following: R7 = 80k
[(V
OUTCV OUTCC

and

in Figure 6), the input filter capacitor (C2 in Figure 6) and other ground connections on the primary side.

, modify R7 and R6 as

-1V)/3.8V - 1]

2. Keep the loop across the input filter capacitor, the transformer primary windings, and the high voltage transistor, and the AT30 as small as possible. 3. Keep AT30 pins and the high voltage transistor 220VAC 0.15W 0.75A 67% pins as short as possible. 4. Keep the loop across the secondary windings, the output diode, and the output capacitors as small as possible. 5. Allow enough copper area under the high voltage transistor, output diode, and current shunt resistor for heat sink.

R6 = 250mV/I

OUTCC

The performance of this circuit is summarized in Table 1.

Table 1. System Performance of Circuit in Figure 6

110VAC Standby Power Current Limit Full Load Efficiency 0.09W 0.75A 65%

RF1 AC1 10 2W 85~265VAC T1 SR260 D1 D6 7uH LF2 5V/0.75A OUTPUT+

AC2

R2 1M

R4 100K 0.5W

C4 1000PF 1KV D2

FR107 D3 R3 C7 470uF 10V Q1 + C8 680uF 16V IN4148 R3 330 IC2

IN4148 C1 4.7uF 400V C2 4.7uF 400V D4

510 0.5W

C3 22uF 25V R6 R7 13K 3 PC817 IC3 47K C6 10nF

R1 R5 2.2K LF1 820uH D5 1N5242B 12V + 200 C5 10uF 6V

AT30A
2 C6

TL431

R8 12K

10nF

OUTPUT-

Figure 6. A 3.75W Charger Using AT30 in combination with TL431

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AT30

Outline Information

SYMBOL

DIMENSION IN MILIMETERS MIN MAX 3.700 1.400 0.550 0.510 4.700

DIMENSION IN INCHES MIN 0.130 0.043 0.015 0.014 0.173 0.135 MAX 0.146 0.055 0.022 0.020

SYMBOL

DIMENSION IN MILIMETERS MIN MAX 1.0 2.8 21 16.5

DIMENSION IN INCHES MIN -0.039 0.087 0.748 0.610 0.0098 MAX 0.039 0.110 0.827 0.650

A A1 b c D D1 E e e1 h

3.300 1.100 0.380 0.360 4.400 3.430 4.300

k F1,F2 H H0 L1

-1.0 2.2 19 15.5 2.5 12.4 -1.0 12.5 3.55 6.05 3.8 0.35 0.15 17.5 5.5 8.5

0.185

P P

13.0 1.0 12.9 4.15 6.65 4.2 0.45 0.25 19 6.5 9.5 1.0

0.488 -0.039 0.492 0.140 0.238 0.150 0.014 0.006 0.689 0.217 0.335

0.512 0.039 0.508 0.163 0.262 0.165 0.018 0.010 0.748 0.256 0.374 0.039

4.700

0.169

0.185

P0 P1 P2 Q1 t1

1.270TYP 2.440 2.640 1.600 0.000 0.380

0.050TYP 0.096 0.104 0.063 0.000 0.015

t2 W W0 W1 W2

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AT30

SYMBOL

DIMENSION IN MILIMETERS MIN MAX 1.250 0.100 1.150 0.400 0.200 3.020 1.700 2.950

DIMENSION IN INCHES MIN 0.041 0.000 0.041 0.012 0.004 0.111 0.059 0.104 MAX 0.049 0.004 0.045 0.016 0.008 0.119 0.067 0.116

A A1 A2 b c D E E1 e e1 L L1

1.050 0.000 1.050 0.300 0.100 2.820 1.500 2.650

0.950TYP 1.800 2.000

0.067TYP 0.071 0.079

0.700REF 0.300 0
0

0.028REF 0.012 0
0

0.600 8
0

0.024 8
0

-End of Specifications-

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China:

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