CXA2550M/N

RF Amplifier for CD Players

Description
The CXA2550M/N is an IC developed for compact CXA2550M CXA2550N
disc players. This IC incorporates an RF amplifier, 20 pin SOP (Plastic) 20 pin SSOP (Plastic)
focus error amplifier, tracking error amplifier, APC
circuit and RF level control circuit. (The voltage-
converted optical pickup output is supported.)

Features
• Low power consumption (35mW at 3.5V)
• APC circuit
Absolute Maximum Ratings (Ta = 25°C)
• RF level control circuit
• Supply voltage VCC 12 V
• Both single power supply and dual power supply
• Operating temperature Topr –20 to +75 °C
operations possible.
• Storage temperature Tstg –65 to +150 °C
• Allowable power dissipation
Structure
PD (SOP) 620 mW
Bipolar silicon monolithic IC
(SSOP) 370 mW

Applications
Operating Conditions
Compact disc players
Supply voltage VCC – VEE 3.0 to 4.0 V

Block Diagram and Pin Configuration (Top View)

(50%/30%/OFF)
18 AGCCONT

12 FE_BIAS
19 LD_ON

17 RFTC

15 RF O

14 RFM
16 RF I
20 VCC

13 FE

11 TE
VCC

174k

TRACKING
VC

54k
15k

6k
VCC

ERROR
VEE
50µA

VC AMP
ERROR
24p

FOCUS
154k

95k
56k APC LD

56k

AMP
670mV
AMP

13.4k
10k

VC

87k

96k
30k

30k
VC
2k

2k
10k
10k
1k

24p
VC

32k

32k
VCC

30k
30k
55k

VREF 1.25V

13k

VCC

VEE
2k
APC PD AMP

13k
8k 6p

8k 6p
VEE

260k

260k
25k

26k
10k

2k

15k
12p
12p
10k

10k
VEE

VEE
VC

VC VC

VC
VC

49
VC

VC
VC

VC

VC 10
5
2

9
1

8
4

7
6
3
AGCVTH

LD

PD

PD1

PD2

VEE

EI

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

–1–
E97514-PS
 CXA2550M/N

Pin Description
Pin
Symbol I/O Equivalent circuit Description
No.

50µ
147 Reference level variable pin for RF
1 level control.
1 AGCVTH —
The reference level can be varied by
13.4k the external resistor.
10µ

10k

2 LD O 2 APC amplifier output pin.

1k

20µ
8µ

147 55k
3 PD I APC amplifier input pin.
3

10k

10k

Inversion input pin for RF I-V

amplifiers.
4 PD1 I 4
Connect these pins to the
5 PD2 I 5
photodiodes A + C and B + D
100µ respectively. The current is supplied.

6 VEE — 6 VEE VEE pin.

–2–
 CXA2550M/N

Pin
Symbol I/O Equivalent circuit Description
No.

12p

260k
Inversion input pin for F and E I-V
amplifiers.
7 F I
7 Connect these pins to the
8 E I
photodiodes F and E respectively.
8
The current is supplied.
10µ

13k

26k
9 EI — 147 260k Gain adjustment pin for I-V amplifier.
9

VCC VCC

200µ
DC voltage output pin of
(Vcc + VEE)/2.
120 Connect to GND for ±1.75 power
10 VC O 50 15k
10 supply; connect a smoothing
capacitor for single +3.5V power
120
16k supply.

VEE

11 Tracking error amplifier output pin.

11 TE O
96k E-F signal is output.
300µ

–3–
 CXA2550M/N

Pin
Symbol I/O Equivalent circuit Description
No.

32k

164k
12
Bias adjustment pin for inverted side
12 FE_BIAS I
24p 174k of focus error amplifier.
10µ

24p

13 FE O 13 Focus error amplifier output pin.

174k

300µ

2k

2k

RF amplifier inverted side input pin.

147
14 RF amplifier gain is determined by
14 RFM I
the resistor connected between this
pin and RFO pin.
850
1m

147
15 RF O O 15 RF amplifier output pin.

60k 1m

–4–
 CXA2550M/N

Pin
Symbol I/O Equivalent circuit Description
No.

147
16
The RF amplifier output RFO is input
16 RF I I 15k
with its capacitance coupled.

20µ

147 50µ External time-constant pin for RF

17 RFTC — 17 level control.
50µ

10µ

15µ 15µ

RF level control ON (limit level of

147
18 50%/30%)/OFF switching pin.
18 AGCCONT I
OFF for Vcc, 30% for open or Vc
50k 7µ
and 50% for VEE.

50µ

147 APC amplifier ON/OFF switching

19 LD_ON I 19 pin.
VREF OFF for Vcc and ON for VEE.

20 VCC 20 VCC Vcc pin.

–5–
 Electrical Characteristics (Ta = 25°C, VCC = 1.75V, VEE = –1.75V, VC = GND)

SW conditions Bias conditions Description of I/O waveform

No. Measurement item Symbol Min. Typ. Max. Unit
1 2 3 4 5 6 7 8 I1 I2 E1 E2 E3 E4 and measurement method

Measure-
ment pin
1 ICC O 20 Input GND 6.37 9.8 13.23 mA
Current
2 consumption IEE O 6 Input GND –13.23 –9.8 –6.37 mA
3 Offset voltage 1 V15-1 15 Input resistance 33kΩ Output DC –50.0 –10 60.0
measurement mV
4 Voltage gain V15-2 O O 15 Input 1kHz 120mVp-p Output AC 16.7 19.7 22.7
measurement dB
5 Frequency V15-3 15 Input 3MHz 120mVpp Output AC –3 — —
response measurement dB
6 Maximum output V15-4 O O O 300mV 15 Output DC 1.45 — —

RF amplifier
amplitude H measurement V
7 Maximum output V15-5 O O O –300mV 15 Output DC — — –1.25
amplitude L measurement V
8 Offset voltage V13-1 13 Input resistance 33kΩ Output DC –120.0 0 120.0 mV
measurement

9 Voltage gain 1 V13-2 O 13 Input 1kHz 120mVp-p Output AC 16.4 19.4 22.4
measurement dB
10 Voltage gain 2 V13-3 O 13 Input 1kHz 120mVp-p Output AC 16.4 19.4 22.4
measurement dB

Voltage gain V13-4 = V13-2 –

11

–6–
difference V13-4 13 –3.0 0 3.0 dB
V13-3

FE amplifier
12 Maximum output V13-5 O O 300mV 13 Output DC — — –1.25
amplitude L measurement V
13 Maximum output V13-6 O O 300mV 13 Output DC 1.25 — —
amplitude H measurement V
14 Offset voltage 1 V11-1 11 Input resistance 390kΩ Output DC –50 0 50
measurement mV
15 Voltage gain 1 V11-2 O 11 Input 1kHz 240mVp-p Output AC 7.3 10.3 13.3
measurement dB
16 Voltage gain 2 V11-3 O 11 Input 1kHz 240mVp-p Output AC 7.3 10.3 13.3
measurement dB

Voltage gain V11-4 = V11-2 –

17 difference V11-4 11 –3.0 0 3.0 dB
V11-3

TE amplifier
18 Maximum output V11-5 O O 1V 11 Output DC 1.25 — —
amplitude H measurement V
19 Maximum output V11-6 O O 1V 11 Output DC — — –1.25
amplitude L measurement V
20 Output voltage 1 V2-1 450µA 2.7V 2.0V 2 Output DC –830 –330 170
measurement mV
21 Output voltage 2 V2-2 570µA 2.7V 2.0V 2 Output DC 470 970 1470
measurement mV

APC
22 Output voltage 3 V2-3 0µA 2.7V 0.5V 2 LD OFF Output DC 1400 1590 —
measurement mV
Maximum output Output DC
CXA2550M/N

23 amplitude V2-5 O 0.8mA 0µA 2.7V 2.0V 2 measurement –600 — 100 mV

 SW conditions Bias conditions Description of I/O waveform
No. Measurement item Symbol Min. Typ. Max. Unit
1 2 3 4 5 6 7 8 I1 I2 E1 E2 E3 E4 and measurement method

Measure-
ment pin
0.5V/ Level control:
24 50% limit V2-7 O O 800µA 50mV 2.0V 2 –1900 –1322 –100 mV
2.7V 50% – Level control OFF

1.3V/ Level control:

25 30% limit V2-8 O O 700µA 50mV 2.0V 2 –1700 –1163 –200 mV
2.7V 30% – Level control OFF

0.5V/ Level control:

26 –50% limit V2-9 O O 230µA 800mV 2.0V 2 700 1471 1900 mV
2.7V –50% – Level control OFF

RF level control
2.2V/ Level control:
27 –30% limit V2-10 O O 320µA 800mV 2.0V 2 700 1204 1700 mV
2.7V –30% – Level control OFF

28 High Level V18-1 18 2.7 — — V

29 Middle Level V18-2 18 1.3 — 2.2 V
30 Low Level V18-3 18 — —

AGCCONT
0.5 V
31 O 10 Output DC –100 — 100
Center output voltage V10-1 measurement mV

Note) O in the SW conditions 7 represents the OFF state.

–7–
CXA2550M/N
 Electrical Characteristics Measurement Circuit

VEE
GND VEE VEE GND GND GND GND GND GND

R11 R10 R8 R7 R6
C3 C2
1M 10k 10k 10k 10k
33µ 0.1µ E2
VEE VEE R9
5.5k
S8
E4 E3
20 19 18 17 16 15 14 13 12 11

FE
TE

VCC
RF I
RFM

RF O

RFTC

LD_ON
FE_BIAS

AGCCONT

–8–
PD1

AGCVTH
EI

VEE

PD
E

PD2

LD
VC

F
1 2 3 4 5 6 7 8 9 10
C1
R2 R3 33µ R4 R5
S1 S7
R1 33k 33k 390k 390k
I2
300 S2 S3 S4 S5
I1
0.8mA GND
S6
VCC VCC VEE GND VEE GND
AC E1

GND
CXA2550M/N
 CXA2550M/N

Description of Functions

RF Amplifier
The photodiode current input to the input pins (PD1, PD2) are current-to-voltage (I-V) converted by the
equivalent resistance of 58kΩ at PD I-V amplifiers, respectively. The signal is added by the RF summing
amplifier and then the I-V converted output voltage of the photodiode (A + B + C + D) is output to RFO pin.
This pin is used check the eye pattern.

Cp 5.5k

RFM RFO
14 15
58k

33k PD1
VA 2k
I-V 4

PD1 IV AMP
RF SUMMING AMP
58k

33k PD2
VB 2k
I-V 5

GND PD2 IV AMP

The frequency response of the RF output signal can be equalized by adding the capacitance (Cp) to RFI pin.
The low frequency component of the RFO output voltage is as follows;
VRFO = –2.75 × (VA + VB)
= 159.5kΩ × (iPD1 + iPD2)

Focus Error Amplifier

The difference between the RF I-V amplifier output VA and VB is obtained and the I-V converted voltage of the
photodiode (A + C – B – D) is output.

24p

174k

VB 32k
– (B + D)
13 FE
– (A + C)
VA 32k 24p
87k
164k

FE BIAS
12

VEE VCC
47k

The FE output voltage (low frequency) is as follows;

VFE = 5.4 × (VA – VB)
= (iPD2 – iPD1) × 315kΩ

–9–
 CXA2550M/N

Tracking Error Amplifier

Each signal current from the photodiodes E and F is I-V converted and input to Pins 7 and 8 via a resistor
which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error
amplifier and then the (F-E) signal is output to Pin 11.

RF1 260k RF2 13k

12p RF3 96k

26k
220k
F 30k
I-V 7
11 TE
30k 96k
RE1 260k RE2 13k

12p

220k
E
I-V 8

RE3
26k

9
EI

270k 22k 4.7k

R1 R2

The balance adjustment is performed by varying the combined resistance value of the feedback resistors,
which are T type-configured at the E I-V amplifier, by using the external resistance value of EI pin.

RF1 × RF2
F I-V amplifier feedback resistance value = RF1 + RF2 + = 403kΩ
RF3

E I-V amplifier feedback resistance value = (RE1 // R1) + RE2 + (RE1 // R1) × RE2
(RE3 // R2)

Leave EI pin open when the balance adjustment is not executed in this IC.
The gain for F I-V and E I-V amplifiers becomes the same when EI pin is left open.

– 10 –
 CXA2550M/N

Center Voltage Generation Circuit

This circuit provides the center potential when this IC is used at single power supply. The maximum current is
approximately ±3mA. The output impedance is approximately 50Ω.

VCC

30k

50 VR
10
30k

VEE

APC & Laser Power Control

VCC

R1 C2
22 100µ
LD
2
R6 VCC
L1 1k
130mV
10µH R10 LD_ON MICRO-
PD 56k 19
COMPUTER
3
R3
C1 R8
100
1µ R2 10k
500 R4 R5
R11 R12 VREF
LD PD 10k 55k
10k 56k
VEE
GND VEE VEE VL

R14
12.5k

RF I 1.1Vp-p AGCCONT MICRO-

18
16 COMPUTER
C3
R7
0.01µ
RF O 6k
15
R9 50µ
670mV
54k
RF R15
VEE 13.4k

17 1
RFTC AGCVTH
R13 C4
1M 1µ

• APC VEE VEE

When the laser diode is driven by a constant current, the optical power output has extremely large negative
temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level.
The laser diode current is controlled according to the monitor photo diode output.
APC is set to ON by connecting the LD_ON pin to VCC; OFF by connecting it to VCC.

– 11 –
 CXA2550M/N

Application Circuit
• For single power supply +3.5V

COMPUTER

COMPUTER
MICRO-

MICRO-
+3.5V
GND

SSP
SSP

SSP

FOCUS
BIAS
33µ/6.3V R9

R11

0.1µ
GND

1M
C3

GND
VCC

VCC
0.01µ 5.5k 47k

20 19 18 17 16 15 14 13 12 11

FE_BIAS
RF O

TE
RFM
RFTC
VCC

AGCCONT

FE
RF I
LD_ON
AGCVTH

PD1

PD2

VEE
PD

VC
LD

EI
E
F
1 2 3 4 5 6 7 8 9 10

220k
33k

33k
R3
R2

R4
100µ/6.3V

220k
R5
100

33µ/6.3V

GND VC
I_V

I_V
I_V

270k
R5
11 10µH
VCC

LD

TRK E
PD

I_V
500

GAIN
1µ/6.3V

22k
C
A

E
B

VC 4.7k
R5

GND GND

VC

• For dual power supply ±1.75V

COMPUTER
COMPUTER

MICRO-
MICRO-
+1.75V

SSP
SSP

SSP

VEE
FOCUS
BIAS

33µ/6.3V R9
R11

0.1µ
GND

1M
C3
VCC

VCC

VEE

0.01µ 5.5k 47k

20 19 18 17 16 15 14 13 12 11
FE_BIAS
RF O

TE
RFM
RFTC
VCC

AGCCONT

FE
RF I
LD_ON
AGCVTH

PD1

PD2

VEE
PD

VC
LD

EI
E
F

1 2 3 4 5 6 7 8 9 10
220k
33k

33k
R3
R2

R4

100µ/6.3V
220k
R5

VEE GND
100

33µ/6.3V
I_V

I_V
I_V

270k
R5

11 10µH
VCC

LD

TRK E
PD

I_V
500

GAIN
1µ/6.3V

22k
C
A

E
B

GND
4.7k
R5

GND GND
VEE
GND

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

– 12 –
 CXA2550M/N

• LASER POWER CONTROL (LPC)

The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the
RF level fluctuations.
The RF O and RF I levels are compared and the larger of the two is smoothed by the RFTC's external CR.
This signal is then compared with the reference level.
The laser power is controlled by attaching an offset to VL according to the results of comparison with the
reference level.
Set the reference level to 670mV. (center voltage reference)
When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 1). The reference
level can be lowered by connecting the resistor between Pin 1 and the center output voltage or between Pin
20 and VCC.
The AGCCONT pin (pin 18) is used to switch the level of the laser power control circuit; OFF, ON (laser power
limit of 30%) and ON (laser power limit of 50%)

Note) For the laser power limit, 50% is recommended for PD IC; 30% for LC.

AGCCONT LPC LPC limit VL variable range

H (VCC) OFF — Approximately 1.27V
M (VC or OPEN) ON 30% Approximately 1.27V ± 350mV
L (VEE) ON 50% Approximately 1.27V ± 570mV

Notes on Operation

1. Power supply
The CXA2550M/N can be used either at dual power supply or single power supply. The table below shows the
connection of power supply for each case.

VCC VEE VC
Dual power supply +power supply –power supply GND
Single power supply Power supply GND OPEN

2. RF amplifier
In this circuit, the IC internal phase compensation value is set so as to support the voltage output-type pickup.
Therefore, when the current output-type pickup is used, the capacitance of optical pickup and leads etc. are
attached to PD1 and PD2 pins and oscillation may occur.

3. laser power control

The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the
RF level fluctuations. Therefore, use this circuit in the state where the focus servo is applied.
The laser life is shortened by increasing the laser power when the less light is reflected from the disc. It is
recommended that the typical laser power value is set lower to maintain the laser life.
Take care of the laser maximum ratings when using the laser power control circuit.

– 13 –
 CXA2550M/N

Package Outline Unit: mm

CXA2550M

20PIN SOP (PLASTIC) 300mil

+ 0.4 + 0.4
12.45 – 0.1 1.85 – 0.15

20 11
0.15

+ 0.2

5.3 – 0.1
+ 0.3
0.1 – 0.05

7.9 ± 0.4

6.9
1 10

0.5 ± 0.2
+ 0.1
0.45 ± 0.1 1.27 0.2 – 0.05

± 0.12 M

PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY / PHENOL RESIN

SONY CODE SOP-20P-L01 LEAD TREATMENT SOLDER PLATING

EIAJ CODE ∗SOP020-P-0300-A LEAD MATERIAL COPPER ALLOY

JEDEC CODE PACKAGE WEIGHT 0.3g

CXA2550N

20PIN SSOP (PLASTIC)

+ 0.2
∗6.5 ± 0.1 1.25 – 0.1

0.1
20 11
A
∗4.4 ± 0.1

6.4 ± 0.2

1 10
+ 0.1 + 0.05
0.22 – 0.05 0.65 ± 0.12 0.15 – 0.02

0.1 ± 0.1
0.5 ± 0.2

0° to 10°

DETAIL A
NOTE: Dimension “∗” does not include mold protrusion.

PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY RESIN

LEAD TREATMENT SOLDER / PALLADIUM

SONY CODE SSOP-20P-L01 PLATING
EIAJ CODE SSOP020-P-0044 LEAD MATERIAL COPPER / 42 ALLOY

JEDEC CODE PACKAGE WEIGHT 0.1g

– 14 –