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DATA SHEET
Philips Semiconductors
Preliminary specication
TEA5767HN
THERMAL CHARACTERISTICS DC CHARACTERISTICS AC CHARACTERISTICS INTERNAL PIN CONFIGURATION APPLICATION INFORMATION PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS PURCHASE OF PHILIPS I2C COMPONENTS
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
High sensitivity due to integrated low-noise RF input amplifier FM mixer for conversion to IF of the US/Europe (87.5 to 108 MHz) and Japanese (76 to 91MHz) FM band Preset tuning to receive Japanese TV audio up to 108 MHz RF Automatic Gain Control (AGC) circuit LC tuner oscillator operating with low cost fixed chip inductors FM IF selectivity performed internally No external discriminator needed due to fully integrated FM demodulator Crystal reference frequency oscillator; the oscillator operates with a 32.768 kHz clock crystal or with a 13 MHz crystal and with an externally applied 6.5 MHz reference frequency PLL synthesizer tuning system I2C-bus and 3-wire bus, selectable via pin BUSMODE 7-bit IF counter output via the bus 4-bit level information output via the bus Soft mute Signal dependent mono to stereo blend [Stereo Noise Cancelling (SNC)] Signal dependent High Cut Control (HCC) 3 ORDERING INFORMATION TYPE NUMBER TEA5767HN PACKAGE NAME HVQFN40 DESCRIPTION plastic, heatsink very thin quad at package; no leads; 40 terminals; body 6 6 0.85 mm VERSION SOT618-1
Soft mute, SNC and HCC can be switched off via the bus Adjustment-free stereo decoder Autonomous search tuning function Standby mode Two software programmable ports Bus enable line to switch the bus input and output lines into 3-state mode Automotive temperature range (at VCCA, VCC(VCO) and VCCD = 5 V). 2 GENERAL DESCRIPTION
The TEA5767HN is a single-chip electronically tuned FM stereo radio for low-voltage application with fully integrated IF selectivity and demodulation. The radio is completely adjustment-free and only requires a minimum of small and low cost external components. The radio can be tuned to the European, US and Japanese FM bands.
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
MIN. TYP. MAX. UNIT 2.5 2.5 2.5 6.0 560 2.1 3.0 3.0 3.0 8.4 3 750 1 3.0 56 19 2 5.0 5.0 5.0 10.5 6 940 2 3.9 80 26 108 +75 +85 V V V mA A A A mA A A MHz C C V
3.5
S200 S+200
LOW side 200 kHz selectivity f = 200 kHz; fRF = 76 to 108 MHz; note 1 HIGH side 200 kHz selectivity
32 39 60 54
36 43 75 60
90
dB dB mV dB
VAFL; VAFR left and right audio frequency VRF = 1 mV; L = R; f = 22.5 kHz; output voltage fmod = 1 kHz; de-emphasis = 75 s (S+N)/N maximum signal plus noise-to-noise ratio stereo channel separation VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; de-emphasis = 75 s; BAF = 300 Hz to 15 kHz VRF = 1 mV; R = L = 0 or R = 0 and L = 1 including 9% pilot; f = 75 kHz; fmod = 1 kHz; data byte 3 bit 3 = 0; data byte 4 bit 1 = 1
cs(stereo)
24
30
dB
THD Note
0.4
1. LOW side and HIGH side selectivity can be switched by changing the mixer from HIGH side to LOW side LO injection.
2002 Sep 13
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2002 Sep 13
R1 Igain 32 GAIN STABILIZATION AGND 33 22 nF VCCA 4.7 22 F VCCA 34 RESONANCE AMPLIFIER LIMITER DEMODULATOR POWER SUPPLY FM antenna I/Q-MIXER 1st FM 2 N1 IF CENTRE FREQUENCY ADJUST AGC 100 pF RFI1 35 L1 27 pF RFGND 36 47 pF RFI2 37 TAGC 38 4.7 nF LOOPSW 39 programmable divider output TUNING SYSTEM reference frequency divider output MUX SOFTWARE PROGRAMMABLE PORT pilot mono VCO I2C-BUS AND 3-WIRE BUS 4 VCOTANK2 5 VCC(VCO) VCCD 6 DGND 12 22 nF L3 L2 7 VCCD 8 DATA 9 CLOCK 1, 10, 20, 21, 30, 31, 40 n.c. 13 BUSENABLE 12 BUSMODE 11 WRITE/READ
Philips Semiconductors
BLOCK DIAGRAM
47 nF LIMDEC2 29
47 nF LIMDEC1 28
47 nF TIFC 27
33 nF Vref 26 MPXO 25
LEVEL ADC
19 PILFIL
1 nF
33 k 22 nF 22 nF
Iref
18 PHASEFIL 17 XTAL2
TEA5767HN
CRYSTAL OSCILLATOR
47
22 nF VCC(VCO)
VCCA
MHC283
D1
D2
Preliminary specication
TEA5767HN
The component list is given in Chapter 14. (1) Ccomp and Cpull data depends on crystal specification.
Philips Semiconductors
Preliminary specication
TEA5767HN
Philips Semiconductors
Preliminary specication
TEA5767HN
11 WRITE/READ
13 BUSENABLE
12 BUSMODE
14 SWPORT1
15 SWPORT2
18 PHASEFIL
16 XTAL1
17 XTAL2
n.c. 10 CLOCK DATA VCCD DGND VCC(VCO) VCOTANK2 VCOTANK1 CPOUT n.c. 9 8 7 6 5 4 3 2 1 LOOPSW 39 TAGC 38 RFGND 36 RFI1 35 VCCA 34 AGND 33 Igain 32 n.c. 31 n.c. 40 RFI2 37
20 n.c. 21 n.c. 22 VAFL 23 VAFR 24 TMUTE 25 MPXO 26 Vref 27 TIFC 28 LIMDEC1 29 LIMDEC2 30 n.c.
TEA5767HN
19 PILFIL
MHC282
7 7.1
The PLL synthesizer can be clocked externally with a 32.768 kHz, a 6.5 MHz or a 13 MHz signal via pin XTAL2. The crystal oscillator generates the reference frequency for: The reference frequency divider for the synthesizer PLL The timing for the IF counter The free-running frequency adjustment of the stereo decoder VCO The centre frequency adjustment of the IF filters. 7.5 PLL tuning system
The LNA input impedance together with the LC RF input circuit defines an FM band filter. The gain of the LNA is controlled by the RF AGC circuit. 7.2 FM mixer
The FM quadrature mixer converts the FM RF (76 to 108 MHz) to an IF of 225 kHz. 7.3 VCO
The varactor tuned LC VCO provides the Local Oscillator (LO) signal for the FM quadrature mixer. The VCO frequency range is 150 to 217 MHz. 7.4 Crystal oscillator
The crystal oscillator can operate with a 32.768 kHz clock crystal or a 13 MHz crystal. The temperature drift of standard 32.768 kHz clock crystals limits the operational temperature range from 10 to +60 C.
The PLL synthesizer tuning system is suitable to operate with a 32.768 kHz or a 13 MHz reference frequency generated by the crystal oscillator or applied to the IC from an external source. The synthesizer can also be clocked via pin XTAL2 at 6.5 MHz. The PLL tuning system can perform an autonomous search tuning function. 7.6 RF AGC
The RF AGC prevents overloading and limits the amount of intermodulation products created by strong adjacent channels.
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
The I2C-bus operates with a maximum clock frequency of 400 kHz. The I2C-bus mode is selected when pin BUSMODE is LOW, when pin BUSMODE is HIGH the 3-wire bus mode is selected. 8 I2C-BUS, 3-WIRE BUS AND BUS-CONTROLLED FUNCTIONS I2C-bus specication
The FM quadrature demodulator has an integrated resonator to perform the phase shift of the IF signal. 7.9 Level voltage generator and analog-to-digital converter
8.1
The FM IF analog level voltage is converted to 4 bits digital data and output via the bus. 7.10 IF counter
Information about the I2C-bus can be found in the brochure The I2C-bus and how to use it (order number 9398 393 40011). The standard I2C-bus specification is expanded by the following definitions. IC address C0: 1100000. Structure of the I2C-bus logic: slave transceiver. Subaddresses are not used. The maximum LOW-level input and the minimum HIGH-level input are specified to 0.2VCCD and 0.45VCCD respectively. The pin BUSMODE must be connected to ground to operate the IC with the I2C-bus. Note: The bus operates at a maximum clock frequency of 400 kHz. It is not allowed to connect the IC to a bus operating at a higher clock rate. 8.1.1 DATA TRANSFER
The IF counter outputs a 7-bit count result via the bus. 7.11 Soft mute
The low-pass filtered level voltage drives the soft mute attenuator at low RF input levels. The soft mute function can be switched off via the bus. 7.12 MPX decoder
The PLL stereo decoder is adjustment-free. The stereo decoder can be switched to mono via the bus. 7.13 Signal dependent mono to stereo blend
With a decreasing RF input level the MPX decoder blends from stereo to mono to limit the output noise. The continuous mono to stereo blend can also be programmed via the bus to an RF level depending switched mono to stereo transition. Stereo Noise Cancelling (SNC) can be switched off via the bus. 7.14 Signal dependent AF response
Data sequence: address, byte 1, byte 2, byte 3, byte 4 and byte 5 (the data transfer has to be in this order). The LSB = 0 of the address indicates a WRITE operation to the TEA5767HN. Bit 7 of each byte is considered as the MSB and has to be transferred as the first bit of the byte. The data becomes valid bitwise at the appropriate falling edge of the clock. A STOP condition after any byte can shorten transmission times. When writing to the transceiver by using the STOP condition before completion of the whole transfer: The remaining bytes will contain the old information If the transfer of a byte is not completed, the new bits will be used, but a new tuning cycle will not be started.
The audio bandwidth will be reduced with a decreasing RF input level. The function can be switched off via the bus. 7.15 Software programmable ports
Two software programmable ports (open-collector) can be addressed via the bus. The port 1 (pin SWPORT1) function can be changed with write data byte 4 bit 0 (see Table 13). Pin SWPORT1 is then output for the ready flag of read byte 1. 7.16 I2C-bus and 3-wire bus
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
The reference frequency divider of the synthesizer PLL is changed when the MSB in byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz. 8.1.2 POWER-ON RESET
At Power-on reset the mute is set, all other bits are set to LOW. To initialize the IC all bytes have to be transferred.
A(2)
P(3)
1. S = START condition. 2. A = acknowledge. 3. P = STOP condition. Table 2 S(1) Notes 1. S = START condition. 2. A = acknowledge. Table 3 IC address byte IC ADDRESS 1 Note 1. Read or write mode: a) 0 = write operation to the TEA5767HN b) 1 = read operation from the TEA5767HN. 1 0 0 0 0 0 MODE R/W(1) Read mode address (read) A(2) data byte 1
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
To do two consecutive read or write actions, pin WRITE/READ has to be toggled for at least one clock period. When a search tuning request is sent, the IC autonomously starts searching the FM band; the search direction and search stop level can be selected. When a station with a field-strength equal to or greater than the stop level is found, the tuning system stops and the ready flag bit is set to HIGH. When, during search, a band limit is reached, the tuning system stops at the band limit and the band limit flag bit is set to HIGH. The ready flag is also set to HIGH in this case. The software programmable output (SWPORT1) can be programmed to operate as a tuning indicator output. As long as the IC has not completed a tuning action pin SWPORT1 remains LOW. The pin becomes HIGH, when a preset or search tuning is completed or when a band limit is reached. The reference frequency divider of the synthesizer PLL is changed when the MSB in byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz. 8.3.2 POWER-ON RESET
The 3-wire bus controls the write/read, clock and data lines and operates at a maximum clock frequency of 1 MHz. Hint: By using the standby bit the IC can be switched into a low current standby mode. In standby mode the IC must be in the WRITE mode. When the IC is switched to READ mode, during standby, the IC will hold the data line down. The standby current can be reduced by deactivating the bus interface (pin BUSENABLE LOW). If the bus interface is deactivated (pin BUSENABLE LOW) without the standby mode being programmed, the IC maintains normal operation, but is isolated from the clock and data line. 8.3.1 DATA TRANSFER
Data sequence: byte 1, byte 2, byte 3, byte 4 and byte 5 (the data transfer has to be in this order). A positive edge at pin WRITE/READ enables the data transfer into the IC. The data has to be stable at the positive edge of the clock. Data may change while the clock is LOW and is written into the IC on the positive edge of the clock. Data transfer can be stopped after the transmission of new tuning information with the first two bytes or after each following byte. A negative edge at pin WRITE/READ enables the data transfer from the IC. The WRITE/READ pin changes while the clock is LOW. With the negative edge at pin WRITE/READ the MSB of the first byte occurs at pin DATA. The bits are shifted on the negative clock edge to pin DATA and can be read on the positive edge.
At Power-on reset the mute is set, all other bits are random. To initialize the IC all bytes have to be transferred.
2002 Sep 13
10
Philips Semiconductors
Preliminary specication
TEA5767HN
WRITE/READ
50%
CLOCK
50%
50%
tsu(write)
DATA
50%
valid data
MHC250
Table 4
Write mode DATA BYTE 2 DATA BYTE 3 DATA BYTE 4 DATA BYTE 5
Format of 1st data byte BIT 6 SM BIT 5 PLL13 BIT 4 PLL12 BIT 3 PLL11 BIT 2 PLL10 BIT 1 PLL9 BIT 0 (LSB) PLL8
Description of 1st data byte bits SYMBOL MUTE SM PLL[13:8] DESCRIPTION if MUTE = 1 then L and R audio are muted; if MUTE = 0 then L and R audio are not muted Search Mode: if SM = 1 then in search mode; if SM = 0 then not in search mode setting of synthesizer programmable counter for search or preset
Format of 2nd data byte BIT 6 PLL6 BIT 5 PLL5 BIT 4 PLL4 BIT 3 PLL3 BIT 2 PLL2 BIT 1 PLL1 BIT 0 (LSB) PLL0
Description of 2nd data byte bits SYMBOL PLL[7:0] DESCRIPTION setting of synthesizer programmable counter for search or preset
2002 Sep 13
11
Philips Semiconductors
Preliminary specication
TEA5767HN
BIT 1 MR
Table 10 Description of 3rd data byte bits BIT 7 6 and 5 4 3 2 1 0 SYMBOL SUD SSL[1:0] HLSI MS ML MR SWP1 Search Stop Level: see Table 11 HIGH/LOW Side Injection: if HLSI = 1 then HIGH side LO injection; if HLSI = 0 then LOW side LO injection Mono to Stereo: if MS = 1 then forced mono; if MS = 0 then stereo ON Mute Left: if ML = 1 then the left audio channel is muted and forced mono; if ML = 0 then the left audio channel is not muted Mute Right: if MR = 1 then the right audio channel is muted and forced mono; if MR = 0 then the right audio channel is not muted Software programmable port 1: if SWP1 = 1 then port 1 is HIGH; if SWP1 = 0 then port 1 is LOW DESCRIPTION Search Up/Down: if SUD = 1 then search up; if SUD = 0 then search down
Table 11 Search stop level setting SSL1 0 0 1 1 SSL0 0 1 0 1 not allowed in search mode low; level ADC output = 5 mid; level ADC output = 7 high; level ADC output = 10 SEARCH STOP LEVEL
Table 12 Format of 4th data byte BIT 7 (MSB) SWP2 BIT 6 STBY BIT 5 BL BIT 4 XTAL BIT 3 SMUTE BIT 2 HCC BIT 1 SNC BIT 0 (LSB) SI
Table 13 Description of 4th data byte bits BIT 7 6 5 4 3 2 1 0 SYMBOL SWP2 STBY BL XTAL SMUTE HCC SNC SI DESCRIPTION Software programmable port 2: if SWP2 = 1 then port 2 is HIGH; if SWP2 = 0 then port 2 is LOW Standby: if STBY = 1 then in standby mode; if STBY = 0 then not in standby mode Band Limits: if BL = 1 then Japanese FM band; if BL = 0 then US/Europe FM band if XTAL = 1 then fxtal = 32.768 kHz; if XTAL = 0 then fxtal = 13 MHz Soft MUTE: if SMUTE = 1 then soft mute is ON; if SMUTE = 0 then soft mute is OFF High Cut Control: if HCC = 1 then high cut control is ON; if HCC = 0 then high cut control is OFF Stereo Noise Cancelling: if SNC = 1 then stereo noise cancelling is ON; if SNC = 0 then stereo noise cancelling is OFF Search Indicator: if SI = 1 then pin SWPORT1 is output for the ready ag; if SI = 0 then pin SWPORT1 is software programmable port 1
2002 Sep 13
12
Philips Semiconductors
Preliminary specication
TEA5767HN
BIT 1
BIT 0 (LSB)
Table 15 Description of 5th data byte bits BIT 7 6 5 to 0 8.5 Reading data SYMBOL PLLREF DTC DESCRIPTION if PLLREF = 1 then the 6.5 MHz reference frequency for the PLL is enabled; if PLLREF = 0 then the 6.5 MHz reference frequency for the PLL is disabled if DTC = 1 then the de-emphasis time constant is 75 s; if DTC = 0 then the de-emphasis time constant is 50 s not used; position is dont care
WRITE/READ
50%
CLOCK
50%
50%
DATA
50%
50%
MHC249
2002 Sep 13
13
Philips Semiconductors
Preliminary specication
TEA5767HN
DATA BYTE 5
Table 17 Format of 1st data byte BIT 7 (MSB) RF BIT 6 BLF BIT 5 PLL13 BIT 4 PLL12 BIT 3 PLL11 BIT 2 PLL10 BIT 1 PLL9 BIT 0 (LSB) PLL8
Table 18 Description of 1st data byte bits BIT 7 6 5 to 0 SYMBOL RF BLF PLL[13:8] DESCRIPTION Ready Flag: if RF = 1 then a station has been found or the band limit has been reached; if RF = 0 then no station has been found Band Limit Flag: if BLF = 1 then the band limit has been reached; if BLF = 0 then the band limit has not been reached setting of synthesizer programmable counter after search or preset
Table 19 Format of 2nd data byte BIT 7 (MSB) PLL7 BIT 6 PLL6 BIT 5 PLL5 BIT 4 PLL4 BIT 3 PLL3 BIT 2 PLL2 BIT 1 PLL1 BIT 0 (LSB) PLL0
Table 20 Description of 2nd data byte bits BIT 7 to 0 SYMBOL PLL[7:0] DESCRIPTION setting of synthesizer programmable counter after search or preset
Table 21 Format of 3rd data byte BIT 7 (MSB) STEREO BIT 6 IF6 BIT 5 IF5 BIT 4 IF4 BIT 3 IF3 BIT 2 IF2 BIT 1 IF1 BIT 0 (LSB) IF0
Table 22 Description of 3rd data byte bits BIT 7 6 to 0 SYMBOL STEREO PLL[13:8] DESCRIPTION Stereo indication: if STEREO = 1 then stereo reception; if STEREO = 0 then mono reception IF counter result
Table 23 Format of 4th data byte BIT 7 (MSB) LEV3 BIT 6 LEV2 BIT 5 LEV1 BIT 4 LEV0 BIT 3 CI3 BIT 2 CI2 BIT 1 CI1 BIT 0 (LSB) 0
Table 24 Description of 4th data byte bits BIT 7 to 4 3 to 1 0 2002 Sep 13 SYMBOL LEV[3:0] CI[3:1] level ADC output Chip Identication: these bits have to be set to logic 0 this bit is internally set to logic 0 14 DESCRIPTION
Philips Semiconductors
Preliminary specication
TEA5767HN
BIT 1 0
BIT 0 (LSB) 0
Table 26 Description of 5th data byte bits BIT 7 to 0 8.6 Bus timing SYMBOL DESCRIPTION reserved for future extensions; these bits are internally set to logic 0
Table 27 Digital levels and timing SYMBOL Digital inputs VIH VIL Isink(L) VOL Timing fclk tHIGH tLOW tW(write) tW(read) tsu(clk) th(out) td(out) tsu(write) th(write) clock input frequency clock HIGH time clock LOW time pulse width for write enable pulse width for read enable clock set-up time read mode output delay time write mode set-up time write mode hold time I2C-bus enabled 3-wire bus enabled I2C-bus enabled 3-wire bus enabled I2C-bus enabled 3-wire bus enabled 3-wire bus enabled 3-wire bus enabled 3-wire bus enabled 3-wire bus enabled 3-wire bus enabled 3-wire bus enabled 1 300 1 300 1 1 300 10 100 100 400 1 100 kHz MHz s ns s ns s s ns ns ns ns ns HIGH-level input voltage LOW-level input voltage 0.45VCCD 500 IOL = 500 A 0.2VCCD 450 V V A mV PARAMETER CONDITIONS MIN. MAX. UNIT
2002 Sep 13
15
Philips Semiconductors
Preliminary specication
TEA5767HN
UNIT
C C V V V V
VALUE 29
UNIT K/W
2002 Sep 13
16
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT
V V V
Supply currents analog supply current operating VCCA = 3 V VCCA = 5 V standby mode VCCA = 3 V VCCA = 5 V ICC(VCO) voltage controlled oscillator supply current operating VVCOTANK1 = VVCOTANK2 = 3 V 560 VVCOTANK1 = VVCOTANK2 = 5 V 570 standby mode VVCOTANK1 = VVCOTANK2 = 3 V VVCOTANK1 = VVCOTANK2 = 5 V ICCD digital supply current operating VCCD = 3 V VCCD = 5 V standby mode; VCCD = 3 V bus enable line HIGH bus enable line LOW standby mode; VCCD = 5 V bus enable line HIGH bus enable line LOW 50 20 78 33 105 45 A A 30 11 56 19 80 26 A A 2.1 2.25 3.0 3.15 3.9 4.05 mA mA 1 1.2 2 2.2 A A 750 760 940 950 A A 3 3.2 6 6.2 A A 6.0 6.2 8.4 8.6 10.5 10.7 mA mA
2002 Sep 13
17
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT
DC operating points VCPOUT VXTAL1 VXTAL2 VPHASEFIL VPILFIL VVAFL VVAFR VTMUTE VMPXO VVref VTIFC VLIMDEC1 VLIMDEC2 VIgain VRFI1 VRFI2 VTAGC VRF = 0 V fRF = 98 MHz; VRF = 1 mV fRF = 98 MHz; VRF = 1 mV VRF = 0 V fRF = 98 MHz; VRF = 1 mV unloaded DC voltage data byte 4 bit 4 = 1 data byte 4 bit 4 = 0 data byte 4 bit 4 = 1 data byte 4 bit 4 = 0 0.1 1.64 1.68 1.64 1.68 0.4 0.65 720 720 1.5 680 1.45 1.34 1.86 1.86 480 0.93 0.93 1 VCC(VCO) 0.1 V 1.8 1.82 1.8 1.82 VCCA 0.4 1.3 940 940 1.8 950 1.65 1.54 2.1 2.1 580 1.13 1.13 2 V V V V V V mV mV V mV V V V V mV V V V
2002 Sep 13
18
Philips Semiconductors
Preliminary specication
TEA5767HN
12 AC CHARACTERISTICS VCCA = VVCOTANK1 = VVCOTANK2 = VCCD = 2.7 V; Tamb = 25 C; measured in the circuit of Fig.7; all AC values are given in RMS; unless otherwise specied. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Crystal oscillator CIRCUIT INPUT: PIN XTAL2 Vi(osc) Ri oscillator input voltage input resistance oscillator externally clocked oscillator externally clocked data byte 4 bit 4 = 0 data byte 4 bit 4 = 1 Ci input capacitance oscillator externally clocked data byte 4 bit 4 = 0 data byte 4 bit 4 = 1 CRYSTAL: 32.768 kHz fr f/fr C0 RS fr/fr(25 C) fr f/fr C0 Cmot RS fr/fr(25 C) Synthesizer PROGRAMMABLE DIVIDER Nprog programmable divider ratio data byte 1 = XX111111; data byte 2 = 11111111 data byte 1 = XX010000; data byte 2 = 00000000 Nstep programmable divider step size 2048 1 8191 series resonance frequency data byte 4 bit 4 = 1 frequency deviation shunt capacitance series resistance temperature drift 10 C < Tamb < +60 C 20 50 30 1.5 40 C < Tamb < +85 C 106 106 106 32.768 13 +20 3.5 80 +50 +30 4.5 3.0 100 +30 106 106 pF fF 106 106 pF k kHz 3.9 5 5.6 6 7.3 7 pF pF 2 230 3 330 4 430 k k 140 350 mV
CRYSTAL: 13 MHZ series resonance frequency data byte 4 bit 4 = 0 frequency deviation shunt capacitance motional capacitance series resistance temperature drift MHz
30 106
REFERENCE FREQUENCY DIVIDER Nref crystal oscillator divider ratio data byte 4 bit 4 = 0 data byte 5 bit 7 = 1; data byte 4 bit 4 = 0 data byte 4 bit 4 = 1 260 130 1
2002 Sep 13
19
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT A
CHARGE PUMP: PIN CPOUT Isink charge pump peak sink current charge pump peak source current 0.2 V < VCPOUT < VVCOTANK2 0.2 V; fVCO > fref Nprog 0.2 V < VCPOUT < VVCOTANK2 0.2 V; fVCO < fref Nprog 0.5
Isource
0.5
IF counter VRF NIF Nprecount Tcount(IF) RF input voltage for correct IF count IF counter length IF counter prescaler ratio IF counter period fxtal = 32.768 kHz fxtal = 13 MHz REScount(IF) IF counter resolution IFcount IF counter result for search tuning stop fxtal = 32.768 kHz fxtal = 13 MHz fxtal = 32.768 kHz fxtal = 13 MHz 31 32 12 7 64 18 ms ms kHz kHz HEX HEX M V bit
Software programmable ports PIN SWPORT1 Isink(max) maximum sink current data byte 4 bit 0 = 0; data byte 5 bit 0 = 0; VSWPORT1 < 0.5 V data byte 4 bit 0 = 1; VSWPORT1 < 5 V data byte 5 bit 7 = 0; VSWPORT1 < 0.5 V data byte 5 bit 1 = 1; VSWPORT1 < 5 V 500 A
Ileak(max)
+1
PIN SWPORT2 Isink(max) Ileak(max) maximum sink current maximum leakage current 500 1 +1 A A
FM signal channel FM RF INPUT Ri Ci input resistance at pins RFI1 and RFI2 to RFGND input capacitance at pins RFI1 and RFI2 to RFGND 75 2.5 100 4 125 6 pF
2002 Sep 13
20
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX. 3.5
UNIT V
IP3in
in-band 3rd-order intercept point related to VRFI1-RFI2 (peak value) out-band 3rd-order intercept point related to VRFI1-RFI2 (peak value) RF input voltage for start of AGC
81
84
dBV
IP3out
82
85
dBV
RF AGC VRF1 fRF1 = 93 MHz; fRF2 = 98 MHz; VRF2 = 50 dBV; V TMUTE 14 mV - ; note 1 ---------------------- < ------------------3 dB V V RF1 IF lter fIF BIF S+200 S200 S+100 S100 IR IF lter centre frequency IF lter bandwidth HIGH side 200 kHz selectivity LOW side 200 kHz selectivity HIGH side 100 kHz selectivity LOW side 100 kHz selectivity image rejection f = +200 kHz; ftune = 76 to 108 MHz; note 2 f = 200 kHz; ftune = 76 to 108 MHz; note 2 f = +100 kHz; ftune = 76 to 108 MHz; note 2 f = 100 kHz; ftune = 76 to 108 MHz; note 2 ftune = 76 to 108 MHz; VRF = 50 dBV 215 85 39 32 8 8 24 225 94 43 36 12 12 30 235 102 kHz kHz dB dB dB dB dB 66 72 78 dBV
FM IF level detector and mute voltage VRF Vstep PIN TMUTE Vlevel Vlevel(slope) Ro level output DC voltage slope of level voltage output resistance VRF = 0 V VRF = 3 V VRF = 10 to 500 V 1.55 1.60 150 280 1.65 1.70 165 400 1.80 1.85 180 520 V V mV -------------20 dB k RF input voltage for start of level ADC level ADC step size read mode data byte 4 bit 4 = 1 2 2 3 3 5 5 V dB
2002 Sep 13
21
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT
FM demodulator: pin MPXO VMPXO demodulator output voltage VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; de-emphasis = 75 s; BAF = 300 Hz to 15 kHz VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; de-emphasis = 75 s; BAF = 300 Hz to 15 kHz 60 75 90 mV
(S+N)/N
54
60
dB
THD
VRF = 1 mV; L = R; f = 75 kHz; fmod = 1 kHz; de-emphasis = 75 s VRF = 300 V; L = R; f = 22.5 kHz; fmod = 1 kHz; m = 0.3; de-emphasis = 75 s; BAF = 300 Hz to 15 kHz 40
0.5
1.5
AM
AM suppression
dB
demodulator output resistance demodulator output sink current mute = 3 dB; data byte 4 bit 3 = 1 VRF = 1 V; L = R; f = 22.5 kHz; fmod = 1 kHz de-emphasis = 75 s; BAF = 300 Hz to 15 kHz; data byte 4 bit 3 = 1
500 30
3 10
5 20
10 30
V dB
MPX decoder VAFL; VAFR left and right audio frequency output voltage left and right audio frequency output resistance left and right audio frequency output sink current THD < 3% left and right audio frequency output voltage difference stereo channel separation VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; de-emphasis = 75 s 60 75 90 mV
170
50
+1
dB dB
VRF = 1 mV; L = R; f = 75 kHz; 1 fmod = 1 kHz; de-emphasis = 75 s VRF = 1 mV; R = L = 0 or R = 0 and L = 1 including 9% pilot; f = 75 kHz; fmod = 1 kHz; data byte 3 bit 3 = 0; data byte 4 bit 1 = 1 22 24
cs(stereo)
30
dB
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT dB
THD
0.4
pilot
pilot suppression measured related to f = 75 kHz; at pins VAFL and VAFR fmod = 1 kHz; de-emphasis = 75 s stereo pilot frequency deviation VRF = 1 mV; read mode; data byte 3 bit 7 = 1 bit 7 = 0
50
dB
fpilot
1 2
3.6 3
5.8
kHz kHz dB
VRF = 1 mV
HIGH CUT CONTROL TCde-em de-emphasis time constant VRF = 1 mV data byte 5 bit 2 = 0 data byte 5 bit 2 = 1 VRF = 1 V data byte 5 bit 2 = 0 data byte 5 bit 2 = 1 MONO TO STEREO BLEND CONTROL cs(stereo) stereo channel separation VRF = 45 V; R = L = 0 or R = 0 4 and L = 1 including 9% pilot; f = 75 kHz; fmod = 1 kHz; data byte 3 bit 3 = 0; data byte 4 bit 1 = 1 VRF = 1 V; R = L = 0 or R = 0 and L = 1 including 9% pilot; f = 75 kHz; fmod = 1 kHz; data byte 3 bit 3 = 0; data byte 4 bit 1 = 0 10 16 dB 114 171 150 225 186 279 s s 38 57 50 75 62 93 s s
MONO TO STEREO SWITCHED cs(stereo) stereo channel separation switching from mono to stereo with increasing RF input level stereo channel separation switching from stereo to mono with decreasing RF input level 24 dB
cs(stereo)
VRF = 20 V; R = L = 0 or R = 0 and L = 1 including 9% pilot; f = 75 kHz; fmod = 1 kHz; data byte 3 bit 3 = 0; data byte 4 bit 1 = 0
dB
2002 Sep 13
23
Philips Semiconductors
Preliminary specication
TEA5767HN
MAX.
UNIT
Tuning mute
mute mute(R) mute(L) Notes 1. VRF in Fig.7 is replaced by VRF1 + VRF2. The radio is tuned to 98 MHz (HIGH side injection). 2. LOW side and HIGH side selectivity can be switched by changing the mixer from HIGH side to LOW side LO injection. VAFL and VAFR muting depth data byte 1 bit 7 = 1 VAFR muting depth VAFL muting depth data byte 3 bit 1 = 1 data byte 3 bit 2 = 1 60 80 80 dB dB dB
10
MHC247
10 20 30 40 50 60 70 80 103
(4)
2.0
(5)
(6)
102
101
10
102
VRF (mV)
Mono signal; soft mute on. Left channel with modulation left; SNC on. Right channel with modulation left; SNC on. Noise in mono mode; soft mute on. Noise in stereo mode; SNC on. Total harmonic distortion; f = 75 kHz; L = R; fmod = 1 kHz.
Fig.5 FM characteristics 1.
2002 Sep 13
24
Philips Semiconductors
Preliminary specication
TEA5767HN
10 0
MHC309
(1)
10 20 30 40 50 60 70 80 103
(3)
(2)
102
101
10
102
VRF (mV)
(1) Mono signal; no soft mute. (2) Noise in mono mode; no soft mute. (3) Level voltage; VCCA = 2.7 V.
Fig.6 FM characteristics 2.
2002 Sep 13
25
Philips Semiconductors
Preliminary specication
TEA5767HN
270 2
MHC285
3 4
VCOTANK1 VCOTANK2
120
4 120
MHC286
5 6 7 8
MHC287
CLOCK
270 9 6
MHC288
10
n.c.
2002 Sep 13
26
Philips Semiconductors
Preliminary specication
TEA5767HN
270 11 6
MHC289
12
BUSMODE
270 12 6
MHC290
13
BUSENABLE
150 13 6
MHC291
14
SWPORT1
150
14
MHC292
15
SWPORT2
150
15
MHC293
16 17
XTAL1 XTAL2
16 17
MHC294
2002 Sep 13
27
Philips Semiconductors
Preliminary specication
TEA5767HN
EQUIVALENT CIRCUIT
33
MHC295
19
PILFIL
270 19
33
MHC296
20 21 22
33
MHC297
23
VAFR
10 23
33
MHC298
24
TMUTE
24 1 k
33
MHC299
2002 Sep 13
28
Philips Semiconductors
Preliminary specication
TEA5767HN
150
25
33
MHC300
26
Vref
26
MHC301
33
27
TIFC
40 k
27
MHC302
28
LIMDEC1
270 28
MHC303
29
LIMDEC2
270
29
MHC304
30 31
n.c. n.c. 29
2002 Sep 13
Philips Semiconductors
Preliminary specication
TEA5767HN
EQUIVALENT CIRCUIT
MHC305
33 34 35 36 37
36
MHC306
38
TAGC
38
36
MHC307
39
LOOPSW
39
MHC308
40
n.c.
14 APPLICATION INFORMATION Table 28 Component list for Figs 1 and 7 COMPONENT R1 D1 and D2 L1 L2 and L3 XTAL13 Cpull XTAL32.768 PARAMETER resistor with low temperature coefcient varicap for VCO tuning RF band lter coil VCO coil 13 MHz crystal pulling capacitor for NX4025GA 32.768 kHz crystal VALUE TOLERANCE 18 k 33 nH 10 pF 1% 2% TYPE RC12G BB202 Qmin = 40 Qmin = 40 NX4025GA MANUFACTURER Philips Philips
120 nH 2%
2002 Sep 13
30
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R1 Igain 32 GAIN STABILIZATION AGND 33 22 nF VCCA 4.7 22 F VCCA 34 RESONANCE AMPLIFIER LIMITER DEMODULATOR POWER SUPPLY I/Q-MIXER 1st FM 2 N1 IF CENTRE FREQUENCY ADJUST AGC 100 pF RFI1 35 40 VRF 4.7 nF LOOPSW 39 programmable divider output TUNING SYSTEM reference frequency divider output MUX SOFTWARE PROGRAMMABLE PORT pilot mono VCO I2C-BUS AND 3-WIRE BUS 4 VCOTANK2 5 VCC(VCO) VCCD 6 DGND 12 22 nF L3 L2 7 VCCD 8 DATA 9 CLOCK 1, 10, 20, 21, 30, 31, 40 n.c. 13 BUSENABLE 12 BUSMODE 11 WRITE/READ L1 27 pF RFGND 36 47 pF RFI2 37 TAGC 38
Philips Semiconductors
47 nF LIMDEC2 29
47 nF LIMDEC1 28
47 nF TIFC 27
33 nF Vref 26 MPXO 25
LEVEL ADC
19 PILFIL
1 nF
33 k 22 nF 22 nF
Iref
18 PHASEFIL 17 XTAL2
TEA5767HN
CRYSTAL OSCILLATOR
47
22 nF VCC(VCO)
31
VCCA
MHC284
D1
D2
Preliminary specication
TEA5767HN
Philips Semiconductors
Preliminary specication
TEA5767HN
SOT618-1
detail X
e1 e 11 L 10 21 e
1/2 e
C b 20
v M C A B w M C
y1 C
Eh pin 1 index
1/2 e
e2
30 40 Dh 0 2.5 scale Eh 4.25 3.95 e 0.5 e1 4.5 e2 4.5 L 0.50 0.30 v 0.2 w 0.1 y 0.05 y1 0.1 5 mm 31 X
DIMENSIONS (mm are the original dimensions) A UNIT max. mm 1.00 A4 max. 0.80 b 0.35 0.18 D (1) 6.05 5.95 Dh 4.25 3.95 E (1) 6.05 5.95
Note 1. Plastic or metal protrusions of 0.076 mm maximum per side are not included. OUTLINE VERSION SOT618-1 REFERENCES IEC JEDEC MO-220 EIAJ EUROPEAN PROJECTION ISSUE DATE 01-06-07 01-08-08
2002 Sep 13
32
Philips Semiconductors
Preliminary specication
TEA5767HN
If wave soldering is used the following conditions must be observed for optimal results: Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. For packages with leads on two sides and a pitch (e): larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 16.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 16.2 Reow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. 16.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2002 Sep 13
33
Philips Semiconductors
Preliminary specication
TEA5767HN
SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 17 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS This data sheet contains data from the objective specication for product development. Philips Semiconductors reserves the right to change the specication in any manner without notice. This data sheet contains data from the preliminary specication. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specication without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specication. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notication (CPCN) procedure SNW-SQ-650A. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
Preliminary data
Qualication
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
2002 Sep 13
34
Philips Semiconductors
Preliminary specication
TEA5767HN
Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2002 Sep 13
35
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales ofces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
753503/01/pp36
Sep 13