InternationalJournalofAutomationandPowerEngineering(IJAPE)Volume2Issue4,May2013www.ijape.

org
137
DesignofaReferenceVoltageSourceBased
onComplementaryThresholdVoltageof
NMOSandPMOS
ShulinLiu
*1
,JingJi
2
*1,2
SchoolofElectricalandControlEngineering,XianUniversityofScience&Technology
Xian,China
*1
lsigma@163.com;
2
jj2007032@126.com

Abstract
Anewreferencevoltagesourceispresentedaccordingtothe
linear relationship between temperature and the threshold
voltages of NMOS and PMOS. Compared with ordinary
CMOSbandgapreference,thedesignedcircuitdoesntneed
parasitic transistor, and the process parameters are easier to
control. In addition, the output reference voltage has a
theoretical zero temperature coefficient at any point within
circuit normal operating temperature range, and its value
can be arbitrarily adjusted. The simulation results indicate
that the circuit has better temperature stability and high
powersupplyrejectionratio.
Keywords
ReferenceVoltageSource;NMOS;PMOS;ThresholdVoltage
I nt r oduc t i on
As an important unit module in analog circuits,
reference voltage source is widely used in oscillator,
erroramplifier,DACandADC,etc.Itsoutputvoltage
quality directly affects the stable and reliable work of
relevant circuit. The output voltage of ideal reference
voltage source should be reliable and has excellent
antiinterference ability. Meanwhile, it doesnt change
with temperature and power fluctuations, and has
nothingtodowiththeprocessparameters.
At present, bandgap reference is usually used to
generate reference voltage, which gets a voltage with
zero temperature coefficient through the weighted
sum of positive temperature coefficient of thermal
voltage VT and negative temperature coefficient of
transistor base emitter junction voltage VBE in some
way. However, since the nonlinearity of VBE
temperature coefficient, reference voltage has a zero
temperature coefficient only at a point within circuit
normal operating temperature range. In order to
obtainmoreaccuratereferencevoltage,itisnecessary
to provide secondorder or even higherorder
compensation, but this increases the difficulty in
circuit design and can not fundamentally solve the
problemofnonlineartemperaturecoefficientofVBE.In
addition, VBE is mostly generated by parasitic
transistorinCMOSprocess,whichleadstolargerarea,
higher power consumption and also affects the whole
circuitperformance.
To this end, a full CMOS reference voltage source
withoutparasitictransistorispresented.Itutilizesthe
complementation of the linear relationship between
MOSthresholdvoltagesandtemperaturetogeneratea
temperatureindependent reference voltage. Not only
canithaveazerotemperaturecoefficientatanypoint
within circuit normal operating temperature range,
butalsothevoltagevaluecanbearbitrarilyadjusted.
The Pr i nc i pl e of Ref er enc e Vol t age Based
on Compl ement ar y Thr eshol d
Firstly,thetemperaturecharacteristicsofMOSrelated
parameters are analyzed. MOSFET can be biased in
the linear region or the saturation region during
normal operation. The channel length modulation
effect can be ignored if channel is long. At this point,
inthelinearregion,thecurrentis
( ) | |
2
2
2
DS DS th GS
ox
DS
V V V V
L
W C
I
|
|
.
|

\
|
=

(1)
Thecurrentinthesaturationregionis:
( )
2
2
th GS
ox
DS
V V
L
W C
I
|
|
.
|

\
|
=

(2)
In (2), is carrier mobility, Coxis the gate capacitance
per unit area, (W/L) is the ratio of channel width to
length, Vth is threshold voltage. Among these
parameters,onlyVthandarerelatedtotemperature.
www.ijape.orgInternationalJournalofAutomationandPowerEngineering(IJAPE)Volume2Issue4,May2013
138
According to the model BSIM3v3, the relationship
betweenthresholdvoltageVthandtemperatureis:

( )
( )
|
|
.
|

\
|

|
|
.
|

\
|
+ + + = 1
2
1
1
norm
bseff T
eff
l t
T Tnorm th th
T
T
V K
L
K
K V T V
(3)
TnormisthetemperatureatwhichMOSparametersare
extracted,Vth(Tnorm)isthethresholdvoltageofMOSFET
under the temperature Tnorm, KT1 is temperature
coefficient for threshold voltage, Kt1l is channel length
dependence of the temperature coefficient for
thresholdvoltage,Leffiseffectivechannellength,KT2is
bodybiascoefficientofVthtemperatureeffect,Vbseffis
effective substrate bias voltage. As can be seen from
3, Vthis linear with temperature. On the contrary,
has a nonlinear relationship with temperature, the
nonlinearfunctionalrelationshipisgivenby:
( )
( )
te
norm
Tnorm
T
T
T

|
|
.
|

\
|
=
0
(4)
Where, 0(Tnorm) is the carrier mobility under
temperatureTnorm,teistemperatureindexforcarrier
mobility, generally in the range of 1.5 to 2.0. If the
referencevoltageisrelatedto,thesituationissimilar
toVBE.Azerotemperaturecoefficientisdifficulttobe
obtained within the entire temperature range because
isnonlinearwithtemperature.Therefore,somekind
of circuit is conceived to offset the influence of and
generates two voltages which have a linear
relationship with threshold voltages of NMOS and
PMOS respectively, and then the temperature
independent reference voltage is obtained by using
weightedsummation.PrincipleisshowninFIG.1:

FIG.1THESCHEMATICOFREFERENCEVOLTAGEBASEDON
COMPLEMENTARYTHRESHOLD
Where, |VP| and VN have linear relationship with
threshold voltages of PMOS and NMOS respectively,
whicharealsolinearwithtemperature.Aslongasthe
weighting coefficient is set reasonable, not only can
the reference voltage VREF be independent of
temperature,butalsothevaluecanbesetasrequired,
thevalueis:
N P REF
V K V K V
2 1
+ = 5
Spec i f i c Ci r c ui t Desi gn
A specific circuit is designed to counteract mobility
and produce voltages of VP and VN, shown in FIG.2,
where, Module 1 is voltage VP generating circuit,
Module2isvoltageVNgeneratingcircuit,Module3is
the weighted summation circuit. The temperature
coefficients offset each other after VP and VN making
the weighted summation. Finally, a reference voltage
withzerotemperaturecoefficientisobtained.

FIG.2THECIRCUITMODULEOFREFERENCEVOLTAGE
SOURCEBASEDONCOMPLEMENTARYTHRESHOLD
DesignofVoltageVPGeneratingCircuit
All node voltagesin Module1arezero before power
on.Afterpoweron,thenoninverting/invertinginput
and output voltages of amplifier A1 are still zero, M3
and M4 are closed and remain that state without
additional excitations. Therefore, It is necessary to
enhancethevoltageVabyaddingstartuptransistor
M1 to make the circuit work normally. When Va is
stable, its voltage must be higher than PMOS
threshold|Vthp|inordertomakeM4turnedon,but
that results in M3 working in linear region. If voltage
VST1 is set to a value greater than |Vthp| and less than
|2Vthp|, M1 is turned off after the circuit is stable.
OperationalamplifierA1containsanegativefeedback
made of R1, R2 and a positive feedback made of M3,
M4.Through reasonably setting R1, R2 value and M3,
M4 width to length ratio to make negative feedback
effectismuchlargerthanpositivefeedback,sothatA1
is in the deep negative feedback state. If temporary
excludingtheinputoffsetvoltage,wegetEquation(6):
P a a
V
R R
R
V V
2 1
2
'
+
= ~ (6)
InternationalJournalofAutomationandPowerEngineering(IJAPE)Volume2Issue4,May2013www.ijape.org
139
M4 is always in the saturation region because it is
connected as a diode. Since the currents through M5
and M6 are equal, and according to (1) and (2), the
followingequationscanbeobtained:
( )( ) ( )
( )

=
+
|
|
.
|

\
|
=
(

+
|
|
.
|

\
|
=
4 3
2
'
4
4
2
' '
3
3
2
2
2
I I
V V
L
W C
I
V V V V V V
L
W C
I
thp a
ox p
a P a P thp P
ox p

(7)
Define
2 1
2
1
R R
R
+
= o ,
3 4
1
|
|
.
|

\
|
|
|
.
|

\
|
=
L
W
L
W
| , taking (6)
into(7)canobtain:

( ) ( )
( )
thp P
V V
1
2
1
1 1 1 1
1 1
1 1 1 1
| o
| o | o
+
+ + +
= (8)
As can be seen, carrier mobility is offset. Although
R1andR2arerelatedtotemperature,butthroughthe
reasonable layout design to make they are consistent
with the changes of process and temperature, 1 and
1 can be considered to be constants independent of
temperature. Because Vthp is linear with temperature,
so voltage VP is a linear function about temperature
andcanbeadjustedbysettingdifferent1and1.
DesignofVoltageVNGeneratingCircuit
Similarly, in Module 2, M2 is the start up transistor.
Whencircuitisstable,M5andM6thatconnectedinto
diode forms are both working in saturation region,
voltage Vb is higher than NMOS threshold Vthn. If
voltage VST2 is set to a value greater than | Vthp| and
less than Vthn +|Vthp|, M2 is turned off after circuit is
stable. Through reasonably setting R3, R4 value and
M5,M6widthtolengthratio,operationalamplifierA2
can work in the deep negative feedback state. If
temporary excluding the input offset voltage, we get
Equation(9)too:
N b b
V
R R
R
V V
4 3
4
'
+
= ~ (9)
Because the currents through M5 and M6 are equal,
andaccordingtoEquation(2),wecanobtain:

( )
( )

|
|
.
|

\
|
=

|
|
.
|

\
|
=
6 5
2
'
6
6
2
'
5
5
2
2
I I
V V
L
W C
I
V V V
L
W C
I
thn b
ox n
thn b N
ox n

(10)
Define
4 3
4
2
R R
R
+
= o ,
5 6
2
|
|
.
|

\
|
|
|
.
|

\
|
=
L
W
L
W
| , taking (9)
into(10)canget:
( )
( )
thn N
V V
2 2
2
1 1
1
| o
|
+

= (11)
Also, carrier mobility is offset; 2 and 2 can be
considered to be constants independent of
temperature. Because Vthn is linear with temperature,
so voltage VN whose value can be adjusted by setting
different 2 and 2 is a linear function about
temperature. It needs to be noted that the impact of
body effect on M5 threshold voltage is ignored to
simplify the calculation. However, even considering
thebodyeffect,itonlyneedstomodifyVbseffin(3).Vthn
remains a linear relationship with temperature
althoughVthntemperaturecoefficientischanged.
DesignofWeightedSummationCircuit
By (8) and (11) can be seen that VP and VN are both
negative temperature coefficient, so the weighted
summation circuit can be achieved by subtractor. As
shown in FIG.2, the weighted summation circuit is
constitutedbyR5,R6,R7andoperationalamplifierA3.
BecauseA3worksinthedeepnegativefeedbackstate,
so the potential of noninverting terminal is equal to
that of inverting terminal. Apply KCL law to R5 ~ R7
parallelnodes

7 6 5
R
V V
R
V
R
V V
REF P P P N

+ =

(12)
Through simplification, the subtractor low frequency
transferfunctionis:
(
(

|
|
.
|

\
|
+ + =
N P REF
V V
R
R
R
R
R
R
V
7
5
6
5
5
7
1 (13)
TheVREFtemperaturecoefficientis
(
(

c
c

c
c

|
|
.
|

\
|
+ + =
c
c
T
V
T
V
R
R
R
R
R
R
T
V
N P REF
7
5
6
5
5
7
1 (14)
It is easy to see if dont consider temperature drift
causedbyoperationalamplifierdisorder,wecanmake
temperaturecoefficientsofVPandVNequalandoffset
through reasonably setting 1212 and values
of R5 ~ R7.Thereby VREF becomes a reference voltage
whichhastheoreticalzerotemperaturecoefficientand
canbeadjustedbyselectingR7andR5resistanceratio.
www.ijape.orgInternationalJournalofAutomationandPowerEngineering(IJAPE)Volume2Issue4,May2013
140
DesignofOperationalAmplifier
In previous discussion, in order to make (6) and (9)
correct, operational amplifiers work in the deep
negative feedback state. The operational amplifiers
require high openloop gain to ensure that conditions
in actual design. At the same time, in order to further
improve the accuracy, stability of reference voltage
and increase output range as far as possible,
operational amplifiers also need high common mode
rejection ratio and wide linear range. Therefore, a
foldedcascodestructureasshowninFIG.3isselected.
Besides amplifier stage, the bias of static current also
adopts cascode structure to offset fluctuations of
supply voltage Vanalog and enhance stability; M15 and
M16constitutePMOSdifferentialpairtoexpandinput
voltage range; M17, M18 and M21 , M22 provide the
bias current to secondary cathodeinput amplifier, at
the same time, as high impedance active load, they
improve the openloop gain; Output terminal uses
PMOS M27 as a source follower to reduce the output
impedance and improve output voltage swing; In
order to make operational amplifiers work stably in
high gain and wide linear range, C1 is used in this
circuit to compensate frequency. Verified by
simulation, the openloop gain reaches 105db, CMRR
and PSRR are above 150db, openloop bandwidth is
around10kHz,whichensurestheaccuracy,rangeand
stabilityofoutputreferencevoltage.

FIG.3OPERATIONALAMPLIFIERCIRCUIT
DeviceParametersDesign
Based on the above analysis, this circuit is designed
based on the 0.5m CMOS process. Because the
foldedcascode amplifier in circuit is typical
operational amplifier, so only parameters of M1 ~ M6
and R1 ~ R7 are given in TABLE 1. The pairs of M3,
M4andM5,M6arealldesignedtohavesamechannel
width.
TABLE1PARTOFTHEDEVICEPARAMETERS
Itisnecessarytoincreasesizeappropriatelyandtryto
place devices in adjacent locations to reduce
lithography error and enhance the matching. Channel
widthtolengthratioofM1andM2arerelativelysmall,
inordertominimizestartuplosses.
Si mul at i on Resul t s and Di sc ussi on
SimulationResults
The reference voltage source is simulated by Hspice,
andtherelevantresultsareshowninFIG.4andFIG.5.
AscanbeseenfromFIG.4,undertheconditionofthe
inputvoltageis3.6V,whenenvironmenttemperature
changesfrom50Cto+150C,referencevoltageVREF
only changes from 1.218V to 1.228V. This circuit
significantly reduces the error caused by nonlinear of
triode VBE in conventional bandgap reference and
shows a fairly good temperature characteristics, the
temperaturecoefficientis:
( )
K
V T
V
TC
REF
REF
F
6
10 9 . 40
50 150 22 . 1
218 . 1 228 . 1

=
+

=
A
A
=
(15)
From FIG.5, we can see that VREF only changes from
1.221Vto1.222VwhenpowersupplyvoltageVanalogis
from 3 V to 4.2 V. Obviously, the circuit has better
powersupplyrejectioncharacteristic.Accordingtothe
above parameters, the sensitivity of reference voltage
to the power supply voltage fluctuations is given
by:
( )
( )
% 246 . 0
6 . 3 0 . 3 2 . 4
22 . 1 221 . 1 222 . 1
log log
log
=

=
A
A
=
ana ana
REF REF
V
V
V V
V V
S
REF
ana
(16)
In addition, the value of the reference voltage source
can be adjusted arbitrarily, thus, the flexibility of
designingcircuitisincreasedgreatly.

FIG.4WAVEFORMOFREFERENCEVOLTAGEVARIESWITH
TEMPERATURE
Device
Width/
m
Length/
m
Device
Resistance
/K
M1 1 20 R1 60
M2 1 15 R2 120
M3 2.4 24 R3 120
M4 2.4 3.6 R4 60
M5 6 54.6 R5 50
M6 6 3.6 R6 124.5
R7 144.275
InternationalJournalofAutomationandPowerEngineering(IJAPE)Volume2Issue4,May2013www.ijape.org
141

FIG.5WAVEFORMOFREFERENCEVOLTAGEVARIESWITH
SUPPLYVOLTAGEVANALOG
DiscussionofOffsetVoltageinOperational
Amplifier
In order to ensure the correctness of (6) and (9), the
inputoffsetvoltageofopampisnotconsideredinthe
above analysis. Actually, the input offset voltage has
an important influence on the performance of
reference voltage source. Especially in CMOS process,
the problem of offset voltage is more serious than
bipolar process, the analysis is as follows. Firstly,
assuming the input offset voltages of A1~A3 are VOS1,
VOS2 and VOS3 respectively, take A1 as an example,
Equation(6)becomes:
|
|
.
|

\
|
+ = +
+
= + ~
1
1
1 1
2 1
2
1 '
1
OS P OS P OS a a
V V V V
R R
R
V V V
o
o
17
This can be seen as A1 works without offset , the
output voltage increases VOS1/1 compared with
previous,so

( ) ( )
( ) 1
1
1
2
1
1 1 1 1
1 1
1 1 1 1
o
| o
| o | o
OS
thp P
V
V V +
+
+ + +
=
(18)
Due to VOS1<<Vthp, VOS1 has less effect on VP, we can
appropriately increase 1 to further reduce the effects
of VOS1. But at the same time, the linear coefficient of
Vthp is changing, so the design needs to be balanced.
When the ratio of polynomial contains VOS1 to
polynomial contains Vthp is the minimum in possible
range, the influence caused by offset voltage is the
least. Similarly, for A2 and A3, (11) and (13)
respectivelybecome:
( )
( ) 2
2
2 2
2
1 1
1
o
| o
|
OS
thn N
V
V V +
+

= (19)
( )
(
(

+
|
|
.
|

\
|
+ + =
N OS P REF
V V V
R
R
R
R
R
R
V
3
7
5
6
5
5
7
1 (20)
TheanalysisoftheinfluenceofVOS2onVNisidentical
with that of VOS1 on VP. As can be seen from (20),by
using a weighted subtraction to VP and VN , and
selecting appropriate value of R5 ~ R7 and 12 ,
circuit can partially or even largely counteract the
influence caused by offset voltage. Therefore,
trimming can be increased to adjust them in layout
design.
Conc l usi ons
The reference voltage source based on the standard
CMOSprocessisdescribedinthispaper.Accordingto
the linear relationship between temperature and the
threshold voltages of NMOS and PMOS, VP and VN
are obtained, which are not only independent of the
power supply and mobility, but also change linearly
with the threshold voltages of PMOS and NMOS.
Then an adjustable reference voltage can be obtained
by subtracting two voltages to offset the temperature
coefficient. The designed circuit makes static power
consumption and layout area reduced and
fundamentally overcomes the problem that the
temperature coefficient of baseemitter junction
voltage VBE is nonlinear in conventional bandgap
reference. Its performance has been verified reaching
the design goal by Hspice simulation. This circuit is
successfullyappliedtoaBuckconverter,themeasured
results are in accordance with theory, which proves
theschemeiscorrectandfeasible.
REFERENCES
Allen, Phillip E, Holberg, Douglas R. CMOS Analog Circuit
Design (Second Edition)[M]. New York: Oxford
UniversityPress,2002.
Kang, Huaguang, Chen, Daqin. Electronic Technology
Foundation: Analog Part ( Fifth Edition)[M]. Beijing:
HigherEducationPress,2005.
Liu, Weidong, Jin, Xiaodong, Xi, Xuemei, Etc. BSIM3v3.3
MOSFET Model Users Manual [M].Berkeley:
Department of Electrical Engineering and Computer
SciencesofUniversityofCalifornia,2005.
Qiu,Guanyuan.Circuits(FourthEdition)[M].Beijing:Higher
EducationPress,2003.
Razavi, Behzad. Design of Analog CMOS Integrated
Circuits[M].Xian:XianJiaoTongUniversityPress,2004.