UNISONIC TECHNOLOGIES CO.

, LTD UC3842B/3843B
HIGH PERFORMANCE CURRENT MODE CONTROLLERS
DESCRIPTION

LINEAR INTEGRATED CIRCUIT

The UTC UC3842B/3843B are specifically designed for off-line and dc-to-dc converter applications offering the designer a cost-effective solution with minimal external components. The UC3842B has UVLO thresholds 16V (on) and 10V(off), ideally suited for off-line converters. The UC3843B is tailored for lower voltage applications having UVLO thresholds of 8.4V(on) and 7.6V(off).

FEATURES

* Trimmed oscillator for precise frequency control * Oscillator frequency guaranteed at 250kHz * Current mode operation to 500kHz * Automatic feed forward compensation * Latching PWM for cycle-by-cycle current limiting * Internally trimmed reference with undervoltage lockout * High current totem pole output * Undervoltage lockout with hysteresis * Low startup and operating current

ORDERING INFORMATION
Ordering Number Lead Free Halogen Free UC3842BL-D08-T UC3842BP-D08-T UC3842BL-S08-R UC3842BP-S08-R UC3842BL-S08-T UC3842BP-S08-T UC3843BL-D08-T UC3843BP-D08-T UC3843BL-S08-R UC3843BP-S08-R UC3843BL-S08-T UC3843BP-S08-T Package DIP-8 SOP-8 SOP-8 DIP-8 SOP-8 SOP-8 Packing Tube Tape Reel Tube Tube Tape Reel Tube

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PIN CONFIGURATION

LINEAR INTEGRATED CIRCUIT

COMP

VREF

VFB

VCC

CS

OUTPUT

RTCT

GND

PIN DESCRIPTIONS
PIN NAME COMP VFB CS RTCT GND OUTPUT VCC VREF I/O O I I I O O DESCRIPTION Error amp output to provide loop compensation maintaing VFB at 2.5V Error amp inverting input, The non-inverting input of error amp is 2.5V band gap reference Current sense input to PWM control gate drive of output To set oscillator frequency and maximum output duty cycle Power ground To direct drive power MOSFET Power supply 5V regulated output provides charging current for CT through RT

PIN NO. 1 2 3 4 5 6 7 8

BLOCK DIAGRAM

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ABSOLUTE MAXIMUM RATINGS(TA=25, unless otherwise specified)

PARAMETER SYMBOL RATINGS UNIT Total Power Supply and Zener Current (ICC + IZ) 30 mA Output Current, Source or Sink (Note 2) IO 1.0 A Output Energy (capacitive load per cycle) W 5.0 J Current Sense and Voltage Feedback Inputs VIN -0.3 ~ +5.5 V Error Amp. Output Sink Current IO(SINK) 10 mA DIP-8 1250 mW Power Dissipation PD SOP-8 800 mW Operating Junction Temperature TJ +150 Operating Temperature TOPR 0 ~ +70 Storage Temperature TSTG -65 ~ +150 Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. 2. Maximum Package power dissipation limits must be observed.

THERMAL DATA
PARAMETER SYMBOL DIP-8 SOP-8 JA RATINGS 100 156 UNIT C/W C/W

Junction to Ambient

ELECTRICAL CHARACTERISTICS
MIN 4.9 TYP 5.0 2.0 3.0 0.2 50 5 -85 52 250 0.2 0.5 1.6 7.8 7.6 8.3 8.3 8.8 8.8 MAX 5.1 20 25 5.18 UNIT V mV mV mV/ V uV mV mA

(0 TA70, VCC=15V (Note 1), RT=10k, CT=3.3nF, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS REFERENCE SECTION IO=1.0mA, TJ =25 Output Voltage VREF Line Regulation VLINE VCC=12V ~ 25V Load Regulation VLOAD IO=1.0mA ~ 20mA Temperature Stability TS Total Output Variation VREF Line, Load, Temperature F=10kHz ~ 10Hz, TJ =25 Output Noise Voltage eN TA=125,1000Hrs Long Term Stability S Output Short Circuit Current ISC OSCILLATOR SECTION TJ =25 TA=0 ~ 70 Frequency F TJ =25 (RT=6.2k,CT=1.0nF) Frequency Change with Voltage fOSC/V 12 VCC 25V Frequency Change with fOSC/T 0 TA 70 Temperature Oscillator Voltage Swing VOSC (Peak to Peak) TJ =25 Discharge Current IDISCHG 0 TA 70

4.82

-30 49 48 225

-180 55 56 275 1.0

kHz % % V mA

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ELECTRICAL CHARACTERISTICS (Cont.)
SYMBOL VFB II(BIAS) GVO GBW PSRR ISINK ISOURCE VOH VOL GV VI(THR) PSRR II(BIAS) tD(IN/OUT) VOL VOH PARAMETER ERROR AMPLIFIER SECTION Voltage Feedback Input Input Bias Current Open Loop Voltage Gain Unity Gain Bandwidth Power Supply Rejection Ratio Output Sink Current Output Source Current Output Voltage Swing High State Output Voltage Swing Low State CURRENT SENSE SECTION Current Sense Input Voltage Gain Maximum Current Sense Input Threshold Power Supply Rejection Ratio Input Bias Current Propagation Delay OUTPUT SECTION Output Low Voltage Output High Voltage

LINEAR INTEGRATED CIRCUIT

TEST CONDITIONS Vo=2.5V VFB=5.0V 2 VO4V TJ =25 I2VVCC25V VO=1.1V,VFB =2.7V VO=5.0V,VFB=2.3V VFB=2.3V, RL=15k to GND VFB=2.7V, RL=15k to VREF (Note 2, 3) (Note 2) 12Vcc25V (Note 2) Current Sense Input to Output ISINK=20mA ISINK=200mA ISOURCE=20mA ISOURCE=200mA VCC=6.0V,ISINK=1.0mA TJ =25,CL=1nF TJ =25,CL=1nF UC3842B UC3843B UC3842B UC3843B

MIN 2.42 65 0.7 60 2.0 -0.5 5.0

TYP 2.50 -0.1 90 1.0 70 12 -1.0 6.2 0.8 3.0 1.0 70 -2 150 0.1 1.6 13.5 13.4 0.1 50 50

MAX 2.58 -2.0

UNIT V A dB MHz dB mA mA V V V/V V dB A ns V V V V V ns ns V V V V % % mA mA V

1.1 3.15 1.1 -10 300 0.4 2.2

2.85 0.9

13 12

Output Voltage with UVLO VOL (UVLO) Activated Output Voltage Rise Time tR Output Voltage Fall Time tF UNDER-VOLTAGE LOCKOUT SECTION Startup Threshold Min. Operating Voltage After Turn-on(VCC) PWM SECTION MAX Duty Cycle MIN Total DEVICE Power Startup Supply Current VTHR VCC(MIN)

1.1 150 150 17.5 9 11.5 8.2

14.5 7.8 8.5 7.0 94

16 8.4 10 7.6 96

DC

0 0.3 30 12 36 0.5 17

VCC=6.5V for UC3843B VCC=14V for UC3842B Power Operating Supply Current ICC+IC Note 1 Power Supply Zener Voltage VZ ICC=25mA Note: 1. Adject VCC above the Startup threshold before setting to 15V. 2. This parameter is measured at the latch trip point with VFB=0V. V Output Compensation 3. Comparator gain is defined as : GV V Current Sense Input ICC+IC

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TYPICAL APPLICATION CIRCUIT

Open Loop Test Circuit All of the parameters are not all tested in production, although been guaranteed. The timing and bypass capacitors must be connected to Pin 5 in a single point ground very closely. To sample the oscillator waveform, the transistor and 5k potentiometer are used, and also can apply an adjustable ramp to ISENSE Pin.
2N 2222 UTC UC3842B/3843B 1 COMP 2 VFB 3 ISENSE 5K CT 4 RT/CT VREF 8 VC 7
OUTPUT 6

VREF

RT 100K

4.7K E/A ADJUST 4.7K 1K ISENSE ADJUST

V1 OUTPUT

0.1 GND 5 0.1 1K/1W

Under Voltage Lockout Under-Voltage Lock-Out: the output driver is biased to a high impedance state. To prevent activating the power switch with output leakage current, Pin 6 should be shunted to ground with a bleeder resistor.

Error Amp Configuration

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APPLICATION INFORMATION(Cont.)

Current Sense Circuit

Peak current (IS) is equaled: IS(MAX)=1.0V/RS There should be a small RC filter to suppress switch transients. Oscillator Waveforms and Maximum Duty Cycle

VREF RT/RC

8 RT 4 CT

LARGE RT SMALL CT

V4

INTERINAL CLOCK SMALL CT LARGE RT

GND

V4

INTERINAL CLOCK

CT (Oscillator timing capacitor) can be charged by VREF through RT and discharged by an internal current source. At discharge time, the internal clock signal blanks the output to the low. Both oscillator frequency and maximum duty cycle can be determined by Selection of RT and CT. All charge and discharge times can be calculated by the next formulas: tC=0.55 RT CT 0.0063R T 2.7 tD=RTCTIN 0.0063R 4 T

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APPLICATION INFORMATION(Cont.)

Shutdown Techniques

1K 8 VREF ISENSE
SHUTDOWN

COMP

3 330

SHUTDOWN

500 (Deadtime vs CT RT > 5k)

TO CURRENT SENSE-RESISTOR

The UTC UC3842Bs shutdown can be accomplished by two ways: raise Pin 3 above 1V; or pull Pin 1 below a voltage two diode drops above ground. Either method can cause the PWM comparators output to be high. Because the PWM latch is reset dominant, the output will remain low until the next clock cycle after the shutdown condition at Pins 1 and/or 3 is removed. Slope Compensation

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TYPICAL CHARACTERISTICS

LINEAR INTEGRATED CIRCUIT

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20mV/DIV

Maximum Output Duty Cycle, Dmax (%)

Discharge Current, Idischg (mA)

Percent Output Deadtime, %DT.

Timing Resistor, RT (K)

0 =2 CT F 0p

nF .0 =5 CT 0 =1 CT nF

nF .0 =1 CT

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TYPICAL CHARACTERISTICS(Cont.)

LINEAR INTEGRATED CIRCUIT

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TYPICAL CHARACTERISTICS(Cont.)

LINEAR INTEGRATED CIRCUIT

Fig. 13 Output Saturation Voltage Versus Load Current 0 Output Saturation Voltage, VSAT (V) -10 -20
Source Saturation (Load to Ground) VCC TA=25C VCC=15V 80s Pulsed Load 120Hz Rate

Fig. 14 Output Waveform VCC=15V CL=1.0nF TA=25C

90 %

TA=-55C

30 20 10 0 0

TA=55C

TA=25 C GND 800

Sink Saturation (Load to VCC)

10 % 50ns/DIV

200 400 600 Output Load Current, IOUT (mA)

Output Voltage, VO

Fig. 15 Output Cross Conduction 25 VCC=30V CL=15pF TA=25C 20V/DIV 20

Fig. 16 Supply Current vs. Supply Voltage

Supply Current, ICC (mA)

15

Supply Current, ICC

10 RT=10k CT=3.3nF VFB=0V ISENSE=0V TA=25C 20 30 40 UC3843B UC3842B 10

100mA/DIV

Supply Voltage, VCC (V)

UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

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