Вы находитесь на странице: 1из 4

8/8/12

Freescale Placement Papers - FREESCALE PAPER - 28 FEB 2008 (ID-806)

New: Chemical Engineering / C++ Programming /

Search

Arithmetic Aptitude Data Interpretation Logical Reasoning Verbal Reasoning Non Verbal Reasoning General Knowledge Sudoku Number puzzles Missing letters puzzles Logical puzzles Playing cards puzzles Clock puzzles

Chemical Engineering Networking Database Questions Computer Science Basic Electronics Digital Electronics Electronic Devices Circuit Simulation Electrical Enigneering Engineering Mechanics Technical Drawing Placement Papers Group Disucssion HR Interview Technical Interview Body Language Aptitude Test Verbal Ability Test Verbal Reasoning Test Logical Reasoning Test C Programming Test Java Programming Test Data Interpretation Test General Knowledge Test Data Structures Operating Systems Networking DATABASE Database Basics SQL Server Basics SQL Server Advanced SQL Server 2008 JAVA Core Java Java Basics Advanced Java UNIX Unix File Management Unix Memory Management Unix Process Managemnt C Interview Questions The C Language Basics .NET Interview Questions .NET Framework ADO.NET ASP.NET Software Testing Aptitude Reasoning Verbal Ability GK Puzzles Programming Engineering Medical Interview Online Test

Companies
3i Infotech AAI ABACUS ABB Accel Frontline Accenture Aditi Adobe ADP Agreeya Akamai Alcatel Lucent Allfon Alumnus Amazon Amdocs AMI Andhra Bank AppLabs Apps Associates Aricent Ashok Leyland Aspire

Placement Papers :: Freescale


@ : Home > Placement Papers > Freescale > View Paper
FREESCALE PAPER - 28 FEB 2008
Rate d : +11 , -0

Hi Friends 1. Y=A.C+B.C(bar) the gate implementation was given. How can this circuit is implemented by latch? Ans:- Simple, this is simple 2:1 M UX Where A,B are inputs And C is select pin or clock. In Latch if clock is low its maintain output as its previous stage means no change. So if connect output Y to A. then this is implemented by latch. 2. Set up time, hold time related 1 question. 3. Set up time, hold time was given and some delay in b/w M ax freq.=1/(transition delay+setup time) No hold time. 4. NAND circuit was implemented by M OS....Response was asked? 5. Power dissipation=V^2*f*C(load cap) 6. Delay =(1/W by L ratio)*Vth*C(load)

www.indiabix.com/placement-papers/freescale/806

1/4

8/8/12

Aspire Atos Origin Axes Bajaj Bank of Maharashtra BEL BEML BHEL BirlaSoft Blue Dart Blue Star BOB BPCL BPL Brakes BSNL C-DOT Cadence Calsoft Canara Bank Canarys Capgemini Caritor Caterpillar CDAC CGI Changepond

Freescale Placement Papers - FREESCALE PAPER - 28 FEB 2008 (ID-806)


7. Two buffer ckt were given what is the difference b/w them? 8. CM OS inverter main yadi PM OS and NM OS ko interchange ker de to bo buffer bun jata hai. 9. Three ckts of inverter was give in which they asked about power dissipation....with ON time was 40% while off time 60%. A. Simple CM OS inverter. B. Res was connected to VDD and PM OS C. NM OS Connected to VDD and res. So less on ckt was PM OS BECOZ ON TIM E WAS 40% SO less power diss compare to C. While in A no res so very less power dissipation.

Like this? +11

-0

Brilliant CRM Solutions data3s.com Life Science & Pharma Companies: Reach Your True Sales Potential GATE/PSU/IES Bhubaneswar www.dronabbsr.com /9583203351 Faculties from Delhi & Hyderabad at Dronacharya Coaching Center,Orissa Maths in a FUN way? www.ubqool.com CBSE / ICSE for class 7, 8, 9 & 10 All subjects available at UBQOOL 1 lakh IT jobs www.Apte ch-Education.com Get a global career through Aptech Career building ACCP Pro Course

Ads by Google

Ciena Cisco Citicorp Read more: CMC FREESCALE PAPER - 28 FEB 2008 Consagous FREESCALE PATTERN - 17 AUG 2007 Convergys FREESCALE WRITTEN EXAM AND INTERVIEWS QUESTIONS CORDYS FreeScale Placement Paper 7th AUG 2008(Aptitude) Crompton FREESCALE Fresher Placement Test Paper CSC FREESCALE PAPER PATTERN CTS FREESCALE Campus Placement PAPER PUNJAB ENGG COLLEGE,CHANDIGARH Cummins Dell Deloitte Delphi-TVS DeShaw Deutsche Dotcom DRDO EDS EIL ELGI ELICO ERICSSON Essar Fidelity Flextronics Freescale FXLabs GAIL GE Genpact Geodesic Geometric Globaledge GlobalLogic Godrej www.indiabix.com/placement-papers/freescale/806

Placement Papers Freescale MBA Graduate Jobs

2/4

8/8/12

Freescale Placement Papers - FREESCALE PAPER - 28 FEB 2008 (ID-806)

Godrej Google Grapecity HAL HCL Hexaware Honeywell HP HPCL HSBC Huawei Hughes IBM IBS ICICI iGate Impetus iNautix Indian Airforce Indian Airlines Infosys Infotech Intec Integra Intergraph IOCL iSOFT ISRO Ittiam JSW Keane Kenexa L&T L & T Infotech LG Soft Lifetree LionBridge Mahindra Satyam Mastek Maveric McAfee MECON Microsoft MindTree Miraclesoft Mistral Motorola Mphasis MTNL NIC Nokia Siemens Novell NTPC Nucleus ORACLE Patni Perot Polaris Ramco Robert Bosch Samsung SAP
www.indiabix.com/placement-papers/freescale/806 3/4

8/8/12

SAP Sapient Sasken SBI Sierra Atlantic Sonata Sony India Sutherland Syntel TCS Tech Mahindra VeriFone Virtusa Wipro Zensar

Freescale Placement Papers - FREESCALE PAPER - 28 FEB 2008 (ID-806)

2008-2012 by IndiaBIX T echnologies. All Rights Reserved | Copyright | T erms of Use & Privacy Policy Contact us: info@indiabix.com Bookmark to: Follow us on twitte r!

www.indiabix.com/placement-papers/freescale/806

4/4