Precise Resistive Voltage Divider for Harmonic Measurements

G. A. Kyriazis*, A. M. Ribeiro Franco*, R. M. Debatin* and W. G. Krten Ihlenfeld

*

Instituto Nacional de Metrologia, Qualidade e Tecnologia gakyriazis@inmetro.gov.br Physikalisch-Technische Bundesanstalt

Abstract This paper describes the design, construction and evaluation of a precise resistive voltage divider for the measurement of harmonics of power line frequencies employing digital sampling techniques. Index Terms Resistive voltage divider, calibration, harmonics, sampling methods, frequency response.

I. INTRODUCTION It is well known that inductive voltage dividers (IVDs) are preferred for voltage measurement at power line frequencies under stationary and sinusoidal conditions due to their inherent stability over time and independence on environmental influences. For harmonic measurements though, deleterious effects due to nonlinearity in their magnetic cores and distributed stray elements reduce IVDs performance, especially at frequencies starting at 1 kHz and above. The same happens for very low frequencies as 30 Hz or 20 Hz and below. For this application a divider with flat-magnitude and linear-phase responses over frequency for voltages of hundreds of Volt is sought. Flat-magnitude and linear-phase responses can best be attained with a resistive voltage divider in order to ensure traceability of harmonic measurements up to about 5 kHz. Such stringent requirements impose some engineering challenges, which are by no means trivial. Aiming at addressing these challenges, a compact, linear and precise resistive voltage divider was devised, constructed and evaluated at Inmetro. It employs commercial, high-grade, surface-mounted ceramic resistors (SMR resistors) placed over a thermally conductive substrate, which ensures homogeneous temperature rise of all resistors when operating at higher voltages and serves as a potential guard as well. By proper adjustment of the guard (or screen) potential, the divider magnitude response over frequency becomes almost flat and its phase response almost linear, surpassing the performance of its inductive counterparts at frequencies beyond 1 kHz. II. DIVIDER DESIGN The divider is depicted in Fig. 1. The auxiliary divider is of the same construction type as the main divider, which employs high precision, thin-film chip SMR resistors [1]. The resistors are properly electrically isolated from and placed over a thermally conductive substrate (screen) of square shape and 400 m thickness made of copper (thermal conductivity of nearly 395 W/(mK)).

Fig. 1. Schematics of the divider.

The screen is further thermally insulated from the environment (an isothermal reference which is a double side plated copper board) by an insulator of thermal conductivity of 0.3 W/(mK). Isolating the substrate (or screen) from the ambient allows a higher but much more homogeneous temperature rise of the whole structure with respect to the ambient. Since the temperatures of the equally nominal-value resistors (of 10 k) are almost identical, the voltage ratio (output to input voltage ratio) of the divider becomes nearly independent of the applied voltage (or power dissipation) and ambient temperature variations, despite of their inherent voltage dependence. The best temperature independence of the divider ratio is obtained by placing the resistors on the diagonal of the square substrate as is demonstrated in Fig. 2, which was calculated [2] for 12 heat sources (or 12 resistors in series dissipating 10 mW each) and applied voltage of 120 V. Further dielectric losses that could impair the magnitude flatness and phase linearity over frequency of the divider are reduced by placing the resistors with their metallic film facing upward and not facing the screen. Their backs of alumina ceramic are tied to the substrate by a thermally conductive sheet made of kapton with double-sided adhesive layers of low dielectric loss and great dielectric strength (greater than 5 kV).

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Temperature variation along the diagonal is depicted in Fig. 3, indicating ratio variations smaller than 106 (for a specified resistor temperature coefficient of 10106/K [1]). The amplifiers in Fig. 1 are of low noise JFET input type [3]. Amplifier A1 (of unitary gain) buffers the auxiliary dividers output and feeds the ground potential of amplifier A2 helping thus to eliminate common mode errors of A2 and capacitive loading at the lower side of the main divider where A2 acts as a buffer as well. The outcome of this feedforwarding technique is high-frequency bandwidth, fast transient response, greater signal integrity, low noise, and magnitude flatness and phase linearity well beyond the frequency range of interest of the divider.

No intermodulation distortion was noticed at the dividers output when two signals of different frequencies where applied at its input. The ratio and phase shift between the output voltages of both dividers (resistive and inductive) were measured with a digital sampling voltmeter (HP3458A) using the algorithm in [4]. The measured magnitude and phase responses over frequency are displayed in Fig. 4. The phase shift is very linear with frequency and the ratio presents small variations up to 4 kHz (less than 4106). Such variations are well within the measurement uncertainties which are indicated by k = 1 bars. Experimental investigations on self-heating effects that may cause variation on ratio were done applying high voltages (e.g. 120 V and 240 V) and measuring the ratio against an inductive voltage divider (CONIMED IVD DI-4). For that, a power frequency of 62.5 Hz was chosen (to avoid beating at 60 Hz). After 10 minutes, the ratio varied exponentially by as much as 5106 indicating that either a resistor has a much higher temperature coefficient or the heat in any of the resistors is not being fully transferred to the substrate. Investigations are still ongoing and more details shall be given at the conference.

Fig. 2. Temperature rise above ambient (T-Ta) of resistors placed over the diagonal line of a 1.6 cm x 1.6 cm copper substrate.

Fig. 4. Magnitude and phase response over frequency.

IV. CONCLUSION A compact resistive voltage divider of very linear characteristics with frequency was presented. It allows outstanding measurements of harmonics (magnitude and phase). The design avoids dielectric losses to a further extent. Some additional refinements and the results of further scrutiny will be presented at the conference. REFERENCES
[1] TNPU e3 High-Precision Thin Film Chip Resistors. Datasheet available at http://www.vishay.com. [2] W. G. Krten Ihlenfeld, Modeling and Error-Analysis of FET Thermal Converters, Ph.D. dissertation, Technical University Braunschweig, Germany, 1997. [3] OPA140 High-Precision Low-Noise JFET Op Amp. Datasheet available at http://www.ti.com. [4] G. A. Kyriazis and M. L. R. Campos, An algorithm for accurately estimating the harmonic magnitudes and phase shifts of periodic signals with asynchronous sampling, IEEE Trans. Instrum. Meas., vol. 54, no. 2, pp. 496-499, Apr. 2005.

Fig. 3. Temperature variation along the diagonal of the structure with a twodimensional temperature distribution as depicted in Fig. 2. Maximum variations are smaller than 0.02 oC.

The phase error of the divider was adjusted close to zero at 1 kHz by trimming the capacitive divider built by C1 (1 nF) and C2 (~ 3C1), which are surface-mount ceramic multilayer NPO capacitors of maximum temperature coefficient of 30106/K. III. MEASUREMENTS Measurements in the 10 V range were made by direct comparisons against an eight-decade precision IVD (NL Engineering PRF1HF Serial 1616) under sinusoidal excitation.

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