Space-Qualified MIL-STD-1750A General-Purpose Computer

The Johns Hopkins University Applied Physics Laboratory (JHU/APL) has developed a general-purpose computer that has been successfully used to implement several spacecraft subsystems and instruments. The new spacebased processor is a single-board computer based on a proven MIL-STD-1750A microprocessor design that provides 1 mips of software throughput. The processor and its two support boards have been specifically tailored for space applications requiring low-power, radiation-tolerant electronics. The units are immune to particle-induced latch-up and provide an extremely low system single event upset (SEU) rate. The design is compatible with commercially available development tools and is supported by several high-level languages. Processor Features The processor board implements an expanded-mode, MIL-STD-1750A computer with a microprocessor chip set employing a siliconon-sapphire (SOS) version of a proven 1750A design. It has 256K words of static RAM, provision for 2K words of PROM, an interface to a simple bus for connection to peripherals, a memory expansion bus, and an emulation and test port. The on-board RAM and memory expansion bus provide on-the-fly error detection and correction (EDAC) for both application code and data. The socketed PROM provides the user with permanent, nonvolatile storage for start-up code. The system bus is located on a backplane connector, which provides a simple method to connect application-specific hardware to the processor. Eight user interrupts are available on the system bus connector. The emulation and test port allows cardedge emulation, logic analysis, and an interface to a PC-based console debugger. Support Boards JHU/APLs processor is supported by two optional boards: one provides additional RAM, EEPROM, and serial I/O; the other provides additional PROM. Both boards expand the number of user interrupts from 8 (with the 1750A design) to 22.

RAMEEPROM.

Processor.

The Johns Hopkins University

Applied Physics Laboratory

The RAM and EEPROM board provides an additional 256K words of EDAC RAM, which connects to the processor via the memory expansion bus. The board also provides 256K words of nonvolatile storage in EEPROM, which connects to the processor via the system bus. A single, RS-422-compatible serial line interface is provided on an external connector. Two standard interrupt controllers provide extended interrupt capability. The PROM board provides the ability to install up to 32K words of permanent (nonvolatile) memory for critical applications. The device locations are socketed to allow late instal-

lation or changes to be made to a design. Provision is also made for interrupt expansion. Current Applications Nine processors have been used in four subsystem applications on the Midcourse Space Experiment (MSX) spacecraft developed at JHU/APL for the Ballistic Missile Defense Organization (BMDO). redundant command system attitude control and pointing system target tracking subsystem instrument image processing system.

Processor Design Features and Specifications

Feature Specification Software Environment Processor: Throughput: Development tools: Language support: Boot PROM: RAM: Expanded-mode MIL-STD-1750A 1 mips Defense Avionics Instruction Set mix (DAIS) TektronixR 8540A development system TektronixR DAS-9200 logic analyzer PC-based console device Various Ada compilers (Tartan used for MSX) 2K words 256K words of EDAC SRAM on processor board 256K words of EDAC SRAM on optional memory board 256K words on optional memory board 32K words on optional PROM board Radiation Characteristics Total dose radiation tolerance: SEU rates for typical LEO: Board weight: >15 krad (SI) Thermal Design Processor, <5.5 10 error/day RAM, <1.1 1028 error/day (with EDAC) EEPROM, <4.2 1029 error/day
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Feature

Specification Electrical Design

Supply voltage: Power consumption: (Two-board configuration): Emulation and test interface: Backplane interface: Electronics technology:

4.55.5 V 5 W (worst case) 3 W (typical) TektronixR 8540A (TTL-compatible CMOS) Custom bus (simple address, control and data) All advanced CMOS (AC/ACT logic families) Mechanical Design

EEPROM: PROM:

Board size: Connectors:

11.75 7.00 inches Backplane180-pin AMP (1) Emulation and test50-pin, D-type (2) Serial interface9-pin, D-type (1) <1.5 lbs

Temperature range:

Chassis temperature, 240C to 166C

For more information, contact: Space Department Tel: (301) 953-6050 Fax: (301) 953-1093 The Johns Hopkins University Applied Physics Laboratory Johns Hopkins Road Laurel, Maryland 20723-6099

The Johns Hopkins University

Applied Physics Laboratory