4- 1
A Low Cost Monolithic Accelerometer
S. J. Sherman, W.K. Tsang, T. A. Core, D.E. Quinn
Analog Devices Semiconductor
Wmington, MA 01887
1. INTRODUCTION
The ADXLSO is a complete scaled and temperature
compensatedsurface micro-machined accelerometer with an
output voltage proportional to acceleration. Full scale
measurement range is +50g, with unpowered shock
survival at 2000g. Ultimately, signal span accuracy of 5%
should be possible for a temperature range of -55°C to
+125OC and a supply range of 5V kO.25V. Bandwidth up
to 1.5KHz is programmable with a single external
capacitor.
A digitally activated self-test will elecuostaticnllydeflect
a functional beam so that a -5Og acceleration is indicated.
An uncommitted amplifier, with rail-to-rail output range,
and a reference allow re-scaling and offsetting of the raw
output signal (1.8V fl.OV at f50g). Capacitors can be
introduced in the gain network surrounding the
uncommitted amp so that 2 poles of low pass filtering are
possible without the addition of offchip active circuitry.
The ADXL5O's objective specifications were crafted for
crash detection in second generation automotive air bag
systems which rely on single point sensing and per model
programmable crash signature analysis for dramauc system
cost reduction.
2. TECHNOLOGY BASE
The sensor's low cost objective, ultimately S5 in
automotive volumes, dictates a technology base that
includes,
1. a monolithic approach. with integrated sensor and
BiMOS inteaface circuitry
2. small chip size, 120x120 mil2
3. utilization of familiar materials and production
proCeSSeS
4. the simplest possible mechanical structure. a single
layer of self-supportingpatterned polysilicon above
the subsaate surface
5. standardpackaging
6. exploitation of established technique, laser wafer
rimmed (LWT) thin film resistors, for achieving
performance objectives
3. SENSOR GEOMETRY
Figure 1. is a depiction of the sensor's essential functional
elements, which are formed from a single layer of patterned
polysilicon @rocesscd on a h y a of sacrificialoxide 1.6 um
thick). The elements stand on the subsaate at "anchor"
points, a result of pre-patterned holes in the sacrificial
oxide. The sensor. a differential capacitor, exists in a
"moat" area,roughly 6OOum x 400um. with
intemnnections from the beam elements to points external
to the moat accomplished by N+ emitter diffusions.
The large (by IC standards) nominal lateral capacitor
34 1992Symposium on VLSl Circuits Digest of Technical Papers
Authorized licensed use limited to: National Science Council. Downloaded on July 6, 2009 at 22:40 from IEEE Xplore. Restrictions apply.
gaps, 1.3um. between the outer plates and the common
center plate, and the low permittivity of dry nitrogen.
necessitate the paralleling of 42 unit cells to achieve 0.1 pf
for each side of the differential capacitor. At that sensor
source impedance level adequate signal-to-noise
performance is possible.
4. SYSTEM BLOCK DIAGRAM AND
SENSITIVITY EQUATION
The sensor beam is electrostatically force-balanced so
that the inertial force, F~=ma,is primarily balanced by a
net electrostatic force, FE, created by a change in the beam
voltage. As will be explained, this beam voltage change,
AVo, is linearly related to acceleration, a, with the
sensitivity being
&= m
a ~ A & V R (+~ l/r) (1)
whae Q = capacitor gap m = beam m a s
AP = plate area T = loop gain
G, = permittivty of nitrogen
VR = In DC voltage difference between the
outer plates
Figure 2. is a simplified system diagram representing the
essential elements in a forced-balanced scheme.
Complementary lMHz square waves, centered around VR
and -VR are applied to the outer plates of the sensor. The
low input capacitance buffer is to prevent loading of the
sensor. The synchronous demodulatord e w & and amplifies
the lMHz beam node signal proportional to beam
deflection. The low pass filter removes 2MHz spiking, a
result of the demodulation process, and sets a dominant
loop pole for overall frequepcy compensation.
Two concurrent processes exist at the beam node;
1. position sensing, at 1MHz. For a uanslating center
plate and fixed outer plates, an ideal parallel plate treatment
reveals that output per unit deflection is f m t order linear,
i.e.
where Vp is peak carrier amplitude and x is deflection b m
ater,
2. force projection on the beam,accomplishedby a non-
zero value of Vo applied to the beam through the 3 meg-
ohm resistor (R). The large value of resistance prevents
the lMHz signal, sourced by only the 0.2pf. from being
reduced through loading.
The lMHz beam node signal is a classical error signal
which is driven to zero by the global negative feedback
92CH3173-U9UW0034$3.00@1992IEEE
 loop, ivhich adjusrs Lro to create the net elecuosuuc force
balancmg the inerual force, with equilibnum at I = 0. For
a two parallel plates, the attractive electrostauc force is
F = E, ApV2/?_d2
For the beam, the net force is the sum of attractive forces
10 each of the outer plates,
FE = 2Ap€ovRvd&2
if the outer plates are biased at VR and - L'R, the center
phte (beam')& biased at V,, and the beam remains centered,
X = 0. Then
are set with 200K resistors. The pre-amp IS a low accuracy
space etficient insuumencation amplifier. The self-test
current, I,,, is routed into RST . In the absence of
accelerauon the loop output V, wiil adjust so the beam
(3 node is at 1.W. FE = 0, and x = 0. At that condmon
Loop gain is trimmed at R p l . X wafer level full scale
(3) acceleration mm technique under development leads to a
calculated change in beam voltage required to force balance
50g full scale acceleration. With this calculated value, RP2
can be trimmed so that a 1V change is observed at V, for a
5Og input.

5. EXPERIMENTAL RESULTS

Typical measured performance for the ADXLSO,observed

at the pre-amp output,follows. (Full scale output, F.S.O.,
Variables appearing in equation (5) are temperature stable is defined as 1OOg. or +50g, with a corresponding 2V
in a 5% accuracy context. (V, is slaved from a 10ppm/"C change.)
reference.)
For finite loop gain. T, the sensitivity takes the form of sensitivity dnft, 3.0% -55>T>125oC
equation (l), with a 1 + 1 nterm in the denominator. The sensitivity PSRR, 60dB 4.15>Vs>5.25V
DC loop gain, To, is, in fact, trimmed 10 a value of 10. zero - g drift, lOOmV -55>T>125"C
yielding a predictable bandwidth and adequate temperature zero - g PSRR, 48dB 4.75>Vp5.3V
desensitization of factors in the expression for To, such as noise. p-p, 1% F.S.O. BW = lKHz
carrier amplitude. transverse sensitivity, 2%
Figure 3, is a more detailed blcck diagram representative shock sunival
of the chip organization. 2000g. 100pec
The carrier generator, a resistively loaded differential pair >16OOg, 500psec (equipment limited)
of bipolars, provides complemenraxy lMHz square waves
which are AC coupled through 5Opf capacitors to the Photo 1 is a comparison of outputs from a shaker
inputs of the sensor. E€ plate voltages (3.4V and 0.2V) reference accelerometer (top) and the ADXLSO (bottom) for
20g, 100Hz excitation.

1
1

L-+-
14 rn +
U-

PHOTO 1 REF ACCEL ITOP)

ADXUO (BOTTOM)

1992 Symposium on VLSl Circuits Digest of Technical Papers 0 35

Authorized licensed use limited to: National Science Council. Downloaded on July 6, 2009 at 22:40 from IEEE Xplore. Restrictions apply.