KANTIPUR ENGINEERING COLLEGE

Dhapakhel, Lalitpur
(Affiliated to Tribhuvan University)

A Final Year Project

On
"Vehicle Tracking and Navigation System"
[Code No: EG778EX]
By
Abhishek Dangol (03-BEX-059)
Karuna Pokhrel (13-BEX-059)
Sandeep Paudel (34-BEX-059)
Suman Dhimal (05-BEX-059)
Sushil Bajracharya (14-BEX-059)

Department of Computer and Electronics Engineering

Sandee
p Paudel
Signatur
e Not
Verified

Digitally
signed by
Sandeep
Paudel
DN:
cn=Sandeep
Paudel,
o=KEC, c=NP
Date:
2006.12.29
03:29:18 Z

LALITPUR,NEPAL
DECMBER 2006

KANTIPUR ENGINEERING COLLEGE

Dhapakhel, Lalitpur
(Affiliated to Tribhuvan University)

"Vehicle Tracking and Navigation System"

[Code No: EG778EX]
By
Abhishek Dangol (03-BEX-059)
Karuna Pokhrel (13-BEX-059)
Sandeep Paudel (34-BEX-059)
Suman Dhimal (05-BEX-059)
Sushil Bajracharya (14-BEX-059)

A PROJECT REPORT
SUBMITTED TO THE DEPARTMENT OF ELECTRONICS AND COMPUTER
ENGINEERING IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF BACHELOR OF ENGINEERING

Department of Computer and Electronics Engineering

LALITPUR,NEPAL
DECMBER 2006

COPYRIGHT
The authors have agreed that the library, Kantipur Engineering College (KEC), may
make this report freely available for inspection. Moreover, the authors have agreed that
permission for extensive copying of this project report for scholarly purpose may be
granted by the lectures who supervised the project works recorded herein or, in their
absence, by the Head of Department wherein the project report was done. It is
understood that the recognition will be given to the authors of the report and to the
Department of Computer and Electronics, KEC in any use of the material of this project
report. Copying or publication or other use of this report for financial gain without
approval of the Department and the authors written permission is prohibited.
Request for permission to copy or to make any other use of the material in this report in
whole or in part should be addressed to:
Head
Department of Computer and Electronics
Kantipur Engineering College
Dhapakhel, Lalitpur
Nepal

Kantipur Engineering College

Department of Electronics and Computer Engineering

APPROVAL LETTER

The undersigned certify that they have read and recommended to the Institute of
Engineering for acceptance, a project report entitled "Vehicle Tracking and
Navigation System" submitted by Abhishek Dangol, Karuna Pokhrel, Sandeep Paudel,
Suman Dhimal and Sushil Bajracharya in partial fulfillment for the degree of Bachelor
of Engineering in Electronics and Communication Engineering.

---------------------------------------------Supervisor
Title:
Name of the supervisor
Name of Department/Organization
-----------------------------------------------External Examiner
Name :
Title:
Name of Organization
------------------------------------------------Committee Chairperson
Name: Er.Sachin Sharma Bhandari
Title: Head of Department
Computer and Electronics Engineering Department
----------------------Date

ABSTRACT

The project entitled Vehicle Tracking System is a data logging system based on the
concept of connectivity during mobility. This is a solution to the vehicle tracking
problem with the tactful combination of different fields such as communication
technologies, software development and hardware integration.
Based on the growing M2M communication systems, this project uses existing proven
technologies (GPS,GSM/GPRS and Internet) for the purpose of tracking vehicles and
for navigation. The embedded system encompassing the GPS receiver (sensor),
processing unit, GSM/GPRS (telemetry) module sends the position information over to
the internet (recording and analysis of data) which can be accessed from anywhere to
ascertain the whereabouts of the vehicle to be tracked.
The information about the vehicle can be obtained through either a HTML page
(internet) or as a response to the SMS request. The LCD in the system helps in the
navigation purpose.

iii

ACKNOWLEDGEMENT

First of all we would like to thank our HOD Er. Sachin Sharma Bhandari for his coordination and co-operation right from the commencement of this project. The help in
terms of resources from the department was invaluable.
We would also like to extend our gratitude towards our project supervisor Er.
Purusottam Sigdel for helping and guiding us. He made us work harder right from the
start which helped us to make a head-start in the project.
We cannot be at ease without mentioning the help of Real Time Solutions,
Bhotebahal. Their selfless support made this project possible.
We would also like to thank Mr. Nipin Shah for providing the necessary tools and
equipments as and when required.
It would be harsh not to mention the support and from our colleagues and teachers. We
would also like to thank all those who were directly and indirectly involved to make
this project a success story.
Finally, we would like to thank all our family members for their continuous support and
motivation.

iv

TABLE OF CONTENTS

COPYRIGHT.................................................................................................................. I
APPROVAL LETTER ..................................................................................................II
ABSTRACT.................................................................................................................. III
ACKNOWLEDGEMENT........................................................................................... IV
TABLE OF CONTENTS .............................................................................................. V
LIST OF TABLES ......................................................................................................VII
LIST OF FIGURES .................................................................................................. VIII
LIST OF SYMBOLS AND ABBREVITIONS.......................................................... IX
1

INTRODUCTION ..................................................................................................1
1.1
1.2

Literature review...............................................................................................3

1.3
2

Background.......................................................................................................2
Objectives .........................................................................................................4

CHAPTER TWO:GLOBAL POSITIONING SYSTEM ....................................6

2.1

GPS Introduction ..............................................................................................6

2.2

How does GPS works? .....................................................................................6

2.3

The GPS satellite system ..................................................................................7

2.4

GPS sensor........................................................................................................7

2.4.1
2.4.2

Technical Specifications ...........................................................................8

2.4.3

GPS sensor wire descriptions ...................................................................9

2.4.4

Sensor communication protocol ...............................................................9

2.4.5

Interfacing with the microcontroller .......................................................12

2.4.6
3

Sensor Features .........................................................................................8

Powering the GPS Sensor .......................................................................14

GPRS (GENERAL PACKET RADIO SERVICE) ...........................................15

3.1

Introduction.....................................................................................................15

3.1.1

CSD vs. GPRS ........................................................................................16

3.1.2

Seeing GPRS on the user side.................................................................18

3.1.3

GPRS Protocols ......................................................................................19

3.2

GSM-GRPS terminal (GM862-GPRS)...........................................................20

3.2.1

Features...................................................................................................20

3.2.2

Input/Output format ................................................................................21

3.3

Procedure of uploading data to a HTTP server...............................................24

3.4

Interfacing the GPRS terminal with the MCU................................................25

3.5

Powering the GPRS device.............................................................................26

MICRO-CONTROLLER ....................................................................................27
4.1

Introduction.....................................................................................................27

4.2

Serial Communication ....................................................................................27

4.2.1

Setting the SFRs ....................................................................................28

4.2.2

Baud Rate Generation.............................................................................29

4.3
4.4

Connections to the microcontroller.................................................................31

4.5

Powering the project .......................................................................................32

4.6

Interfacing the LCD with the MCU................................................................32

Interrupt Handling...........................................................................................30

THE BRIDGING CIRCUITS..............................................................................36

5.1

Voltage Level Translator ................................................................................36

5.2

Serial multiplexing circuit ..............................................................................37

5.3

General interconnection between the embedded devices ...............................39

MICROCONTROLLER PROGRAM-FLOW CHART...................................40

SERVER SIDE PROGRAMS .............................................................................42

7.1

PHP script .......................................................................................................42

7.2

JAVA ..............................................................................................................43

7.2.1

Applets ....................................................................................................44

7.2.2

Java Virtual Machine (JVM) ..................................................................45

7.2.3

Java Implementation ...............................................................................45

PROJECT DEVELOPMENT CHART ..............................................................49

FINAL WORDS....................................................................................................50
9.1
9.2

Problems Encountered ....................................................................................50

9.3

Future Enhancements......................................................................................51

9.4

Applications ....................................................................................................51

9.5

Discussion.......................................................................................................52

10

Limitations ......................................................................................................50

REFERENCES .................................................................................................53

APPENDIX A: PCB PRINTS......................................................................................54

APPENDIX B: DATASHEETS...................................................................................58
vi

LIST OF TABLES

Table 2-1 GPS Wire Description ......................................................................................9

Table 2-2 GPS sensor PGRMF data output format. .......................................................12
Table 2-3: TTL to RS-232 conversions ..........................................................................13
Table 4-1: SCON and PCON Bit Fields .........................................................................28
Table 4-2 Bit Fields of TCON and TMOD registers ......................................................29
Table 4-3 SFR IE bit fields .............................................................................................30
Table 5-1 TTL and RS-232 voltage levels......................................................................36
Table 5-2 Selection of serial device for communication ................................................39
Table 7-1 Received data format......................................................................................46

vii

LIST OF FIGURES

Figure 1-1 General block diagram of the system..............................................................2

Figure 2-1 GPS Sensor .....................................................................................................8
Figure 2-2 Computer Serial Port Interconnection with the GPS Sensor ........................10
Figure 2-3 Connection of the GPS with the microcontroller..........................................13
Figure 3-1 GPRS network ..............................................................................................15
Figure 3-2 GPRS interconnectivity ................................................................................17
Figure 3-3 Rough GPRS Equivalent device ...................................................................19
Figure 3-4: Signal lines to interface the GPRS Terminal with the MCU .......................26
Figure 4-1 Initializing the timing of 89c51.....................................................................30
Figure 4-2 External Interrupt causing circuit..................................................................31
Figure 4-3 Connections to the MCU...............................................................................31
Figure 4-4 Power Supply to the project ..........................................................................32
Figure 4-5 Timing diagram.............................................................................................33
Figure 4-6 Interfacing the LCD ......................................................................................35
Figure 5-1 Connections around IC MAX-232a ..............................................................37
Figure 5-2 Connections around IC MAX232b ...............................................................37
Figure 5-3 Serial line multiplexing circuit......................................................................38
Figure 5-4 Interconnection between the embedded devices...........................................39
Figure 6-1 Main Program Flow ......................................................................................40
Figure 7-1 Map of Dhapakhel.........................................................................................47
Figure 7-2 Flowchart of Java program ...........................................................................48

viii

LIST OF SYMBOLS AND ABBREVITIONS

API
APN
AT
CBS
CMOS
CSD

Application Programming Interface

Access Point Name
Attention
Cell Broadcast service
Complementary Metal Oxide Semiconductor
Circuit Switched Data

DCD
DGPS
DNS
DTE

Data Carrier Detect

Differential Global Position System
Domain Name System Server
Data Terminal Equipment

ETSI

European Telecommunications Standard Institute

GGSN
GND
GPRS
GPS
GSM
GSN
GTP

Gateway GPRS Support Node

Ground
General Packet Radio Service
Global Position System
Global System for Mobile
GPRS Support Node
GPRS Tunneling Protocol

HLR
HSCSD
HTML
HTTP

Home Location Register

High Speed Circuit Switch Data
Hypertext Markup Language
Hypertext Transfer Protocol

IE
IMSI
INT
IP
ISDN
ISP

Interrupt Enable
International Mobile Subscriber Identity
Interrupt
Internet protocol
Integrated Service Digital Network
Internet Service Provider

JIT
JVM

Just In Time
Java Virtual Machine

LCD

Liquid Crystal Display

M2M
MCU
MO

Machine to Machine
Microcontroller Unit
Mobile Oriented
ix

MSC
MT

Mobile Switching Center

Mobile Terminal

NMEA

National Marine Electronics Association

PCON
PDP
PDU
PHP
PLMN
PPP
PPS

Power Control
Packet Data Protocol
Packet Data Unit
Hypertext preprocessor
Public Land Mobile Network
Point to Point Protocol
Pulse Per Second

RFC1661
RFC1945
RFC990
RI

Request for Comments 1661 (Point to Point Protocol)

Request for Comments 1945 (Hypertext Transfer Protocol)
Request for Comments 990 (Protocol for Assigning Numbers to Ports)
Receiving Interupt

SCON
SGSN
SIM
SMG
SMOD
SMS
SMSC

Serial Control
Special Function Register
Serving GPRS Support Node
Subscriber Identity Module
Special Mobile Group
Serial Mode
Short Message Service
Short Message Service Center

TCON
TI
TTL

Time Control
Transmitting Interrupt
Transistor Transistor Logic

UART
UTC

Universal Asynchronous Receiving Transmitting

Coordinated Universal Time (also known as GMT)

WASS
WWW

World Wide Augmentation System

World Wide Web

SFR

INTRODUCTION

The Vehicle Tracking and Navigation System is developed by exploring the

applications of various state-of-the-art technologies to overcome the problems of traffic
management, vehicles theft and navigation. This is a relevant, effective and efficient
system in order to enhance the vehicle security and navigation.
This system is based on the Data Logging System. The Data Logging System consists
of four different elements. They are

Measuring the vehicle parameters such as position, time, and velocity and
so on by the help of sensors. The sensor in this system is GPS sensor.

Recording the obtained parameters by the temporary logger unit.

Microcontroller acts as temporary logger unit.

Uploading / accessing the recorded data. The process involved is called

telemetry which is performed by GPRS.

Finally, analysis and presentation of recorded data through internet or

through the response to the SMS request by the subscriber.

There will be two terminals namely the Mobile Station (e.g. Vehicle) and the user
terminal. With the help of constant communication with the user terminal and the
Mobile Station, the vehicle can be tracked with information it sends to the server.
Users terminal may either be the HTML page or an SMS response from the system.
For the navigation purpose the LCD in the system displays the current location of the
vehicle.
The system invokes a PHP code in the web server using the standard HTTP request
along with the position information. The code in turn stores the information in a text
file. The user can interpret the data with the help of points plotted in the map. This has
been performed with the help of JAVA applet and HTML code stationed at the web
server .General concept of the project is illustrated with the help of Figure 1.1 below.

INTERNET

GPS SALTELLITES

VEHICLE
HANDSET
GSM/GPRS TOWER

TERMINAL EQUIPMENT
(INTERNET ENABLED)

Figure 1-1 General block diagram of the system.

1.1

Background

These days the normal view of the communication is broadening. These days it is not
only the people who use telecommunication and Internet technologies to communicate
but the machines around us also have started to communicate with each other. This is
the concept of new emerging M2M communications.
M2M communications is all about letting the machines to talk. It is a system that enable
machines to communicate with information systems or with other machines and provide
real-time data. A wireless data link is used for monitoring and control, with data
transfer occurring either by request or at predetermined intervals.
The evolution of GSM has provided considerable benefits compared to other
technologies. The widespread use of GSM means that the M2M product developed will
be an international product. Advanced data services, security features and several
bearers such as GPRS, SMS, HSCSD make GSM an attractive option.
GPS originally developed by the U.S. army for obtaining a tactical edge over the
enemies by striking a position based attack have been recently accessible to the

civilians. After it was opened for the general public, the GPS system has been exploited
for several position based services.
The removal of selective availability by the U.S. government in 2001 provided more
accurate positioning and since it has been used for many position based services. People
around the globe can use this service free of cost which encourages GPS based
positioning systems.
Internet on the other had is a widespread communication topology. Originally
developed by the DoD as ARPANET in 1969 for information exchange, Internet now
has become the most used technology. This present time is also referred to as the age
of the Internet. The concept of the WWW has bloomed and provided user friendly
interface to the general people. It is a cost effective means of wide area communication.
With the dawn of the modernization of the world, development of transportation system
has also evolved highly. Each day, new vehicles with different luxurious features are
being launched in the market. And as a result, the countless vehicles are being added on
the street everyday. So, the rate of the vehicles on the street is definitely increasing
tremendously.
With the increase in number of the vehicles plying in the street, the problems of traffic
management, theft of the vehicles and trouble in navigation have increased in enormous
fashion. These problems have been rocketing with time. To get rid of these problems,
the idea of The Vehicle Tracking and Navigation System was conceived. The use of
cost effective technologies such as GPS, GPRS and Internet for the tracking of vehicles
or for other M2M communication system is quite justifiable.

1.2

Literature review

Although the M2M communication concept is quite a recent term, it is growing fast. In
the context of foreign countries M2M solutions are created for increasing the profits
and competitiveness of a company through more efficient processes, better customer
service or new ways of doing things.

In foreign countries it has found its use in widespread areas such as-monitoring
elevators in shopping centers, checking the temperatures of swimming pools,
downloading new games into amusement machines, locating vehicles on the highways
to name just a few.
The concept of position or location based-customized services is also in the rise these
days. The use of GPS has been widespread in areas such as recreational boating,
commercial fishing, and professional mariners, surveying, hiking etc. It has also been used
in the emergency management.

In the context of Nepal there are no such location based services. The concept of M2M
communication is little or non existent. So this project combines the M2M
communication concept with the position based system for the purpose of vehicle
tracking and navigation.
Although some vendors abroad have combined the GPS and the GPRS technologies for
the similar purpose, this project provides more flexibility of reporting the end data to its
users.

1.3

Objectives

The main objective of the project is foremost building a vehicle tracking and navigating
device that would be used in a real world. The device could be used for wide purposes
such as tracking, navigation, fleet and traffic management etc.
Also the project helps us to get more familiar with existing GPS and GSM/GPRS
networks. So far we have only been able to view the theoretical side of the system but
after the project completion we are sure to get familiar with practical side of it.
The GPS and GSM/GPRS services have not been fully exploited yet. Therefore we
wish to build a base upon which more advanced application of the vehicle tracking and
navigation systems are built in future. Therefore we can say that our project is both
research and application based. To be more specific the objectives of the project can be
listed as follows.

To implement a data logging system, which can be used for telemetry

To show how systems can be combined for the purpose of telemetry.

To shed light about how new technologies can be exploited for the benefit
of human beings.

To understand in detail the electronics behind the GPS and GSM/GPRS.

To attain the mandatory award in the partial fulfillment of the requirement

for the degree of Bachelor of Electronics and communication Engineering.

CHAPTER TWO:GLOBAL POSITIONING SYSTEM

2.1

GPS Introduction

GPS is a network of satellites that continuously transmit coded information, which

makes it impossible to precisely identify locations on earth by measuring distance from
the satellites.
As stated in the definition above, GPS stands for Global Positioning System, and refers
to a group of U.S. Department of Defense satellite constantly circling the earth. The
satellites transmit very low power radio signals allowing anyone with a GPS receiver to
determine their location on Earth.
This remarkable system was not cheap to build, costing the U.S. billions of dollars ($12
billion!). Ongoing maintenance, including the launch of replacement satellites adds to
the cost of the system.
The rst GPS satellites were launched into space in 1978. A full constellation of 24
satellites was achieved in 1994, completing the system. Money is in the U.S.
Department of Defense budget to continue buying new satellites, sending them up to
keep the systems running for years to come.
These designers originally had a military application in mind. GPS receivers would aid
navigation, troop deployment and artillery fire (among other applications). Fortunately,
an executive decree in the 1980s made GPS available for civilian use. GPS works in
any weather conditions, anywhere in the world, 24 hours a day. There are no
subscription fees or setup charges to use GPS. GPS receivers have been miniaturized to
just a few integrated circuits and so are becoming very economical. And that makes the
technology accessible to virtually everyone.

2.2

How does GPS works?

GPS satellites circle the earth twice a day in a very precise orbit and transmit signal
information to earth. GPS receivers take this information and use triangulation to

calculate the user's exact location. Essentially, the GPS receiver compares the time a
signal was transmitted by a satellite with the time it was received. The time difference
tells the GPS receiver how far away the satellite is. Now, with distance measurements
from a few more satellites, the receiver can determine the user's position and display it
on the unit's electronic map.
A GPS receiver must be locked on to the signal of at least three satellites to calculate a
2D position (latitude and longitude) and track movement. With four or more satellites in
view, the receiver can determine the user's 3D position (latitude, longitude and altitude).
Once the user's position has been determined, the GPS unit can calculate other
information, such as speed, distance to destination, sunrise and sunset time and more.
Recent development in GPS like DGPS have made the positioning even more accurate.
The USCG beacons and the WAAS systems are the kinds of DGPS which correct the
data from the satellites with appropriate environmental error models.

2.3

The GPS satellite system

The 24 satellites that make up the GPS space segment are orbiting the earth about
12,000 miles above us. They are constantly moving, making two complete orbits in less
than 24 hours. These satellites are traveling at speeds of roughly 7,000 miles an hour.
GPS satellites are powered by solar energy. They have backup batteries onboard to keep
them running in the event of a solar eclipse, when there's no solar power. Small rocket
boosters on each satellite keep them flying in the correct path.

2.4

GPS sensor

The GPS receiver used for our purpose is the GARMIN 15L GPS receiver. The sensor
first has to be initialized according to the formats in which we required the data. There
are certain NMEA (National Marine Electronics Association) sentences that help us to

communicate with the receiver. These sentences are the Garmin proprietary NMEA
sentences.
2.4.1

Sensor Features

Figure 2-1 GPS Sensor

12-channel GPS receiver tracks and uses up to 12 satellites for fast,

accurate positioning and low power consumption.
Differential DGPS capability yielding 35 meter position accuracy.
Compact, rugged design ideal for applications with minimal space.
Receiver status information can be displayed directly on a PC.
User initialization is not required. Once installed and a fix is obtained, the
unit automatically produces navigation data.
User-configurable navigation mode (2-dimensional or 3-dimensional fix).
Built-in backup battery to maintain real-time clock for up to 21 days.
Provision for external power to maintain the real-time clock for longer
intervals.
FLASH-based program and non-volatile memory. New software revisions
upgradeable through Website download and serial interface. Non-volatile
memory does not require battery backup.
2.4.2

Technical Specifications
It requires an 8-pinJSTconnector and 1-milimeterpitch.Mating wire harness
A MCX male antenna has to be connected with the female MCX connector
in the sensor

 Required voltage range is 3.3 VDC to 5.4VDC(must have less than 100mV
peak-to-peak ripple)
Input current is 100 mA peak, 85 mA nominal at 3.3 to 5.0 VDC.
2.4.3
Pin#

GPS sensor wire descriptions

Signal Name

Wire

Description

Color
1

BACKUP POWER

WHITE

NOT USED

GROUND

BLACK

POWER RETURN

POWER

RED

5 V REGULATED SUPPLY WITH THE

COMMON POWER SUPPLY OF THE
SYSTEM

PORT 1

YELLOW

DATA OUT
5

PORT 1

SERIAL ASYNCHRONOUS OUTPUT

RS-232 COMPATIBLE OUTPUT

BLUE

DATA IN

SERIAL ASYNCHRONOUS INPUT

RS-232 COMPATIBLE INPUT

RF BIAS

ORANGE

NOT USED

PPS

GRAY

ONE-PULSE-PER-SECOND

OUTPUT.

USED FOR THE PURPOSE OF TIMING.

INDICATOR OF THE ARRIVAL OF THE
GPS DATA
8

PORT 2-DATA IN

GREEN

NOT USED

Table 2-1 GPS Wire Description

2.4.4

Sensor communication protocol

The input output data format for the GPS sensors are the NMEA 0183 sentences.
NMEA is an international standard or protocol for the communication with GPS
devices. The baud rate defined by the NMEA is 4800 however it can be changed
according to our requirement in the GPS-15L sensor.

Eg. $GPGGA,123519,4807.038,N,01131.000,E,1,08,0.9,545.4,M,46.9,M,,*47
It is a NMEA GGA sentence which provides essential fix which provide 3D location
and accuracy data. The sentence is followed by * and then the XOR sum of the output
data.
Garmin Proprietary NMEA sentences are designed for use with Garmin GPS sensors
and GPS units in order to interface with external devices for data interpretation and
recording. The proprietary NMEA sentences start with $PGRMxx.
a) Input Sentences
The sensor first has to be initialized with the necessary sensor initialization
information. There are certain NMEA sentences that help us to input information to the
sensor. These sentences are the Garmin proprietary NMEA sentences.
For conveying these sentences the GPS receiver was first connected to the
computer with the following connection scheme. The free IO Commander software
was used for the communication with 8N1, 4800 baud asynchronous RS-232 standard.

Figure 2-2 Computer Serial Port Interconnection with the GPS Sensor

1) Sensor Initialization Information (PGRMI)

10

The $PGRMI sentence provides information used to initialize the GPS sensors,
set position and time used for satellite acquisition. Receipt of this sentence by the GPS
sensor causes the software within the GPS receiver to restart the satellite acquisition
process. If there are no errors in the sentence, it will be echoed upon receipt. If an error
is detected, the echoed PGRMI sentence contains the current default values. The
initialized PGRMI sentence is
$PGRMI,8520.2345,N,2739.5678,E,270706,105901,A*hh<CR><LF>
2) Sensor Configuration Information (PGRMC)
The $PGRMC sentence provides information used to configure a GPS sensors
operation. Configuration parameters are stored in non-volatile memory. The GPS sensor
will echo this sentence upon its receipt if no errors are detected. If an error is detected,
the echoed PGRMC sentence will contain the current default values. The initialized
PGRMC sentence is:
$PGRMC,A,4440,37,,,,,,A,4,A,1,,30*hh<CR><LF>
3) Output Sentence Enable/Disable (PGRMO)
The $PGRMO sentence provides the ability to enable and disable specific
output sentences. In this project we only require one sentence that is PGRMF. So the
input sentence was.
$PGRMO,PGRMF,1*hh<CR><LF>
b) Output Sentences
Out of many output sentences we only require the PGRMF. It is as follows:
$PGRMF,<1>,<2>,<3>,<4>,<5>,<6>,<7>,<8>,<9>,<10>,<11>,<12>,<13>,<14>,<15>
*hh<CR><LF>
The fields are described in the following table.

11

<1>

GPS week number (0-1023)

<2>

GPS seconds (0 - 604799)

<3>

UTC date of position fix, ddmmyy format

<4>

UTC time of position fix, hhmmss format

<5>

GPS leap second count

<6>

Latitude, ddmm.mmmm format (leading zeros will be transmitted)

<7>

Latitude hemisphere, N or S

<8>

Longitude, dddmm.mmmm format (leading zeros will be transmitted)

<9>

Longitude hemisphere, E or W

<10>

Mode, M = manual, A =automatic

<11>

Fix type, 0 = no fix, 1 = 2D fix, 2=3Dfix

<12>

Speed over ground, 0 to1051 kilometers/hour

<13>

Course over ground,0 to 359 degrees, true

<14>

Position dilution of precision, 0 to9 (rounded to nearest integer value)

<15>

Time dilution of precision, 0 to 9 (rounded to nearest integer value)

Table 2-2 GPS sensor PGRMF data output format.

2.4.5

Interfacing with the microcontroller

The interfacing between the GPS receiver and the microcontroller is the RS-232
interface i.e. the GPS receiver and the microcontroller communicate serially. The GPS
receiver is connected to a microcontroller which reads the GPS output sentence. The
connection scheme is as follows.

12

DATA OUT

MicroController

DATA IN

GPS
Sensor

PPS OUT

Figure 2-3 Connection of the GPS with the microcontroller

The baud rate of the output data from the GPS receiver has already been set to 4800
bauds. Therefore the microcontroller receives the data at a baud rate of 4800 bauds.
These data's are read serially and stored in the internal memories of the microcontroller
before further transmission. The data is sent as a sequence of 8 bits as well as the parity
bits for error detection during transmission. The GPS receiver outputs valid output data
at an interval of 5 seconds.
The GPS receiver outputs data with a voltage level between 0V and +5V i.e. TTL logic.
While serial communication works with voltage levels -15V to -3V for high and +5V to
+15V for low. So in order to receive serial data from an RS-232 interface the voltage
level has to be converted. This is done with the help of an IC, the MAX232.
The MAX232 IC performs the following conversions.
TTL
+2V to +5V
0V to +0.8V

RS-232

Logic

-15V to -3V

high

+3V to +15V

low

Table 2-3: TTL to RS-232 conversions

13

The PPS output of the GPS Sensor has been used for the handshaking purpose. The
sensor outputs a pulse in one second with the output of the GPS Sensor data. The
complete connection of the GPS sensor is shown in the schematics of the project in the
later section.
2.4.6

Powering the GPS Sensor

The GPS Sensor has been powered with the common power of the system. The 6V 4.5
Ah Lead Acid Battery is used for the system and 7805 regulator is used to convert the
voltage level to 5 Volts.

14

GPRS (GENERAL PACKET RADIO SERVICE)

3.1

Introduction

General Packet Radio Service (GPRS) is a mobile data service available to users of
GSM mobile phones. It is often described as "2.5G, a technology between the second
(2G) and third (3G) generations of mobile telephony. It provides data transfer by using
unused TDMA channels in the GSM network. Thus it is the data network for GSM
technology however; its architecture and protocols are slightly different. Technology
for GMS has evolved rapidly since the introduction of its data services, however in
order to support such services GSM adapted a new solution called GPRS (General
Packet Radio Service), which is intended to provide actual packet radio services for
GSM and TDMA users with corresponding enhanced architecture adjustments. The
main set of GPRS specification was approved by SMG-25 (Special Mobile Group) in
1997, and was completed by 1999. The purpose of GPRS is to accommodate efficiently
data sources as well as to obtain high data rate, flexibility and efficient utilization of
bandwidth across the air interface. That is why GPRS reuses the same infrastructure in
order to provide end-to-end packet switched services.
A typical GPRS network is shown below.

HLR

MSC

Gr

The internet

Gs

Gi

Gb

GGSN

SGSN

PCU

Gn
Some other
company
network

Gi

GSM network

Figure 3-1 GPRS network

15

GPRS requires hardware and software changes in the GSM networks. It reuses a large
degree of existing GSM infrastructure. But its architecture will not contain any MSC,
VLR or AUC applications of GSM architecture, but instead encloses two new network
GSN (GPRS Support Node) elements: a Gateway GPRS Support Node (GGSN) and a
Serving GPRS Support Node (SGSN). The gateway GPRS Support Node (GGSN)
serves as the gateway between the GPRS network and other packet networks. GGSN is
also responsible for routing data to the mobile stations at their current points of
attachments to the network. In other words, GGSN acts as a logical interface to external
packet data networks. On the other hand, the Serving GPRS Support Node (SGSN) is
responsible for the delivery of packets to the Mobile Systems (MSs) within its
particular geographical service area. Within the GPRS network, Protocol Data Units
(PDUs) are encapsulated at the originating GSN and decapsulated at the destination
GSN. In between the GSNs, the Internet protocol (IP) is used as the backbone to
transfer PDUs. This process is known as GPRS tunneling (GTP).
The GSNs that make up a GPRS PLMN are interconnected via an IP backbone. The
standards IP routers are employed to help the SGSN to perform the routing and data
transfer functionality that is needed concerning the user related data. The user related
data are constantly stored within the network Home Location Register (HLR). The
GPRS Public Land Mobile Network (PLMN) is made up of a number of network
elements and communications links whose connections are based on the Internet
Protocol (IP) standard stack. On the interface the resources are assigned mobile-tomobile stations only temporarily on a per-packet basis thus radio resources are only
assigned for the duration of one or few IP packets.
3.1.1 CSD vs. GPRS
The General Packet Radio Services (GPRS) standard permits data transfers in a
completely different way with respect to previous point to point communications made
with Circuit Switch data (CSD) modems. In CSD operations the modem establishes a
connection with the other party (another modem) in such a way that all the Network in
between is transparent to the data exchanged. In a real point to point connection, the
two parties are directly connected by the controlling application of the modem. The
other party can be either an Internet Service Provider (ISP) or a private server, but in

16

any case the arrival point must have a modem to connect to Landline, ISDN or GSM
CSD.
The connection establishment procedure defines a particular path where all the
information exchanged between the two peers flows and this path is reserved for
exclusive use of these two peers. This approach has the drawbacks of a long time to setup the link between the two peers (up to a minute); furthermore the speed of the data
transfer is limited to 14400 bps.
In GPRS operations instead, the connection is made directly towards internet as if the
GPRS modem is a network UDP/TCP/IP socket. There is no data path reserved for the
data exchange between the two peers, instead the resources are allocated dynamically
on demand and the data exchanged is organized into UDP/TCP/IP packets. Furthermore
the maximum transfer speed is up to 171.2 kbps (theoretically), about ten times faster
than GSM CSD.
A GPRS connection is shown in the following figure, where the GPRS connection is
between the GPRS modem and the internet.

GPRS
Network
Internet
Mobile with GPRS
(or a GPRS modem)

Figure 3-2 GPRS interconnectivity

Due to this kind of connection, when activating the GPRS connection we must provide
the network parameters and not the phone number to be dialed. Therefore it is not
17

possible to establish a direct point to point GPRS connection between two GPRS
modems; instead an internet TCP/IP connection is required to achieve a point to point
connection between two peers. This approach as the immediate advantage of projecting
the controlling application of the GPRS modem directly on the internet, ready to access
the server virtually from anywhere in the world.
There are few considerations that must be done on the GPRS connections:

the GPRS connection speed with a GPRS class 8 multislot device is

asymmetrical, 4 time slots in reception (57600 bps max) and 1 time slot in
sending (9600 bps max).

the GPRS connection speed with a GPRS class 10 multislot device is

asymmetrical, 4 time slots in reception (57600 bps max) and 2 time slot in
sending (19200 bps max).

The controlling application must relay on some APN (Access Point Name)
that may be the one of the Network Operator of the SIM to gain access to the
internet through the GPRS connection. It's the same thing as the Internet
provider number for CSD internet access.

As a consequence of the point before, the receiving application must have

internet access.

3.1.2 Seeing GPRS on the user side

On the user side (we call it localhost) a GPRS device can be seen as the merge of a
landline modem connection and the Internet Provider. The GPRS device accesses
directly internet and does not need an Internet Provider (but it still needs an access point
to the internet that is the APN usually from network operator). This also means that the
GPRS device, once the modem "connect" message starts the PPP (point to point
protocol described by RFC1661) between it and the localhost as if the GPRS device
was the remote Internet Provider Access Authentication Server Machine.

18

Application

Application

UDP/TCP

UDP/TCP

IP

IP

PPP

PPP

Remote
host
server

GPRS device
Internet
UDP/TCP/IP
Local host

Modem

Modem

Internet provider
access authentication
server

Figure 3-3 Rough GPRS Equivalent device

When the PPP between the localhost and the GPRS device (this is done in such a way
that keeps the GPRS procedure exactly the same as for a CSD internet provider call) is
established the localhost can exchange the TCP/IP packets through the PPP.

3.1.3

GPRS Protocols

On the network level, GPRS supports IP and X.25 protocols to be used by an end-toend application. The GPRS packet delivery to the MS terminal constantly faces packet
traffic as it travels to its destination such traffic is referred as the transport of data which
consists on flow control, error detection, error correction and error recovery are all
included under the same suite of protocols.

19

3.2

GSM-GRPS terminal (GM862-GPRS)

Figure 3-4 Te;lit GSM/GPRS Terminal

3.2.1

Features

The GSM/GPRS device that we are using is Telit GM862 The GM862-GPRS with its
EASY GPRS feature is a special device. It embeds and controls the PPP/ (UDP) TCP/IP
protocol stack inside itself. In this way the local-host sees a "virtual serial line"
connection with the application software on the server machine. Differently from other
GPRS devices that embed the TCP/IP protocol stack; an EASY GPRS device, such as
the GM862-GPRS, does not provide a set of API functions to interface with the
protocol stack but it automatically manages it internally as specified when starting the
connection. It also includes all the features of a standard GSM device.
Specifications of the device are:

Quad-band 900 / 1800 MHz or 850 / 1900 MHz GSM / GPRS Modem

Internet, Data, SMS, Voice, Fax, TCP/IP Services and EASY GPRS
Commands

Remote Control by AT Commands (according to GSM 07.07 and GSM

07.05)

Input voltage 5.5 V to 12 V DC

Current 1.8A peak at 5.5 V, 330 mA average at 5.5

SIM Interface 3V / 5 V

20

Weight125 gram

Interface:

Remote control by AT commands (GSM 07.07 and 07.05)

Baud rate from 300 to 115,200 bits/s

Auto-bauding (300 to 38,400 bits/s)

Power supply through 2 pin socket

SMA antenna connector

3.2.2

RS-232 9 pin D connector

Sliding / fixed landing SIM holder (3V/5V SIM interface)

Input/Output format

AT command
Mobile phone or GSM/GPRS modem are controlled and instructed through commands
called AT commands. The AT is an attention commands and is use as a prefix to other
parameter in a string. The AT command combine with other parameters can be set up in
the communication package or typed in manually as a command line instruction A
terminal program's function is like this: It sends the characters you typed to the mobile
phone or GSM/GPRS modem. It then displays the response it receives from the mobile
phone or GSM/GPRS modem on the screen. The terminal program on Microsoft
Windows is called HyperTerminal which was used for the required setting of the GPRS
device.
The Telit GM862 wireless module can be driven via the serial interface using
the standard AT commands. The Telit GM862 wireless module is complaint with Hayes
standard AT command set (to maintain compatibility with existing programs), GSM
specific AT commands and GPRS specific commands. This module also supports
proprietary AT commands for special purposes.

Some AT commands used with Telit GM862 module

The carriage return<CR> and line feed <LF> after every command is implied.

21

The AT commands used were:

AT+CMGF: Message Format

AT+CMGF=<mode>
Select the SMS format to be used in reading and writing messages.
<mode>
0

PDU mode

text mode

Test command:
AT+CMGF=?

Reports the supported value of <mode> parameter.

For example:
AT+CMGF=1
The above command will select the SMS format as text mode.

AT+CMGS: Send message

AT+CMGS=<da>
<da>=destination address number.
The device respond to the command with the prompt > and waits for message
text (max 160 character). To complete the operation send ctrl-Z char (0x1A).

For example:
AT+CMGF=1[Enter]
AT+CMGS="+491711234567"[Enter]
>Please call office ^Z
Here +CMGF=1 will set the modem in text mode. After the +CMGS you enter
the number the message is intended to in between quotation signs. The message in our
case Please call office is written in the next line and terminated by ctrl+Z (^Z equals
ctrl+Z).

22

AT+CNMI: New message indications to terminal equipment

AT+CNMI=<mode>[,<mt>[,<bm>[,<ds>[,<bfr>]]]]
The MCU does not require any new message indication. Hence the indications are
disabled with the command:
AT+CNMI=0,0,0,0,0
The above command will indicate the first 0 as buffer unsolicited result codes
buffering option buffer is full. Second 0- no SMS-deliver indications are reported to the
TE. Third 0- Cell broadcast message are not send to the DTE. Forth 0- Status report
receiving is not reported to the DTE.
And last 0- TA buffer of unsolicited result codes define within this commands is
flushed to the TE.

AT+CMGR:Read message
AT+CMGR=<index>

Read the message with location value index.

Example:
AT+CMGR=4

This command will read the message on location

no 4 of the sim card.

AT+CMGD:Delete message
AT+CMGD=<index>[,<deflag>]
<index>-message position index in the selected storage
<deflag> delete mode selection flag
0

delete all message at position index

delete all received read messages

delete all received read and all send messages

delete all received and all written messages

delete all messages

Example:
AT+CMGD=1,0
This command will deleted the message of stored location no.1

23

AT+IPR=4800
This command sets the baud rate of the GPRS device to 4800.

3.3

Procedure of uploading data to a HTTP server

To connect our embedded device (Telit GM862) to an HTTP server and retrieve
an html page using the GPRS feature we precede as follows:

Initial data required:

o Server to be contacted: www.xyz.com (suppose)
o Application Layer Protocol: HTTP1.0 (RFC1945)
o Name of the script in the server to run
o GPRS settings:
APN: internet GPRS
IP of GPRS device: dynamically assigned by the network
DNS: assigned by the network
USERID: optional
PASSWORD: optional
Checking on the RFC990 the HTTP service we found that the port 80 is
dedicated for HTTP service, therefore the HTTP server will be waiting for
incoming connections on that port and we will fix the GPRS port to be contacted
on the remote server to 80. Second thing we have to discover is whether the
transport protocol has to be TCP or UDP; on the RFC1945 it is mentioned that
the HTTP Application layer protocol is meant to be on top of TCP/IP protocol,
therefore the transport protocol will be TCP. These are the information needed
to configure the system.
With our microcontroller we issue to the GM862-GPRS the following AT
commands:
o AT+CGDCONT = 1,"IP","mero","0.0.0.0",0,0<cr>

24

(1-GPRS context setting)

o AT#SKTSET= 0,80," www.xyz.com"<cr>
(3-remote host setting)
For our convenience we store all these parameters with the command:
AT#SKTSAV<cr>
Now we can activate the GPRS connection and let the GM862-GPRS module
contact the server:
AT#SKTOP<cr>
When we receive the connect indication, we can exchange data with the HTTP
server program on the remote host machine.
Further following the HTTP protocol we ask for the homepage by sending the
following lines on the serial line:
GET /sandeep.php?<GPS data> HTTP/1.0
Connection: Keep-Alive
Host: www.xyz.com

The server replies with a response line containing the HTTP version, status code, and
description, such as
HTTP/1.0 200 OK

Followed by the html data.

Or an error code as shown below.
HTTP/1.0 404 Not Found

3.4

Interfacing the GPRS terminal with the MCU

The communication protocol of the device is the asynchronous standard RS232 serial
communication with D9 connectors and RS-232 voltage levels. The serial data format is
8N1 with 4800 baud rate. Since the MCU only operates on TTL or CMOS voltage

25

levels some level conversion has to be done for the interfacing purpose which will be
described later.
The following block diagram shows the connection of the GPRS device with the MCU.
TX

MCU

RX

GPRS Device

DTR
DCD

Figure 3-5: Signal lines to interface the GPRS Terminal with the MCU

Since the serial communication is full-duplex the other handshaking signals such as RTS, CTS are
not required.

3.5

Powering the GPRS device

The GPRS device runs on a separate power source other than that used by other
components. It uses a 12 V regulated DC supply at peak 1.5 A current.

26

MICRO-CONTROLLER

4.1

Introduction

Intel introduced their microcontroller family MCS 8051 to the market during the 80s.
Although this family had quite limited capabilities by today's notions, it quickly
captivated the world and became the standard for what is today understood as
'microcontroller'. The most significant cause for such a success can be found in the
cleverly chosen configuration which can satisfy a diversity of needs, yet allowing for
continuous upgrades (in form of new controllers). In a brief period of time, a decent
amount of software has been developed for 8051, making further changes of the
hardware core simply uneconomical. Consequently, there is a variety of MCUs
available today, basically just the upgraded 8051 models. The microcontroller that we
are using in our project is an 89c52 microcontroller which is based on the 8051
architecture. It is a cost effective and easy solution for simple as well as complex
embedded systems. The four output ports, integration of UART, timing circuits,
interrupt handling makes AT89c52 a perfect choice for this project. Its features can be
summarized as:

8 kilobytes of ROM which is quite enough for many systems.

256 bytes of RAM (SFR registers included) can satisfy the basic needs.

4 ports totaling 32 I/O lines are usually sufficient for connecting to the
external cirtuits.

4.2

Serial Communication

The serial communication is possible with the help of the in-built UART in the MCU.
We just have to run the timers and select the appropriate serial communication mode
and then place the character to be transmitted in the SBUF( special function register).
The timing is required for the UART for receiving and transmitting purpose. Similarly
for the receiving purpose we have to set receive enable flag and then the received
character is stored in the SBUF register. The end of transmission or reception is
indicated by separate interrupt flags called TI and RI respectively.

27

4.2.1 Setting the SFRs

Certain Special Function Registers(SFR) has to be set in order to select the serial
communication mode.
The special function registers are SCON and PCON. The bit fields of the registers are
given below.
SCON

SM0

SM1

SM2

PCON

SMOD

REN

TB8

RB8

TI

RI

GF1

GFO

PD

IDL

Table 4-1: SCON and PCON Bit Fields

We have used the mode 2 for the serial communication. Hence SM0=0 AND SM1=1.
SM2 is set to 0 since it is required only in modes 2 and 3. REN is set to 0 for
transmitting and set to 1 for receiving purposes. TB8 and RB8 has been cleared to
indicate the 8th bit as 0. TI and RI is set by the MCU upon transmission or reception of
a character. While receiving the REN is set to 1.
Hence SCON=0x40
For the PCON register only the SMOD bit is set or reset. In our case SMOD=0.
Function for transmitting is shown in the figure below:
void transmit(char val)
{
SCON=0x40;
PCON=(PCON&0x7f);
SBUF=val;
while(!TI);
}

28

4.2.2

Baud Rate Generation

For the purpose of serial communication the UART of the MCU has to be input with
the clock signals. The frequency of the clock signals can be set by setting the bits of
SFRs TCON and TMOD. Their bit fields are shown below:
TF1

TR1

TF0

TR0

IE1

IT1

IE0

IT0

TMOD Gate

C/T

M1

M0

Gate

C/T

M1

M0

TCON

Table 4-2 Bit Fields of TCON and TMOD registers

Since we have used the timer1 in mode 2(auto reload 8 bit counter) we have set M1 as 1
and M0 as 0.the Gate of the timer 1 is set to 1 to start the timer. C/T of timer 1 is set to
0 to make it act as a timer instead of counter.
Hence TMOD= 0xA0. Bits 0 to 3 are for timer 1 operation hence not used
TR1 is set to run the timer. TF1 indicates the overflow of the timer which provides the
timing functions. TR0 and TF0 are not used. Other bits which are used for interrupt
purpose are not used. Hence we only have set TR1=1 to start the timer.
The baud rate frequency is determined by the formula
2SMOD
F = X TIMER 1 overflow frequency
32
Oscillator frequency
Timer 1 overflow frequency =
12 x [256-TH1]

For the baud rate of 4800 with the oscillator frequency 11.0592 MHz the value of TH1
came out to be 250. Hence TH1( Higher byte of 16 bit counter) was initialized with
250.

29

void init()
{
TMOD=0XA0;
TH1=250;
TR1=1;
}

Figure 4-1 Initializing the timing of 89c51

4.3

Interrupt Handling

For the handling of interrupts TCON SFR is used.

Pins INT0 and INT1 are used for external hardware interrupts. They set the IE0 and IE1
flags in the TCON register to 1 after the occurrence of an interrupt.
INT0 is set for causing interrupt by rising edge of input. It is connected to the GPS PPS
output. Hence TCON.0 is set to 0.
INT1 is set for causing interrupt by falling edge of input. It is connected to the external
interrupt causing circuit. Hence TCON.2 is set to 1.
To enable external or internal interrupts, the bit fields of SFR IE has to be modified
IE

EA

----

ET2

ES

ET1

EX1

ET0

EXO

Table 4-3 SFR IE bit fields

To enable the interrupt EA should be set to 1 and to use external interrupts EX1 and
EX0 should be set to 1. Hence IE.7,IE.2 and IE.0 are all set to 1.

30

The external interrupt causing circuit is shown below:

Figure 4-2 External Interrupt causing circuit

Initially the output of the circuit is high in the INT1 pin of the MCU but when the user
pushes the push button the pin becomes low so that an interrupt is triggered.
4.4

Connections to the microcontroller

The connection in and out of the microcontroller is shown with the help of the figure
below:

Figure 4-3 Connections to the MCU

31

Pins 40 and 20 are used for VCC and GND respectively. Pin 9 which is RESET pin has
a RC circuit which provides high to the pin 9 for required amount of time. The push
button with the reset circuit helps external reset at any time. The crystal oscillator is
connected with the pins 18 and 19. LED indicator is used to know about the working
state of the MCU. Pins 10 and 11 are used for RxD and TxD respectively. Pins 12 and
13 are used for the external interrupts. Other pins and ports are connected as shown in
the Figure 3-4 which will be described later in the report.

4.5

Powering the project

The components in the project have been powered by a DC 6V 4.5Ah Lead-Acid

battery. The 6V DC is converted into 5V regulated DC with the help of IC 7805. The
power input and the IC is shown in the figure below:

Figure 4-4 Power Supply to the project

4.6

Interfacing the LCD with the MCU

LCD is a device where we can display not just numbers, but also letters, words and all
manner of symbols, makes them a good deal more versatile than the familiar 7-segment
light emitting diode (LED.) displays. LCD modules are effective, economically,
powered by batteries and less power consumers too. LCD modules conform to a
standard interface specification. A 14-pin access is provided (14 holes for solder pin
insertion or for an IDC connector) having eight data lines, three control lines and three

32

power lines. The connections are laid out in one of two common configurations, either
two rows of seven pins, or a single row of 14 pins.
Pins 1 and 2 are the power supply lines, Vss and Vdd. The Vdd in should be connected
to the positive supply, and Vss to the 0V supply or ground. Although the LCD. module
data sheets specify a 5Vd.c. supply (at only a few milliamps), supplies of 6V and 4.5V
both work well.
Pin 3 is a control pin Vee, which is used to alter the contrast of the display. Pin 4 is the
Register Select (RS) line, the first of the three command control inputs. When this line
is low, data bytes transferred to the display are treated as commands, and data bytes
read from the display indicate its status. By setting the RS line high, character data can
be transferred to and from the module. Pin 5 is the Read/Write (R/W) line. This line is
pulled low in order to write commands or character data to the module, or pulled high
to read character data or status information from its registers. Pin 6 is the Enable (E)
line. This input is used to initiate the actual transfer of commands or character data
between the module and the data lines. When writing to the display, data is transferred
only on the high to low transition of this signal. Pins 7 to 14 are the eight data bus lines
(D0 to D7).
The timing diagram provides the information for both read and write cycles, fig .1.

Figure 4-5 Timing diagram

33

In the above timing diagram once line E is high, it must not be brought low again until
at least 450ns has elapsed, as is indicated by the tEH (time -- enable high). Also, all
eight data lines appropriate logic levels and allowed to stabilize for at least the tDS
(time data setup) period of 200ns before bringing line E low again, the LCD. allows the
data lines to be set up after line E is taken high. When line E is returned to a low level,
there are also two hold times that must be taken into account. The tAH (time address
hold) parameter indicates that the RS and R/W lines must not be altered for at least
10ns, and tDH' (time data hold) shows that none of the data lines must change for at
least 20ns. One further restriction exists. The E line must not be taken high again (for
the next command that is) for another 500ns (tEL: time enable low). This means that
the total cycle time of the E line is 450ns plus 500ns. Allowing for the rise and fall
times, indicated by tRF, which should be no longer than 25ns each, an approximate
value of 1ns can be calculated. This means that no more than one million commands (or
one million characters) per second should be sent to the display.
The microcontroller is be programmed to start by first setting the LCD.'s RS line to its
correct logic level. This is the line that determines whether the LCD. should regard data
as control instructions or character information. In cases where data needs to be read
back from the LCD., the microcontroller must also have control over the R/W line
(read/write).The microcontroller can set up these two signals at the same time, or it may
do one before the other, it doesn't really matter. What is important, is that they are both
valid or stable for a minimum period of time before the level on the E (Enable)
line is raised to a logic 1.
Now let us deal with the time required for the instruction execution. Most commands
tie-up the LCD. for 40ns, during which time it is said to be busy. The Clear Display
and Cursor Home commands, can take a lot longer. Much longer delays are required to
enable the LCD. to process commands and data. The practical implication of the
instruction times is just a case of having to insert a delay between one instruction and
the next. Example the two commands, Clear Display and Cursor Home, have variable
execution times that depend upon several factors.

34

The interfacing of the LCD with the MCU is shown with the figure below:-

Figure 4-6 Interfacing the LCD

We see that the data lines of the LCD are connected to the Port 0. Port 0 does not have
internal pull up. Hence we have to provide external pull up which is done by the 10k
resistor as the current requirement of the LCD data lines are very small. The RS, RW
and the E registers are respectively connected to the P1.0, P1.1 and P1.2

35

THE BRIDGING CIRCUITS

Different devices work in different standards. The intercommunication with such

devices is feasible logically but the direct physical connection between them is seldom
possible. The standards of communication of one device have to be changed in order to
communicate with another device. Also the channel of communication may be limited
as there may be more than one device using the same link for communication. Hence
the designed should be discrete about the standards conversion or providing the
communication link for all the devices connected to the same channel.
The bridging circuit in this project does just that. It provides the necessary voltage level
conversion or selects the serial path to communicate with a particular device. There are
two bridging circuits in this project. They are:
5.1

Voltage Level Translator

The serial communication is the backbone of this system and the devices communicate
with this standard. While the mode of communication between the different
components of the system is same there are logical differences between them. The
MCU operates in the TTL or CMOS voltage ranges, the GPS sensor and the GPRS
device operate on true RS232 voltage levels. Hence some conversion is required before
the interfacing is done. The voltage levels can be seen from the table below.
TTL
+2V to +5V
0V to +0.8V

RS-232

Logic

-15V to -3V

high

+3V to +15V

low

Table 5-1 TTL and RS-232 voltage levels

For this purpose we have used the hugely popular MAX 232 IC which provides an easy
solution to the logic level problems. There are two drivers and receivers in TTL as well
as RS-232 sides. The circuit provided in the datasheet is used in this project for our
purpose. We have used two such ICs for the voltage level conversions which can be
seen in the figures below:

36

Figure 5-1 Connections around IC MAX-232a

Figure 5-2 Connections around IC MAX232b

5.2

Serial multiplexing circuit

In this system there are two serial communication devices but the MCU has only one
UART. So here arises the need for the line multiplexing. The line multiplexing is done
with the arrangement of logic gates which selects a particular device and making only
the logical connection between the selected device for the transmission and reception
purpose while the transmission and reception lines of the other device remains floating.

37

The IC 74LS00 has been used for the serial line multiplexing purpose. It is a quad
NAND gate IC. Two such ICs were sufficient for this design as we only require 7
NAND gates for this purpose. The design is shown in the figure below:
The pins of the IC are shown in the design. Pins not shown are the VCC and the GND.
The circuit has been designed with hit and trial basis. Necessary arrangement of the
NAND gates were laid out and the lines interconnected until we got the desired output.
The pins Micro TX and Micro RX connects to the microcontroller directly. The pins
TO GPRS and TO GPS connects to the GPRS and GPS device after the voltage level
conversion circuits. The FROM GPRS and FROM GPS pins come from the devices
after the voltage level have been converted into TTL levels. The MICRO RX is the
receiving pin ie pin 10 of the MCU.

Figure 5-3 Serial line multiplexing circuit

38

The SRL_SLCT pin connects directly to the MCU. The selection of devices is shown in
the table below:SRL_SLCT

DEVICE SELECTED FOR Tx and Rx

0 (LOGIC LOW)

GPS

1(LOGIC HIGH)

GPRS

Table 5-2 Selection of serial device for communication

In this design the input output to only one of the device is possible at a time.

5.3

General interconnection between the embedded devices

In the block diagram, the general interconnection between the devices is as below:-

PPS
DCD

Tx

DTR

GPS sensor

Tx

MCU
Rx

Rx
Serial
Multiplexing
Circuit

Voltage
level
translation
Rx
DCD

GPRS terminal

Tx

Figure 5-4 Interconnection between the embedded devices

39

MICROCONTROLLER PROGRAM-FLOW CHART

The following flow or state diagram is used for this project

START
Set time as
global variable

Set GPS flag

C
Check
if
SMS

Is GPS
flag set?

Input data from

GPS sensor

Extract sender
information

Delete SMS

Connect to webserver

Send the GPS data

as an SMS
response

Wait for report

F

Any
error?

Is DCD
set?

Upload the GPS data

to the web-server

D
Figure 6-1 Main Program Flow

40

Is
time>1s

Is
time>1s

D
C

Set the DTR low

Interrupt handler

Count the GPS PPS

for the elapsed time.

Set the
gps flag

Is time=5?

Reset time

Return

continued Figure 6.1

41

SERVER SIDE PROGRAMS

The MCU with the help of the GPRS device connects to the remote server to upload the
GPS data. For this we have used the PHP script to collect the data send from the MCU
and JAVA applet to provide the information to the user about the location of the
vehicle.
7.1

PHP script

PHP is a reflective programming language originally designed for producing dynamic

web page. PHP is used mainly in server-side application software, but can be used from
a command line interface. PHP is an open source language and considered to be free
software by the free software foundation. PHP is about providing the programmer with
the necessary tools to get the job done in a quick and efficient fashion. PHP is simple,
familiar, flexible, secure and efficient software. PHP scripts are normally kept as
human-readable source code, even on production web-servers. PHP support for ObjectOriented Programming
PHP primarily acts as a filter. The PHP program takes input from a file or stream
containing text and special PHP instructions and outputs another stream of data for
display. PHP parser compiles input to produce byte-code for processing by the Zend
Engine, giving improved performance over its interpreter predecessor. PHP only parses
code within its delimiters, such as <?php ?>.Anything outside its delimiters is sent
directly to the output and not parsed by PHP. Variables are prefixed with a dollar
symbol and a type does not need to be specified in advance. Unlike function and class
names, variable names are case sensitive. Both double-quoted ("")s allow the ability to
embed the variable's value into the string. PHP treats new lines as white space, in the
manner of a free-form language (except when inside string quotes).Statements are
terminated by a semicolon, except in a few special cases.
Example:
< ?php
echo Hello World;
?>

42

In our PHP program arguments are passed to the script. These argument are stored in a
file named data.txt in the form of ASCII. The file size of the data.txt file is checked to
limit its size to 500 bytes only. The stored data in file name data.txt is used as the
source for JAVA-operation. The web-server used for this project much be a PHP
powered web-server.
We can pass arguments to the PHP script with the following address line:http://xyz.com/abc.php?THIS IS THE DATA TO BE PASSED

The PHP code used in this project is as follows:<?php

$args=$_SERVER['argv'];
$file_name="data.txt";
$handler=fopen($file_name,"w") or die("File ($file_name) does not
exist!");
$fs=filesize("data.txt");
fclose($handler);
if($fs>500) {unlink("data.txt");}
$handler=fopen($file_name,"w") or die("File ($file_name) does not
exist!");
fwrite($handler,"$args[0] \n");
fclose($handler);
?>

7.2

JAVA

The JAVATM platform is based on the concept write once, run anywhere. The idea is
that the same software should run on different kinds of computers, consumer gadgets,
and other devices. The JAVA platform is being built into next generation consumer and
business devices like telephone, smart cards etc.
Java is a programming language popularly used to build programs that can work on the
Internet. Its primary features also include being object-oriented in addition to being a
cross platform language. By cross platform, we mean that its programs can run across
several platforms such as Microsoft Windows, Apple Macintosh etc. Java is not only
used for stand-alone applications or Net based programs but also to program consumer
devices and accessories such as cellular phones, palm pilots and other gadgets.

43

Programs on the internet can be either static or dynamic. Static programs though easy to
maintain are limited in scope and application. Prior to Java, there were very few means
of executing dynamic programs on the Internet. Through its special category of
programs called Applets, Java provides a powerful feature to address the issues. Applets
are Java programs that run through a Java enabled web browser. Though there are
numerous dynamic programs on the Internet such as animations or media files, applets
are intelligent programs as compared to these. An applet can react and respond to user
input and actions.
An applet has to be downloaded on the user's system before it can work. This could
mean a huge potential risk for the user's system in terms of malicious programs or
viruses. However, Java was designed in such a way that this issue was automatically
taken care of. A Java applet is designed to work in a pre-defined "sandbox". The Java
"Sandbox" theory states that the areas, which a program can access, are restricted and
controlled such that no potential damage can be caused to a user's system. This control
is exercised by the JVM or the Java Virtual Machine.
Unlike most programming languages that generate executable code after compilation,
the JVM generates byte codes as a result of compilation. Java byte codes are a form of
instructions understood by the Java Virtual Machine and usually generated as a result of
compiling Java language source code.
It is the byte codes that are downloaded every time a user wishes to run an applet on his
system. These byte codes cannot be executed without the JVM and thus they always
remain within the control of the JVM.
7.2.1

Applets

Applets are Java programs that are created specially to work on the Internet. They
run through a Java enabled browser such as Netscape or Internet Explorer. An
applet can be created using any Java development editing tool. It must be contained
or embedded within Web page or HTML file. When the Web page or HTML file is
displayed on a browser, the applet is loaded and executed.

44

7.2.2

Java Virtual Machine (JVM)

The Java Virtual Machine or JVM, as it is popularly known, has an Interpreter

component that enables communication between Java byte code and a computer's
operating system. Using a JVM, you can run Java code on any platform such as
Macintosh, Windows, UNIX etc. A JVM normally reads and executes Java statements
one at a time. A JVM can however include a JIT (a just-in-time) compiler within it. A
JIT compiler converts whole programs to byte codes and is thus faster than a
conventional JVM. The Microsoft JVM, Microsoft Internet Explorer 7.0, and Netscape
Navigator 5.0 all include JIT technology.
The JVM is responsible for all the key factors constituting the Java language's
popularity such s platform independence, the small size of its compiled code and its
ability to erect "firewalls" between the code and the user's system. The JVM does not
know anything about the Java programming language. It only recognizes a particular
binary format of a file called class file. A class file contains Java virtual machine
instructions. Each class file contains the definition or a single class or interface.
7.2.3

Java Implementation

We have used Java for the translation of the coordinate points of the vehicle into a map.
The position tracked by the GPS receiver is uploaded into a Web server with the help of
a GPRS modem. These positions can be viewed by the user in an applet which runs on a
Web page.
The Java program reads the data which has been uploaded into a Web server file. These
data's are in the following format
$PGRMF,<1>,<2>,<3>,<4>,<5>,<6>,<7>,<8>,<9>,<10>,<11>,<12>,<13>,<14>,<15>
*hh<CR><LF>

45

<1>

GPS week number (0-1023)*

<2>

GPS seconds (0 - 604799)*

<3>

date of position fix, ddmmyy format*

<4>

time of position fix, hhmms format

<5>

GPS leap second count*

<6>

Latitude, ddmm.mmmm format

<7>

Latitude hemisphere, N or S

<8>

Longitude, dddmm.mmmm format

<9>

Longitude hemisphere, E or W

<10>

Mode, M = manual, A =automatic*

<11>

Fix type,0 = nofix,1 = 2D fix, 2=3Dfix*

<12>

Speed over ground,0 to1851 kilometers/hour

<13>

Course over ground, 0 to359 degrees, true*

<14>

Position dilution of precision,0 to 9 (rounded to nearest integer value)*

<15>

Time dilution of precision, 0 to 9 (rounded to nearest integer value)*

Table 7-1 Received data format

*Not required
Here the only information we require are the time of position, Latitude, Longitude and
the Speed.
For example the received sentence is as follows
$PGRMF,,,12102006,061025,,2737.6476,N,8519.5555,E,A,,0.1,,,,
Our Java program first separates the useful data's such as the Latitude, Longitude,
Speed and Time and stores them in separate variables. The Longitude and Latitude
values are then plotted into a Map loaded onto an applet. The applet first loads the Map
that the latitude and longitude values confirm to. Then the positions conveyed by the
Latitude and Longitude values are plot on the Map along with the speed of the vehicle
and time of the position. These applets are run with the help of an HTML page and can

46

be viewed from any computer with an internet access and a JVM installed. The HTML
page automatically refreshes plotting the position at that time onto the MAP applet. As
our GPS receiver is initialized to receive the positional values at every 5 seconds, the
positions on the MAP applet will change every 5 seconds.
The maps images used have been obtained using the Google Earth software. The maps
images have been taken from the height of 6535 feet's from the surface of the earth. The
map images of 25 areas around the Kathmandu Valley have been used. The selection of
an appropriate map is done if the incoming latitude and longitude data lie on the
positional range of any of the 25 map image. If the incoming latitude and longitude data
does not lie on any of the 25 available map images then a blank applet is loaded and the
positional information is displayed numerically i.e. only the Latitude and Longitude
values are displayed.
One such map of the Dhapakhel area of Lalitpur is given below.

Figure 7-1 Map of Dhapakhel

The positions have been plotted into the map with respect to the applet size which has
been set up as height=450 and width=700.

47

The Flowchart of the program is as follows

Start
Read the sentence
from the file

Separate the required

informations

Is the latitude and

longitude data within
the desired range of
our available map
image?

No

Yes
Select a blank
image

Select the map

image

Plot the latitude

and longitudes

Display the speed

and time

Stop

Figure 7-2 Flowchart of Java program

48

PROJECT DEVELOPMENT CHART

S.No

Week No

Duration

Job

1.

1-2

Detailed study and preparation of

proposal

2.

Project Layout and formulation

3.

4-7

Hardware Design and implementation

4.

8-11

Coding software for Microcontroller

5.

12

Testing and Debugging of separate parts

6.

13-14

Assembly of whole project with final

testing and debugging

7.

15

Preparation of final report

49

FINAL WORDS

9.1

Limitations
a) The main limitation of the system is that it incorporates costly devices. The
unavailability such devices inside the country has helped to raise the cost of the
devices.
b) The accuracy of the positioning system is totally based on the accuracy of the
GPS sensor. Hence accurate and costly devices required.
c) The power consumption of the components of the system are somewhat greater.
Hence frequent recharging of the battery necessary.
d) The navigation display at the vehicle shows only the latitude and longitude of
the vehicle. Hence the navigation is time consuming while translating the
coordinated to the place name.
e) The SMS response also contains the geographical information only. Hence
causes difficulty to the user.
f) Only maps of certain locations will be displayed by the Applet.

9.2

Problems Encountered

We have faced many problems and glitches during the course of our project
development. Some of the problems were solved immediately, while others used a lot
of our time. These major problems are listed below.
a) The first problem we faced was collecting the equipments required for the
project. The equipments such as the GPS receiver and the GPRS modem were
not available in the country. So they had to be acquired from abroad.
b) There were some programming problems with the MCU. Some of the results in
the programming phase were completely opposite of the expected output.
c) Secondly we experienced some problem while displaying a map applet on the
HTML page.
d) The PCB Design was a very hard-work demanding task. We had to design and
redesign the PCB for the manufacturing purpose.

50

9.3

Future Enhancements

The final output we've achieved is what we had set for. But still there is room for lots
more enhancements and additional facilities. Some of these enhancements are listed
below.
a) Currently our system is able to detect and display the positions of the vehicles
only at the 25 major areas of the Kathmandu Valley. The system can be
extended internationally after interfacing with a digital map.
b) The system provides only the current position of the vehicle but it can be
enhanced to keep track of past vehicle positions as well.
c) The SMS response could be made more meaningful than just the long-lat
information.
d) For navigation, currently we have only installed a LCD display on the vehicle.
But this can be enhanced in order to provide a digital graphical display (map) on
the vehicle itself.
e) The whole system can be made more secure to ensure that the data is only
available to the authorized person.
f) The system can be modified for remote access to any system. The monitoring
and control can also be possible.
g) The vehicles could be inter-networked and used for some automatic specialized
jobs.

9.4

Applications

Our vehicle tracking and navigation device has wide spread application. These
applications are

Vehicle Tracking

Vehicle Navigation

Fleet Management

Traffic management

Emergency abatement

51

9.5

Discussion

During the course of our project development we made ourselves familiar with different
existing technologies such as the GPS and the GPRS. We have combined the
application of both the GPS ,GPRS and the internet technology to build a vehicle
tracking and navigation system.
The GPS and GPRS devices were tested and initial settings were initialized with the
help of a PC extensively. Some of the software used were Advance Serial Port Monitor,
Hyper Terminal, Residient I/O Commander, Ethereal etc We used GARMINS
proprietary NMEA sentences to communicate with the GPS receiver, whereas used the
AT commands for the GPRS modem. The intermediate results of the portion of designs
were tested with the help of the PC and with the LCD interfaced with the system.
We have implemented the whole design in a PCB. This makes the system robust and
free from interconnection errors. Also the design can be made compact. The designed
PCB contains two layers. The ground and the supply lines are wider since they carry a
larger amount of current than that of other tracks.
Our system is able to track vehicle in 25 areas around the Kathmandu Valley. The
positions are displayed in a MAP along with the speed of the vehicle and the time of
that position. With this system it becomes easy for the users to keep track of their
vehicles. In case of the theft of the vehicles the lost vehicles can easily be traced out if
the vehicle resides in any one of our 25 maps, otherwise the positional data in terms of
latitude and longitude is provided. Also the system can be used by the Army and the
Police for Fleet Management.
With this project we have become able to implement and demonstrate a M2M
communications based system. While this undertaking has equipped us with lots of
practical knowledge and interpersonal skills we hope that it will also be a precursor to
other great applications.

52

10

REFERENCES

Books

"Wireless Communications" by: Theodore S. Rappaport

"The 8051 Microcontroller" by: Kenneth J. Ayala

"Mastering JavaTM 2 J2SE 1.4" by John Zukowski

Java Programming Technical Reference by NIIT

E-books

GPRS Technical Review by By Natalia V. Rivera and Dr. Belka Kraimeche

GPRS White Paper by Cisco Co.

Data Communications Lecture by A.W. Krings

A Programmers Introduction to PHP 4.0 by W.J. Gilmore

TER-GX10X-Interfaces provided by the GPRS device manufacturer.

RS-Easy-GPRSv2 provided by the GPRS device namuufacturer.

How to Use Intelligent LCDs Part I and Part II by Julyan IIett

Introduction to the 8051 based System Development by Parivallal Kannan

SDCC Documentation with the SDCC comiler.

Websites

www.garmin.com

www.gsm-modem.de

www.roundsolutoins.com

www.datasheets4u.com

www.phpit.net/article/php-on-command-line/1/

www.8051.com

www.en.wikipedia.org)

53

APPENDIX A: PCB PRINTS

54

PCB DESIGN TOP LAYER

MIRROR IMAGE OF BOTTOM LAYER

Power input

42

JP1
DS1
R2

680

LED1

41

P89C51X2BN

osc.

C15

33pf

C1

R1

10uF
+

8.2k

MAX232ACPE

33pf
C2

IC232_B

LM7805CT

XTAL

C13
+ 1uF

S1

ON

AT89C51

C3

10k

1uF

C4

1uF 1uF +
+

SW-PB

1uF

C14
R3

C11

0.1uF

C10 C12

RESET

SW-PB
C8
1uF

CHANGE

C9
C6
C5
1uF + 1uF + 1uF+ 1uF

7400_2
DM74LS00N

7400_1
DM74LS00N

44

C7

GPS

MAX232ACPE

43

COMPONENTS LAYOUT

IC232_A

APPENDIX B: DATASHEETS

58

Features

Compatible with MCS-51 Products

8K Bytes of In-System Reprogrammable Flash Memory
Endurance: 1,000 Write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-level Program Memory Lock
256 x 8-Bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Eight Interrupt Sources
Programmable Serial Channel
Low Power Idle and Power Down Modes

Description
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K
bytes of Flash programmable and erasable read only memory (PEROM). The device
is manufactured using Atmels high density nonvolatile memory technology and is
compatible with the industry standard 80C51 and 80C52 instruction set and pinout.
The on-chip Flash allows the program memory to be reprogrammed in-system or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputer
which provides a highly flexible and cost effective solution to many embedded control
applications.
(continued)

Pin Configurations
P1.4
P1.3
P1.2
P1.1 (T2 EX)
P1.0 (T2)
NC
VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)

(T2) P1.0
(T2 EX) P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
XTAL2
XTAL1
GND

(WR) P3.6
(RD) P3.7
XTAL2
XTAL1
GND
NC
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4

12
13
14
15
16
17
18
19
20
21
22

1
2
3
4
5
6
7
8
9
10
11

AT89C52

PDIP

PQFP/TQFP

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)

7
8
9
10
11
12
13
14
15
16
17

39
38
37
36
35
34
33
32
31
30
29

18
19
20
21
22
23
24
25
26
27
28

P1.5
P1.6
P1.7
RST
(RXD) P3.0
NC
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5

6
5
4
3
2
1
44
43
42
41
40

P1.4
P1.3
P1.2
P1.1 (T2 EX)
P1.0 (T2)
NC
VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)

PLCC

(WR) P3.6
(RD) P3.7
XTAL 2
XTAL1
GND
NC
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4

P1.5
P1.6
P1.7
RST
(RXD) P3.0
NC
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
iT1) P3.5

8-bit
Microcontroller
with 8K Bytes
Flash

P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)

Rev. 0313G04/99

Block Diagram
P0.0 - P0.7

P2.0 - P2.7

PORT 0 DRIVERS

PORT 2 DRIVERS

VCC

GND

RAM ADDR.
REGISTER

B
REGISTER

PORT 0
LATCH

RAM

QUICK
FLASH

PORT 2
LATCH

STACK
POINTER

ACC

BUFFER

TMP1

TMP2

PROGRAM
ADDRESS
REGISTER

PC
INCREMENTER

ALU
INTERRUPT, SERIAL PORT,
AND TIMER BLOCKS

PROGRAM
COUNTER

PSW

PSEN
ALE/PROG
EA / VPP

TIMING
AND
CONTROL

INSTRUCTION
REGISTER

DPTR

RST
PORT 1
LATCH

PORT 3
LATCH

PORT 1 DRIVERS

PORT 3 DRIVERS

OSC

P1.0 - P1.7

AT89C52

P3.0 - P3.7

AT89C52
The AT89C52 provides the following standard features: 8K
bytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bit
timer/counters, a six-vector two-level interrupt architecture,
a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89C52 is designed with static logic
for operation down to zero frequency and supports two
software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters,
serial port, and interrupt system to continue functioning.
The Power Down Mode saves the RAM contents but
freezes the oscillator, disabling all other chip functions until
the next hardware reset.

Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups.
The Port 2 output buffers can sink/source four TTL inputs.
When 1s are written to Port 2 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 2 pins that are externally being pulled low will source
current (IIL) because of the internal pullups.

Pin Description

Port 2 emits the high-order address byte during fetches

from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data
memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register.

VCC
Supply voltage.

Port 2 also receives the high-order address bits and some

control signals during Flash programming and verification.

GND
Ground.

Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups.
The Port 3 output buffers can sink/source four TTL inputs.
When 1s are written to Port 3 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 3 pins that are externally being pulled low will source
current (IIL) because of the pullups.

Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an
output port, each pin can sink eight TTL inputs. When 1s
are written to port 0 pins, the pins can be used as highimpedance inputs.
Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal
pullups.

Port 3 also serves the functions of various special features

of the AT89C51, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.

Port 0 also receives the code bytes during Flash programmi ng an d ou tpu ts the c o de b y tes du r in g pr o gr a m
verification. External pullups are required during program
verification.

Port Pin

Alternate Functions

P3.0

RXD (serial input port)

P3.1

TXD (serial output port)

Port 1

P3.2

INT0 (external interrupt 0)

Port 1 is an 8-bit bidirectional I/O port with internal pullups.

The Port 1 output buffers can sink/source four TTL inputs.
When 1s are written to Port 1 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 1 pins that are externally being pulled low will source
current (IIL) because of the internal pullups.

P3.3

INT1 (external interrupt 1)

P3.4

T0 (timer 0 external input)

P3.5

T1 (timer 1 external input)

P3.6

WR (external data memory write strobe)

P3.7

RD (external data memory read strobe)

In addition, P1.0 and P1.1 can be configured to be the

timer/counter 2 external count input (P1.0/T2) and the
timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
Port 1 also receives the low-order address bytes during
Flash programming and verification.
Port Pin

Alternate Functions

P1.0

T2 (external count input to Timer/Counter 2),

clock-out

P1.1

T2EX (Timer/Counter 2 capture/reload trigger and

direction control)

RST
Reset input. A high on this pin for two machine cycles while
the oscillator is running resets the device.
ALE/PROG
Address Latch Enable is an output pulse for latching the
low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6
the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE
3

pulse is skipped during each access to external data

memory.
If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no
effect if the microcontroller is in external execution mode.

EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to V C C for internal program
executions.

PSEN
Program Store Enable is the read strobe to external program memory.

This pin also receives the 12-volt programming enable voltage (V P P ) during Flash programming when 12-volt
programming is selected.

When the AT89C52 is executing code from external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during
each access to external data memory.

XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.

Table 1. AT89C52 SFR Map and Reset Values

0F8H

0F0H

0FFH
B
00000000

0F7H

0E8H

0E0H

0EFH
ACC
00000000

0E7H

0D8H

0DFH

0D0H

PSW
00000000

0C8H

T2CON
00000000

0D7H
T2MOD
XXXXXX00

RCAP2L
00000000

RCAP2H
00000000

TL2
00000000

TH2
00000000

0CFH

0C0H

0C7H

0B8H

0BFH

0B0H

P3
11111111

0B7H

0A8H

IE
0X000000

0AFH

0A0H

P2
11111111

0A7H

98H

SCON
00000000

90H

P1
11111111

88H

TCON
00000000

TMOD
00000000

TL0
00000000

TL1
00000000

80H

IP
XX000000

P0
11111111

SP
00000111

DPL
00000000

DPH
00000000

SBUF
XXXXXXXX

9FH

97H

AT89C52

TH0
00000000

TH1
00000000

8FH
PCON
0XXX0000

87H

AT89C52
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future products to invoke

new features. In that case, the reset or inactive values of

the new bits will always be 0.
Timer 2 Registers Control and status bits are contained in
registers T2CON (shown in Table 2) and T2MOD (shown in
Table 4) for Timer 2. The register pair (RCAP2H, RCAP2L)
are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers The individual interrupt enable bits are
in the IE register. Two priorities can be set for each of the
six interrupt sources in the IP register.

Table 2. T2CONTimer/Counter 2 Control Register

T2CON Address = 0C8H

Reset Value = 0000 0000B

Bit Addressable
Bit

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2

CP/RL2

Symbol

Function

TF2

Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software. TF2 will not be set when either
RCLK = 1 or TCLK = 1.

EXF2

Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and EXEN2 =
1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2 interrupt routine. EXF2
must be cleared by software. EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1).

RCLK

Receive clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its receive clock in serial
port Modes 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive clock.

TCLK

Transmit clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its transmit clock in serial
port Modes 1 and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock.

EXEN2

Timer 2 external enable. When set, allows a capture or reload to occur as a result of a negative transition on T2EX
if Timer 2 is not being used to clock the serial port. EXEN2 = 0 causes Timer 2 to ignore events at T2EX.

TR2

Start/Stop control for Timer 2. TR2 = 1 starts the timer.

C/T2

Timer or counter select for Timer 2. C/T2 = 0 for timer function. C/T2 = 1 for external event counter (falling edge
triggered).

CP/RL2

Capture/Reload select. CP/RL2 = 1 causes captures to occur on negative transitions at T2EX if EXEN2 = 1. CP/RL2
= 0 causes automatic reloads to occur when Timer 2 overflows or negative transitions occur at T2EX when EXEN2
= 1. When either RCLK or TCLK = 1, this bit is ignored and the timer is forced to auto-reload on Timer 2 overflow.

Data Memory
The AT89C52 implements 256 bytes of on-chip RAM. The
upper 128 bytes occupy a parallel address space to the
Special Function Registers. That means the upper 128
bytes have the same addresses as the SFR space but are
physically separate from SFR space.
When an instruction accesses an internal location above
address 7FH, the address mode used in the instruction
specifies whether the CPU accesses the upper 128 bytes
of RAM or the SFR space. Instructions that use direct
addressing access SFR space.

For example, the following direct addressing instruction

accesses the SFR at location 0A0H (which is P2).
MOV 0A0H, #data

Instructions that use indirect addressing access the upper

128 bytes of RAM. For example, the following indirect
addressing instruction, where R0 contains 0A0H, accesses
the data byte at address 0A0H, rather than P2 (whose
address is 0A0H).
MOV @R0, #data

Note that stack operations are examples of indirect

addressing, so the upper 128 bytes of data RAM are available as stack space.

Timer 0 and 1
Timer 0 and Timer 1 in the AT89C52 operate the same way
as Timer 0 and Timer 1 in the AT89C51.

Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either
a timer or an event counter. The type of operation is
selected by bit C/T2 in the SFR T2CON (shown in Table 2).
Timer 2 has three operating modes: capture, auto-reload
(up or down counting), and baud rate generator. The
modes are selected by bits in T2CON, as shown in Table 3.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the
Timer function, the TL2 register is incremented every
machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator
frequency.
Table 3. Timer 2 Operating Modes
MODE

count is incremented. The new count value appears in the

register during S3P1 of the cycle following the one in which
the transition was detected. Since two machine cycles (24
oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator
frequency. To ensure that a given level is sampled at least
once before it changes, the level should be held for at least
one full machine cycle.

Capture Mode
In the capture mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer
or counter which upon overflow sets bit TF2 in T2CON.
This bit can then be used to generate an interrupt. If
EXEN2 = 1, Timer 2 performs the same operation, but a 1to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and
RCAP2L, respectively. In addition, the transition at T2EX
causes bit EXF2 in T2CON to be set. The EXF2 bit, like
TF2, can generate an interrupt. The capture mode is illustrated in Figure 1.

RCLK +TCLK

CP/RL2

TR2

16-bit Auto-Reload

16-bit Capture

Auto-reload (Up or Down Counter)

Baud Rate Generator

(Off)

Timer 2 can be programmed to count up or down when

configured in its 16-bit auto-reload mode. This feature is
invoked by the DCEN (Down Counter Enable) bit located in
the SFR T2MOD (see Table 4). Upon reset, the DCEN bit
is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on
the value of the T2EX pin.

In the Counter function, the register is incremented in

response to a 1-to-0 transition at its corresponding external
input pin, T2. In this function, the external input is sampled
during S5P2 of every machine cycle. When the samples
show a high in one cycle and a low in the next cycle, the
Figure 1. Timer in Capture Mode
12

OSC

C/T2 = 0
TH2

TL2

OVERFLOW

CONTROL
C/T2 = 1

TF2

TR2
CAPTURE

T2 PIN

RCAP2H RCAP2L
TRANSITION
DETECTOR

TIMER 2
INTERRUPT

T2EX PIN

EXF2
CONTROL
EXEN2

AT89C52

AT89C52
Figure 2 shows Timer 2 automatically counting up when
DCEN = 0. In this mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to
0FFFFH and then sets the TF2 bit upon overflow. The
overflow also causes the timer registers to be reloaded with
the 16-bit value in RCAP2H and RCAP2L. The values in
Timer in Capture ModeRCAP2H and RCAP2L are preset
by software. If EXEN2 = 1, a 16-bit reload can be triggered
either by an overflow or by a 1-to-0 transition at external
input T2EX. This transition also sets the EXF2 bit. Both the
TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down,
as shown in Figure 3. In this mode, the T2EX pin controls

the direction of the count. A logic 1 at T2EX makes Timer 2

count up. The timer will overflow at 0FFFFH and set the
TF2 bit. This overflow also causes the 16-bit value in
RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively.
A logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal the values stored in
RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or
underflows and can be used as a 17th bit of resolution. In
this operating mode, EXF2 does not flag an interrupt.

Figure 2. Timer 2 Auto Reload Mode (DCEN = 0)

12

OSC

C/T2 = 0
TH2

TL2
OVERFLOW

CONTROL
TR2
C/T2 = 1

RELOAD
TIMER 2
INTERRUPT

T2 PIN
RCAP2H RCAP2L
TF2
TRANSITION
DETECTOR
EXF2

T2EX PIN
CONTROL
EXEN2

Table 4. T2MODTimer 2 Mode Control Register

T2MOD Address = 0C9H

Reset Value = XXXX XX00B

Not Bit Addressable

Bit

T2OE

DCEN

Symbol

Function

Not implemented, reserved for future

T2OE

Timer 2 Output Enable bit.

DCEN

When set, this bit allows Timer 2 to be configured as an up/down counter.

Figure 3. Timer 2 Auto Reload Mode (DCEN = 1)

(DOWN COUNTING RELOAD VALUE)
0FFH

12

OSC

TOGGLE

0FFH

EXF2

OVERFLOW
C/T2 = 0
TH2

TL2

TF2

CONTROL
TR2
C/T2 = 1

TIMER 2
INTERRUPT

T2 PIN
RCAP2H RCAP2L
COUNT
DIRECTION
1=UP
0=DOWN

(UP COUNTING RELOAD VALUE)

T2EX PIN

Figure 4. Timer 2 in Baud Rate Generator Mode

TIMER 1 OVERFLOW

2
"0"

"1"

NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12

SMOD1
OSC

C/T2 = 0
"1"
TH2

"0"

TL2
RCLK

CONTROL
TR2

16

Rx
CLOCK

C/T2 = 1
"1"

"0"

T2 PIN
TCLK

RCAP2H RCAP2L
TRANSITION
DETECTOR

16

T2EX PIN

EXF2
CONTROL
EXEN2

AT89C52

TIMER 2
INTERRUPT

Tx
CLOCK

AT89C52
Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting
TCLK and/or RCLK in T2CON (Table 2). Note that the
baud rates for transmit and receive can be different if Timer
2 is used for the receiver or transmitter and Timer 1 is used
for the other function. Setting RCLK and/or TCLK puts
Timer 2 into its baud rate generator mode, as shown in Figure 4.
The baud rate generator mode is similar to the auto-reload
mode, in that a rollover in TH2 causes the Timer 2 registers
to be reloaded with the 16-bit value in registers RCAP2H
and RCAP2L, which are preset by software.
The baud rates in Modes 1 and 3 are determined by Timer
2s overflow rate according to the following equation.
Timer 2 Overflow Rate
Modes 1 and 3 Baud Rates = ----------------------------------------------------------16

The Timer can be configured for either timer or counter

operation. In most applications, it is configured for timer
operation (CP/T2 = 0). The timer operation is different for
Timer 2 when it is used as a baud rate generator. Normally,
as a timer, it increments every machine cycle (at 1/12 the
oscillator frequency). As a baud rate generator, however, it

increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.
Modes 1 and 3
Oscillator Frequency
-------------------------------------- = --------------------------------------------------------------------------------------------Baud Rate
32 [ 65536 (RCAP2H,RCAP2L) ]

where (RCAP2H, RCAP2L) is the content of RCAP2H and

RCAP2L taken as a 16-bit unsigned integer.
Timer 2 as a baud rate generator is shown in Figure 4. This
figure is valid only if RCLK or TCLK = 1 in T2CON. Note
that a rollover in TH2 does not set TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0
transition in T2EX will set EXF2 but will not cause a reload
from (RCAP2H, RCAP2L) to (TH2, TL2). Thus when Timer
2 is in use as a baud rate generator, T2EX can be used as
an extra external interrupt.
Note that when Timer 2 is running (TR2 = 1) as a timer in
the baud rate generator mode, TH2 or TL2 should not be
read from or written to. Under these conditions, the Timer is
incremented every state time, and the results of a read or
write may not be accurate. The RCAP2 registers may be
read but should not be written to, because a write might
overlap a reload and cause write and/or reload errors. The
timer should be turned off (clear TR2) before accessing the
Timer 2 or RCAP2 registers.

Figure 5. Timer 2 in Clock-out Mode

TL2
(8-BITS)

TH2
(8-BITS)

RCAP2L

OSC

RCAP2H

TR2

C/T2 BIT

P1.0
(T2)

T2OE (T2MOD.1)
TRANSITION
DETECTOR
P1.1
(T2EX)

EXF2

TIMER 2
INTERRUPT

EXEN2

Programmable Clock Out

Table 5. Interrupt Enable (IE) Register

(MSB)

A 50% duty cycle clock can be programmed to come out on

P1.0, as shown in Figure 5. This pin, besides being a regular I/O pin, has two alter nate fu nctio ns. It can b e
programmed to input the external clock for Timer/Counter 2
or to output a 50% duty cycle clock ranging from 61 Hz to 4
MHz at a 16 MHz operating frequency.
To configure the Timer/Counter 2 as a clock generator, bit
C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1)
must be set. Bit TR2 (T2CON.2) starts and stops the timer.

EA

(LSB)

ET2

In the clock-out mode, Timer 2 roll-overs will not generate

an interrupt. This behavior is similar to when Timer 2 is
used as a baud-rate generator. It is possible to use Timer 2
as a baud-rate generator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out
frequencies cannot be determined independently from one
another since they both use RCAP2H and RCAP2L.

UART
The UART in the AT89C52 operates the same way as the
UART in the AT89C51.

ET1

EX1

Symbol

Position

Function

EA

IE.7

Disables all interrupts. If EA = 0,

no interrupt is acknowledged. If
EA = 1, each interrupt source is
individually enabled or disabled
by setting or clearing its enable
bit.

IE.6

Reserved.

ET2

IE.5

Timer 2 interrupt enable bit.

ES

IE.4

Serial Port interrupt enable bit.

ET1

IE.3

Timer 1 interrupt enable bit.

EX1

IE.2

External interrupt 1 enable bit.

ET0

IE.1

Timer 0 interrupt enable bit.

EX0

IE.0

External interrupt 0 enable bit.

User software should never write 1s to unimplemented bits,

because they may be used in future AT89 products.

Figure 6. Interrupt Sources

Each of these interrupt sources can be individually enabled

or disabled by setting or clearing a bit in Special Function
Register IE. IE also contains a global disable bit, EA, which
disables all interrupts at once.
Note that Table 5 shows that bit position IE.6 is unimplemented. In the A T89 C5 1, bit positi on IE.5 is als o
unimplemented. User software should not write 1s to these
bit positions, since they may be used in future AT89
products.
Timer 2 interrupt is generated by the logical OR of bits TF2
and EXF2 in register T2CON. Neither of these flags is
cleared by hardware when the service routine is vectored
to. In fact, the service routine may have to determine
whether it was TF2 or EXF2 that generated the interrupt,
and that bit will have to be cleared in software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at
S5P2 of the cycle in which the timers overflow. The values
are then polled by the circuitry in the next cycle. However,
the Timer 2 flag, TF2, is set at S2P2 and is polled in the
same cycle in which the timer overflows.
10

AT89C52

EX0

Enable Bit = 0 disables the interrupt.

Interrupts
The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts
(Timers 0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 6.

ET0

Enable Bit = 1 enables the interrupt.

The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers
(RCAP2H, RCAP2L), as shown in the following equation.
Oscillator Fequency
Clock-Out Frequency = ----------------------------------------------------------------------------------------4 [ 65536 (RCAP2H,RCAP2L) ]

ES

0
INT0

IE0
1

TF0

0
INT1

IE1
1

TF1
TI
RI
TF2
EXF2

AT89C52
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively,
of an inverting amplifier that can be configured for use as
an on-chip oscillator, as shown in Figure 7. Either a quartz
crystal or ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven, as shown in Figure 8.
There are no requirements on the duty cycle of the external
clock signal, since the input to the internal clocking circuitry
is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be
observed.

active long enough to allow the oscillator to restart and

stabilize.
Figure 7. Oscillator Connections
C2
XTAL2

C1
XTAL1

Idle Mode
In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by
software. The content of the on-chip RAM and all the special functions registers remain unchanged during this
mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
Note that when idle mode is terminated by a hardware
reset, the device normally resumes program execution
from where it left off, up to two machine cycles before the
internal reset algorithm takes control. On-chip hardware
inhibits access to internal RAM in this event, but access to
the port pins is not inhibited. To eliminate the possibility of
an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that
invokes idle mode should not write to a port pin or to external memory.

GND

Note:

C1, C2 = 30 pF 10 pF for Crystals

= 40 pF 10 pF for Ceramic Resonators

Figure 8. External Clock Drive Configuration

NC

EXTERNAL
OSCILLATOR
SIGNAL

Power Down Mode

XTAL2

XTAL1

In the power down mode, the oscillator is stopped, and the

instruction that invokes power down is the last instruction
executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is
terminated. The only exit from power down is a hardware
reset. Reset redefines the SFRs but does not change the
on-chip RAM. The reset should not be activated before VCC
is restored to its normal operating level and must be held

GND

Status of External Pins During Idle and Power Down Modes

Mode

Program Memory

ALE

PSEN

PORT0

PORT1

PORT2

PORT3

Idle

Internal

Data

Data

Data

Data

Idle

External

Float

Data

Address

Data

Power Down

Internal

Data

Data

Data

Data

Power Down

External

Float

Data

Data

Data

11

Absolute Maximum Ratings*

Operating Temperature .................................. -55C to +125C

*NOTICE:

Storage Temperature ..................................... -65C to +150C

Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage............................................. 6.6V

Stresses beyond those listed under Absolute

Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.

DC Output Current...................................................... 15.0 mA

DC Characteristics
The values shown in this table are valid for TA = -40C to 85C and VCC = 5.0V 20%, unless otherwise noted.
Symbol

Parameter

Condition

Min

Max

Units

VIL

Input Low Voltage

(Except EA)

-0.5

0.2 VCC-0.1

VIL1

Input Low Voltage (EA)

-0.5

0.2 VCC-0.3

VIH

Input High Voltage

0.2 VCC+0.9

VCC+0.5

VIH1

Input High Voltage

0.7 VCC

VCC+0.5

IOL = 1.6 mA

0.45

0.45

VOL

(Except XTAL1, RST)

(XTAL1, RST)

Output Low Voltage

(1)

(Ports 1,2,3)

(1)

VOL1

Output Low Voltage

(Port 0, ALE, PSEN)

IOL = 3.2 mA

VOH

Output High Voltage

(Ports 1,2,3, ALE, PSEN)

IOH = -60 A, VCC = 5V 10%

IOH = -25 A

0.75 VCC

0.9 VCC

2.4

IOH = -300 A

0.75 VCC

IOH = -80 A

Output High Voltage

(Port 0 in External Bus Mode)

IOH = -10 A
VOH1

2.4

0.9 VCC

IOH = -800 A, VCC = 5V 10%

IIL

Logical 0 Input Current (Ports 1,2,3)

VIN = 0.45V

-50

ITL

Logical 1 to 0 Transition Current

(Ports 1,2,3)

VIN = 2V, VCC = 5V 10%

-650

ILI

Input Leakage Current (Port 0, EA)

0.45 < VIN < VCC

10

RRST

Reset Pulldown Resistor

300

CIO

Pin Capacitance

Test Freq. = 1 MHz, TA = 25C

10

pF

ICC

Power Supply Current

Active Mode, 12 MHz

50

Notes:

16

mA

VCC = 6V

100

VCC = 3V

Power Down Mode

mA

Idle Mode, 12 MHz

(1)

25

6.5

40

1. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2, 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
2. Minimum VCC for Power Down is 2V.

AT89C52

Serial Port Timing: Shift Register Mode Test Conditions

The values in this table are valid for VCC = 5.0V 20% and Load Capacitance = 80 pF.
12 MHz Osc

Variable Oscillator

Symbol

Parameter

Min

Max

Min

Max

tXLXL

Serial Port Clock Cycle Time

1.0

12tCLCL

tQVXH

Output Data Setup to Clock Rising Edge

700

10tCLCL-133

ns

tXHQX

Output Data Hold After Clock Rising Edge

50

2tCLCL-117

ns

tXHDX

Input Data Hold After Clock Rising Edge

ns

tXHDV

Clock Rising Edge to Input Data Valid

700

Units

10tCLCL-133

ns

Shift Register Mode Timing Waveforms

INSTRUCTION
ALE

tXLXL
CLOCK

tQVXH
WRITE TO SBUF

tXHQX
0

CLEAR RI

VALID

tXHDX

tXHDV

OUTPUT DATA

VALID

SET TI

VALID

VALID

VALID

VALID

VALID

AC Testing Input/Output Waveforms (1)

Note:

20

Float Waveforms(1)
V LOAD+

0.2 VCC + 0.9V

TEST POINTS

0.45V

VALID

SET RI

INPUT DATA

VCC - 0.5V

1. AC Inputs during testing are driven at VCC - 0.5V

for a logic 1 and 0.45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL max.
for a logic 0.

AT89C52

V LOAD -

Note:

0.1V

V OL +

0.1V

Timing Reference
Points

V LOAD

0.2 VCC - 0.1V

V OL -

0.1V

0.1V

1. For timing purposes, a port pin is no longer floating

when a 100 mV change from load voltage occurs. A
port pin begins to float when a 100 mV change from
the loaded VOH/VOL level occurs.

MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

D
D
D
D
D
D
D
D
D

MAX232 . . . D, DW, N, OR NS PACKAGE

MAX232I . . . D, DW, OR N PACKAGE
(TOP VIEW)

Meet or Exceed TIA/EIA-232-F and ITU

Recommendation V.28
Operate With Single 5-V Power Supply
Operate Up to 120 kbit/s
Two Drivers and Two Receivers
30-V Input Levels
Low Supply Current . . . 8 mA Typical
Designed to be Interchangeable With
Maxim MAX232
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
Applications
TIA/EIA-232-F
Battery-Powered Systems
Terminals
Modems
Computers

C1+
VS+
C1
C2+
C2
VS
T2OUT
R2IN

16

15

14

13

12

11

10

VCC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT

description/ordering information
The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply EIA-232 voltage
levels from a single 5-V supply. Each receiver converts EIA-232 inputs to 5-V TTL/CMOS levels. These
receivers have a typical threshold of 1.3 V and a typical hysteresis of 0.5 V, and can accept 30-V inputs. Each
driver converts TTL/CMOS input levels into EIA-232 levels. The driver, receiver, and voltage-generator
functions are available as cells in the Texas Instruments LinASIC library.
ORDERING INFORMATION
ORDERABLE
PART NUMBER

PACKAGE

TA
PDIP (N)

TOP-SIDE
MARKING

Tube

MAX232N

Tube

MAX232D

Tape and reel

MAX232DR

Tube

MAX232DW

Tape and reel

MAX232DWR

SOP (NS)

Tape and reel

MAX232NSR

MAX232

PDIP (N)

Tube

MAX232IN

MAX232IN

Tube

MAX232ID

Tape and reel

MAX232IDR

Tube

MAX232IDW

Tape and reel

MAX232IDWR

SOIC (D)
0C to 70C
SOIC (DW)

40C to 85C

SOIC (D)
SOIC (DW)

MAX232N
MAX232
MAX232

MAX232I
MAX232I

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinASIC is a trademark of Texas Instruments.
Copyright 2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

Function Tables
EACH DRIVER
INPUT
TIN

OUTPUT
TOUT

H = high level, L = low

level
EACH RECEIVER
INPUT
RIN

OUTPUT
ROUT

H = high level, L = low

level

logic diagram (positive logic)

11

14

T1IN

T1OUT
10

T2IN

T2OUT
12

13

R1OUT

R1IN
9

R2OUT

POST OFFICE BOX 655303

8
R2IN

DALLAS, TEXAS 75265

MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V
Positive output supply voltage range, VS+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC 0.3 V to 15 V
Negative output supply voltage range, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 15 V
Input voltage range, VI: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VCC + 0.3 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
Output voltage range, VO: T1OUT, T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS 0.3 V to VS+ + 0.3 V
R1OUT, R2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VCC + 0.3 V
Short-circuit duration: T1OUT, T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

MIN
Supply voltage

VIL
R1IN, R2IN

NOM

MAX

4.5

VCC
VIH

5.5

Low-level input voltage (T1IN, T2IN)

TA

High-level input voltage (T1IN,T2IN)

UNIT
V
V

0.8
30

Receiver input voltage

V
V

MAX232

70

MAX232I

Operating free air temperature

free-air

0
40

85

electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 3 and Figure 4)
PARAMETER
ICC

TEST CONDITIONS
VCC = 5.5 V,
TA = 25C

Supply current

All outputs open,

MIN

TYP

MAX

10

UNIT
mA

All typical values are at VCC = 5 V and TA = 25C.

NOTE 3: Test conditions are C1C4 = 1 F at VCC = 5 V 0.5 V.

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MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (see Note 3)
PARAMETER
High-level output voltage

T1OUT, T2OUT

RL = 3 k to GND

VOL

Low-level output voltage

T1OUT, T2OUT

MIN

TYP

TEST CONDITIONS

VOH

RL = 3 k to GND

MAX

UNIT
V

Output resistance
T1OUT, T2OUT
VS+ = VS = 0,
VO = 2 V
300

IOS Short-circuit output current

T1OUT, T2OUT
VCC = 5.5 V,
VO = 0
10
mA
IIS
Short-circuit input current
T1IN, T2IN
VI = 0
200
A
All typical values are at VCC = 5 V, TA = 25C.
The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic voltage
levels only.
Not more than one output should be shorted at a time.
NOTE 3: Test conditions are C1C4 = 1 F at VCC = 5 V 0.5 V.
ro

switching characteristics, VCC = 5 V, TA = 25C (see Note 3)

PARAMETER

TEST CONDITIONS

SR

Driver slew rate

SR(t)

Driver transition region slew rate

One TOUT switching

TYP

MAX

UNIT

30

See Figure 3

Data rate

MIN

RL = 3 k to 7 k,
See Figure 2

V/s

V/s

120

kbit/s

NOTE 3: Test conditions are C1C4 = 1 F at VCC = 5 V 0.5 V.

RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (see Note 3)
PARAMETER

TEST CONDITIONS

VOH

High-level output voltage

R1OUT, R2OUT

IOH = 1 mA

VOL

Low-level output voltage

R1OUT, R2OUT

Receiver positive-going input

threshold voltage

R1IN, R2IN

VCC = 5 V,

TA = 25C

VIT

Receiver negative-going input

threshold voltage

R1IN, R2IN

VCC = 5 V,

TA = 25C

TYP

IOL = 3.2 mA

VIT+

MIN

MAX

3.5

UNIT
V

0.4
1.7
0.8

2.4

1.2

Vhys Input hysteresis voltage

R1IN, R2IN
VCC = 5 V
0.2
0.5
1
V
ri
Receiver input resistance
R1IN, R2IN
VCC = 5,
TA = 25C
3
5
7
k
All typical values are at VCC = 5 V, TA = 25C.
The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic voltage
levels only.
NOTE 3: Test conditions are C1C4 = 1 F at VCC = 5 V 0.5 V.

switching characteristics, VCC = 5 V, TA = 25C (see Note 3 and Figure 1)

PARAMETER
tPLH(R)
tPHL(R)

TYP

UNIT

Receiver propagation delay time, low- to high-level output

500

ns

Receiver propagation delay time, high- to low-level output

500

ns

NOTE 3: Test conditions are C1C4 = 1 F at VCC = 5 V 0.5 V.

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MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

PARAMETER MEASUREMENT INFORMATION

VCC

Pulse
Generator
(see Note A)

RL = 1.3 k

R1OUT
or
R2OUT

R1IN
or
R2IN

See Note C

CL = 50 pF
(see Note B)
TEST CIRCUIT
10 ns

10 ns

Input

10%

90%
50%

90%
50%

3V
10%

0V

500 ns
tPLH

tPHL

VOH
Output

1.5 V

1.5 V

VOL

WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%.
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.

Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements

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MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

PARAMETER MEASUREMENT INFORMATION

T1IN or T2IN

Pulse
Generator
(see Note A)

T1OUT or T2OUT
EIA-232 Output
CL = 10 pF
(see Note B)

RL

TEST CIRCUIT
10 ns

10 ns
90%
50%

Input
10%

3V

90%
50%

10%

0V

5 s
tPLH

tPHL
90%
Output

10%

10%

VOL
tTLH

tTHL
SR

VOH

90%

0.8 (V

V )
0.8 (V
V
)
OH
OL
OL
OH
or
t
t
TLH
THL
WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%.
B. CL includes probe and jig capacitance.

Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-s Input)
Pulse
Generator
(see Note A)

EIA-232 Output
3 k

CL = 2.5 nF

TEST CIRCUIT
10 ns

10 ns

Input
90%
1.5 V

10%

90%
1.5 V

10%

20 s
tTLH

tTHL
Output

3V

3V
3 V

3 V
SR

+t

THL

6 V
or t

VOH
VOL

TLH

WAVEFORMS
NOTE A:

The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%.

Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-s Input)

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MAX232, MAX232I
DUAL EIA-232 DRIVERS/RECEIVERS
SLLS047I FEBRUARY 1989 REVISED OCTOBER 2002

APPLICATION INFORMATION
5V
CBYPASS = 1 F

16

C1

C1+

1 F 3

8.5 V

1 F 5

VS

C2+

C4
+

C2

11

To CMOS or TTL

14

10

12

From CMOS or TTL

1 F

2
VS+

C1

4
C2

C3

VCC

13
8

9
0V

8.5 V
1 F

EIA-232 Output
EIA-232 Output
EIA-232 Input
EIA-232 Input

15
GND
C3 can be connected to VCC or GND.

Figure 4. Typical Operating Circuit

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