Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

Toshiyuki Oota*, Takashi Ishida*, Kouki Matsuse*, Kiyoaki Sasagawa**, and Lipei Huang*** *Dept. of Electrical and Electronic Engineering, Meiji University Higashi-mita, Tama-ku, Kawasaki 214-8571, Japan Phone / Fax: +81-44-934-7293, E-mail: matsuse@isc.meiji.ac.jp **Fuji Electric Corporate Research and Development, Ltd. 1, Fujimachi, Hino 191-8502, Japan ***Dept. of Electrical Engineering, Tsinghua University Beijing 100084, China

Keywords
Converter control, Multilevel converters, Power semiconductor devices, Variable speed drives

1. Abstract
In this paper, the device loss characteristics of the five-level inverter applying a pulse amplitude modulation (PAM) control method are compared with that of a pulse width modulation (PWM) control method. In the proposed control method, the generated losses at switching devices in the five-level inverter will be reduced by adjusting the dc link voltage.

2. Introduction
In recent year, multilevel power converters for high power applications have been actively investigated [1]-[4] because they can withstand high voltage and generate a nearly sinusoidal waveform. In particular, three-level drives systems have been put to practical uses. Applying such converters to large-motor drives systems makes it possible to omit transformers, which have drawbacks such as installation space and cost. However, multilevel power converters have certain disadvantages such as the need to balance the voltage of the DC link capacitors. In five-level inverters fed to ac drives, it is difficult to maintain the five-level DC voltages as they tend to rise or fall monotonously. Hence, we have previously proposed a pulse width modulation (PWM) control methods for a five-level rectifier used as a DC power source for the five-level inverter [5]. The method is able to maintain the output DC link capacitor voltages, keep the input power factor at near unity, and regenerate electric power back to the power system. We have also described PWM control methods of a five-level double converter for induction motor drives and achieved adjustable-speed drive [6] . This converter is constructed by connecting the above-mentioned rectifier to a five-level inverter. In the PWM controlled five-level inverter, the generated losses at switching devices in the main circuit are imbalance [7]. To solve this problem and reduce the generated losses, we propose a control strategy that

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

employs a pulse amplitude modulation (PAM) control strategy in the high-speed area. The device loss characteristics of the five-level inverter operated by proposed control method and conventional PWM control method are compared in this paper. The generated losses at switching devices in the five-level inverter will be reduced and balanced by using PAM control method, because it decreases the number of switching and keeps lower voltage stress across each switching device in the main circuit.

3. Main Circuit Configuration of a Five-Level Double Converter

Fig. 1 shows the main circuit configuration of the three-phase five-level double converter. It consists of the five-level rectifier, the DC link, and the five-level inverter. The rectifier and inverter employ the diode clamped topology. Each phase consists of eight switching devices (S1-S8) and six clamping diodes (D1D6), and the DC link consists of four capacitors in series. For a DC link voltage of Vdc, if the voltage across each capacitor is Vdc/ 4, the voltage stress across each switching device will be limited to Vdc/ 4 through the clamping diodes. This topology would be suited to high voltage and high power applications; however, the clamping diodes need to block higher voltage. The maximum voltage stress on D3 and D4 is 3V dc/ 4, that on D2 and D5 is 2V dc/ 4, and that on D1 and D6 is Vdc/ 4.

4. Proposed Method
Fig. 2 shows rough characteristics of the DC link voltage, inverter output voltage, and modulation index against the motor rotation speed of the proposed control method and the conventional PWM control method. In the proposed control strategy, the five-level rectifier fixes the DC link voltage at a lower value (V1 ) than that of the conventional method in the low-speed (PWM control) area and increases it in proportion to the motor speed in the high-speed (PAM control) area in order that the inverter output voltage can keep a high modulation index. The generated losses at switching devices of the five-level inverter are balanced at high modulation index as stated in [8]. The switching loss, whose magnitude depends on the voltage stress across each switching device (Vdc/4), will decrease because the number of switching is fewer in the PAM
P2
C
S1 D1 D2 S2 S3 S4

P1
L L L C
D3

NPP
C

Vdc

IM
D4 D5 D6 S5 S6 S7 S8

N1
C

N2

Five-level rectifier

DC link

Five-level inverter

Fig. 1. Three-phase five-level double converter configuration.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

control area and the DC link voltage Vdc is lower than that of the conventional method through all speed range. In addition, the voltage change rate (dV/dt) at the output voltage waveform that causes motor damage is held down because of the low Vdc.

5. Instantaneous Current Control of the Five-level rectifier

A. Current Control Strategy
Fig. 3 shows the control circuit structure for the instantaneous-value-compared current control method using the multi-band hysteresis comparators (MHCs) [8]. The control flow of input currents on the rectifier side is as follows. First, the dc link voltage Vdc, which is the potential difference between P2 and N2 level voltages, is detected. Its command value Vdc* is decided by the motor rotation speed. The error between Vdc and Vdc* passes the PI controller, after which this value is multiplied to each of the input phase voltages (Va, Vb , and Vc). These values then become the input line current commands (ia*, ib *, and ic*). Thus, the input line currents are synchronized with the input phase voltages. The respective errors between the line current references and detected line currents are inputted into MHCs. The MHCs thus determine switching levels from the errors to control switches in the main circuit.
Low-speed area High-speed area Modulation index [%] Low-speed area High-speed area

DC link voltage [V]

DC link voltage [V]

V1
Inverter output voltage [V] Inverter output voltage [V] Modulation index [%]

Motor speed [rpm]

Motor speed [rpm]

(a) Proposed control method.

(b) Conventional PWM control method.

Fig. 2. Modulation index, inverter output voltage, and DC link voltage against motor speed.
P2

Five-Level Rectifier

Va Vb Vc

Ia Ib Ic

L L L

P1
C

NPP
C

Vdc

Five-Level Inverter

IM

N1
C

RE

N2
Ia *+ Ib* + Ic * + -

Vdc

MHC
+

PI

Vdc*

Fig. 3. Instantaneous-value-compared current control method.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

B. Control Method of the Five-Level Voltage

The P2 and N2 potentials can be maintained at a constant level by feeding back Vdc as mentioned above. However, the other voltage levels must be controlled because they tend to differ from their references. Hence, the P1, N1 and NPP potentials are controlled by modifying the MHCs [8]. Figs. 4-6 show experimental results when the induction motor is accelerated from 0 to 1000 r/min described fully in [8]. Fig. 4 shows motor speed. Fig. 5 shows the command value and actual value of the DC link voltage and Fig. 6 shows the five-level potentials. The rectifier is controlled by the above-mentioned algorithm. The DC link voltage reference is obtained from motor speed and fed back to the rectifier. As can be seen in Fig. 6, the five-level potentials of the DC link can be maintained while Vdc varies as shown in Fig. 5. These results indicate the possibility of adjusting the DC link voltage as the proposed control method.

5. PAM Control Strategy for the Five-Level Inverter

In proposed method, the output PAM waveform in high speed area is set up in advance. The output switching pattern is determined as follows. At first, the phase voltage of PAM waveform with five steps for each phase is obtained by comparing a signal wave with the triangular wave whose frequency is three times as high as that of signal wave as shown in Fig. 7(a). Fig. 7 (b) shows three-phase output voltage waveform with five steps. The line-to-line voltages are also PAM waveforms with nine steps as shown in Fig. 7 (c). The amplitude of the signal wave is the modulation index, and was set at 0.9 in this example.
1000 800 Motor speed [rpm] 600 400 200 0 0 5 10 15 20 Time [s] 25 30 35 120 100 DC link voltage: Vdc [V] 80 60 40 20 0 0 5 10 15 20 Time [s] 25 30 35 Command Actual

Fig. 4. Induction motor speed.

60

Fig. 5. DC link voltage: Vdc .

40

Five-level potential [V]

20

-20

-40

-60 0 5 10 15 20 Time [s] 25 30 35

Fig. 6. Five-level potentials..

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

1.0

Signal wave & carrier

0.5

Signal wave Phase voltege Carrier wave

0.0

-0.5

-1.0 0 5

Time [s]

10

15

20x10

-3

Fig. 7 (a). reference voltage and carrier voltage.

P2 P1
Phase voltage Vu Vv Vw

NPP N1 N2
0 5

Time [s]

10

15

20x10

-3

Fig. 7 (b). output three-phase voltage.

Vuv Vvw Vwu Line-to-line voltage

Time [s]

10

15

20x10

-3

Fig. 7 (c). output line-to-line voltage.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

6. Comparison of Device Loss Characteristics

A. Circuit Analysis
To investigate the characteristics of the proposed control method, the performance of the five-level inverter was analyzed by simulation. Fig. 8 shows the main circuit configuration of the three-phase five-level diode clamped inverter. Table I lists the voltage levels and corresponding states of switches, where 1 indicates the on state and 0 the off state. The current paths for each phase of the five-level inverter can be classified into ten modes according to the output voltage level and the direction of the output line current. For example, four of those modes are shown Fig. 9 which specifies the conducting devices and the process of commutation. When P1 level is output (S2, S3, S4, S5: on) as shown in Fig. 9(a), the output line current flows through the devices (D1, S2, S3, S4) in the positive direction and through the devices (S5, D4) in the negative direction. When NPP is output (S3, S4, S5, S6: on) as shown in Fig. 9(b), the output line current flows through the devices (D2, S3, S4) in the positive direction and through the devices (S5, S6, D5) in the negative direction. Simulations were carried out with a separate DC source connected to each of the four DC bus capacitors in order to analyze the basic performance of the five-level inverter. In these simulations, the output line current was 437.4 A, the output power factor was set at 0.9, and the magnitude of the output voltage reference was determined under the condition that the V/f was constant. The DC link voltage was set as 3.0 kV in the low-speed area, and was determined so that the modulation index was 0.9 in the high-speed area. The threshold point between the high-speed and low-speed area was 25 Hz .

P2 S1
C V dc /4

D1 D2

S2 S3 S4

P1 D3
V dc /4

Vdc
NPP S5 S6 S7 S8

AC load
V dc /4

D4 D5

N1
C V dc /4

D6

N2

Fig. 8 Three-phase five-level diode clamped inverter configuration.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

Fig. 10 shows the simulation results; the upper trace shows the output line current and output phase voltage, and the lower traces show current waveforms at eight switching devices in one phase. Fig. 10(a) is the result when the inverter was operated with the sine triangle PWM control method and the output frequency is 10 Hz. Fig. 10(b) is the result when the inverter was operated with PAM control method and the output frequency is 50 Hz. Fig. 11 shows an IGBT module configuration. The IGBT module consists of an IGBT and free while diode (FWD). The generated losses were calculated assuming 3.3kV/1200A IGBT modules as the switching devices. As shown in Fig. 11, Each loss is calculated and the loss at IGBT module (P sum) consists of the sum of these losses.

Table I. IGBT Gating Logic.

Vox
S w itc h

P2

P1 NPP N 1 N 2

Sx 1 Sx 2 Sx 3 Sx 4 Sx 5 Sx 6 Sx 7 Sx 8
1;ON

1 1 1 1 0 0 0 0
0;O FF

0 1 1 1 1 0 0 0

0 0 1 1 1 1 0 0

0 0 0 1 1 1 1 0

0 0 0 0 1 1 1 1

P2
d1

P2 S1 C D1
d2 d3 d4 d1

S1 S2 S3 S4

C S2 P1 S3 S4 P1

D1 D2 C D3

d2 d3 d4

i
C

D2 D3

i
NPP Vox NPP

i
Vox

i
C
d5

D4 D5 d6

S5 S6 N1 S7 S8 N2

d5

D4 D5d6 D6 d7

S5 S6 S7 S8

N1 D6 d7 C
d8

C
d8

N2

(a) (a) P1 level is output (S2, S3, S4, S5: on).

(b) (b) NPP is output (S3, S4, S5, S6: on).

Fig. 9. Current path.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

0 -2000 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 20 25 30 Time [s] 35 40x10
-3

lu[A] & Vu[V]

lu[A] & Vu[V]

2000

1000 0 -1000 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 600 400 200 0 0.10 0.12 0.14 Time [s] 0.16 0.18 0.20

l_s2[A]

l_s1[A]

l_s3[A]

l_s4[A]

l_s5[A]

l_s6[A]

l_s7[A]

l_s8[A]

l_s8[A]

l_s7[A]

l_s6[A]

l_s5[A]

l_s4[A]

l_s3[A]

l_s2[A]

l_s1[A]

(a) PAM control method Output line-to-line voltage: 3.3kV, Output frequency: 50Hz.

(b) PWM control method Output line-to-line voltage: 0.66kV, Output frequency: 10Hz

Fig. 10. IGBT module current. P2

C

d1 d2 d3

S1 S2 S3 S4
Vox

P1
C

d4

NPP
C

F W D d5 d6
C

I G B T

S5 S6 S7 S8

N1 N2

d7 d8

ON-stateloss ( Pon ) IGBT loss Turn-onloss ( Pton ) Turn-off loss ( P ) Loss a t I G B T m o d u l e ( Psum ) toff Forwardpowerloss ( Pf ) FWD loss Reverse recoveryloss ( Prr )

Fig. 11. IGBT module configuration.

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

B. Device Loss Characteristics

Fig. 12 shows the generated loss as each switching devices against the inverter output frequency of the conventional PWM control method and Fig. 13 shows that of the proposed control method for comparison. P S1 -P S8 correspond to the generated losses at S1-S8, respectively. As seen from these graphs, the values of P S3 -P S6 are nearly uniform because, at every frequency, S3-S6 conduct the line current for most of the half-period (Fig. 10). In Fig. 12, as the frequency drops, the generated losses at switching devices are imbalance; the values of PS2 and P S7 initially increase to approximately 1.5 times those of P S4 and P S5 because of increased switching at S2 and S7. The large generated losses at S2 and S7 may lead to device failure. As shown in Fig. 13, the values of PS2 and PS7 that are particularly large in the conventional control method are suppressed in the proposed control method because of the less switching loss as mentioned above.
1000

P S2

1000

P S7

800

P S3
Loss at IGBT module[W] Loss at IGBT module[W]

800

P S6
600

600

P S4
400

P S5
400

200

P S1

200

PS8
0 10 20

Output frequency[Hz]

30

40

50

10

20

Output frequency[Hz]

30

40

50

(a) Losses at upper four IGBT module.

(b) Losses at lower four IGBT module.

Fig. 12. Device loss characteristics (conventional method).

1000 1000

800

800

600

Loss at IGBT module [W]

Loss at IGBT module [W]

P S3

PS4

P S6
600

P S5

400

P S2

400

P S7

P S1
200 200

P S8

0 10 20 30 40 50

Output frequency [Hz]

10

20

Output frequency [Hz]

30

40

50

(a) Losses at upper four IGBT module.

(b) Losses at lower four IGBT module.

Fig. 13. Device loss characteristics (proposed method).

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Characteristics of a PAM Controlled Five-Level Inverter for Induction Motor Drives

ISHIDA Takashi

5200

5000

4800 Total loss of S1-S8 [W]

4600

Proposed control method Conventional control method

4400

4200

4000

3800 10 20 30 Output frequency [Hz] 40 50

Fig. 14. Total loss characteristics.

Fig. 14 shows the total losses obtained by summing PS1 ~P S8 of proposed and conventional control method. The total loss of the proposed method is lower than that of the conventional control method through all frequency range.

7. Conclusion
In this paper, device loss characteristics of the proposed control strategy, which employed a PAM control strategy in the high-speed area, and the conventional control strategy are compared. In addition, the device loss characteristics of the five-level inverter operated by proposed control method and conventional PWM control method were compared. The generated losses at switching devices in the five-level inverter were reduced and balanced by using PAM control method, because it decreases the number of switching and remains lower voltage stress across each switching device in the main circuit.

References
[1] C. Newton and M. Sumner, Novel technique for maintaining balanced internal DC link voltages in diode clamped five-level inverters, IEE Proc. Electr. Power Appl., Vol. 146, No. 3, pp. 341-349, May 1999. [2] R.W. Menzies, P. Steimer, and J.K. Steinke, Five-level GTO Inverters for Large Induction Motor Drives, IEEE Trans. Industry Applications, Vol. 30, No. 4, pp. 938-944, July/August 1994. [3] G. Sinha and T.A. Lipo, A Four Level Rectifier-Inverter System for Drive Applications, Proc. IAS96 Conf., pp. 980-987. [4] L.M. Tolbert, F.Z. Peng, and T.G. Habetler, Multilevel Converters for Large Electric Drives, IEEE Trans. Industry Applications, Vol. 35, No. 1, pp. 36-44, January/February 1999. [5] T. Ishida, K. Matsuse, K. Sugita, L. Huang, and K. Sasagawa, DC Voltage Control Strategy for a Five-Level Converter, IEEE Trans. Power Electronics, Vol. 15, No. 3, pp. 508-515, May 2000. [6] T. Ishida, K. Matsuse, T. Miyamoto, K. Sasagawa, and L. Huang, Fundamental Characteristics of Five-Level Double Converters with Adjustable DC Voltages for Induction Motor Drives, IEEE Trans. Industrial Electronics, Vol. 49, No. 4, pp. 775-782, August 2002. [7] T. Ishida, K. Matsuse, K. Sasagawa, and L. Huang, Five-Level Double Converters for Induction Motor Drives, IEEE Industry Applications Magazine,Vol. 7, No.4, pp. 35-44, 2001. [8] T. Ishida, T. Miyamoto, T. Oota, K. Matsuse, K. Sasagawa, and L. Huang, A Control Strategy for a FiveLevel Double Converter with Adjustable DC Link Voltage, Proc. IAS 2002 Conf., pp. 530-536.

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