FPGA Design

FPGA Advantage

Major product features:

High-complexity FPGA integrated design environment Blends HDL Designer Series, ModelSim and Precision RTL Synthesis into a comprehensive, HDL-based FPGA design flow FPGA device independent team design supported by advanced design data management Interchangeable textual, tabular, and graphical editors accelerate design the way you think design creation Rapid design visualization, analysis, and verification woven through the complete design flow Architecture aware implementation for all popular FPGA vendor families Concurrent system integration with Mentors PCB design processes to eliminate man weeks to months of error prone integration effort

The FPGA Advantage design flow provides a complete integrated design environment targeting high-complexity FPGA design.

FPGA Advantage
The hidden success behind FPGA adoption is simple the promises are real. Companies are successfully leveraging FPGA technology to support new competitive business models. The FPGA Advantage integrated design environment from Mentor Graphics delivers a comprehensive FPGA vendor neutral system targeted to support your high-complexity design requirements by braiding together the proven capabilities of HDL Designer Series for design management, creation and documentation, ModelSim for verification, and Precision RTL Synthesis or LeonardoSpectrum synthesis for

advanced device implementation. FPGA Advantage provides the power and capacity necessary for todays complex FPGA designs.

Harnessing Chaos
A complex design may be described by the number of design files, the number of equivalent system gates, the performance characteristics of the design, the number of engineers on the design team, the geographic distribution of team members or by some other quantifiable metric. Each dimension of design complexity provides distraction and impacts your productivity. FPGA Advantage has been engineered to allow you to focus on your design objectives by providing an advanced

The complete FPGA design system manages design creation, verification, and implementation as a common objective.

w w w. m e n t o r. c o m

The HDL file, design unit and logical object views combined with on-demand design hierarchy rendering within the design explorer window allow easy navigation of complex designs.

cockpit for FPGA design. Design creation, verification, and implementation are blended into a high-productivity correct-by-construction design flow. The integrated design environment complements the HDL design flow with a complete team design environment and automated design documentation as well as integrated design data management. The FPGA Advantage design solution is multi-platform and multilanguage capable, allowing engineers to work on UNIX, Windows, NT, Linux, and environments of VHDL, Verilog, or mixed-HDL language code.

independent design by leveraging advanced RTL HDL design techniques. These advanced techniques include ModuleWare; a library of dynamic macro-cells capable of generating VHDL and Verilog code. Combining device independent design with FPGA architecture, intelligent implementation allows FPGA Advantage to protect your ability to select FPGA devices based on how they help you dominate your market.

while maintaining maximum flexibility for the local engineer. FPGA Advantage complements intuitive design creation and re-use with advanced ASIC proven verification methods. Finally, this is the only FPGA design system that extends the implementation flow into the Mentor Graphics PCB design system to give you market-dominating power.

On the Job
Within FPGA Advantage, design analysis begins the moment a design project is formed. The design object relationships are extracted to provide both design centric ease of use as well as trivializing the daunting task of navigating a multi-million-gate design. The sophisticated DesignPad text entry environment features additional design analysis techniques necessary for quickly navigating large HDL descriptions. In addition to organizational analysis, each leaf level of the design may be rapidly visualized using Interface-Based Design (IBD) tables, block diagrams, state machines and flow charts. FPGA Advantage provides the power you need to work with complex

Professionals Only
Every evolution of FPGA technology delivers more gates, higher performance, and embedded digital miracles at a lower cost per gate allowing the opportunity to once again innovate and gain a new competitive edge. FPGA Advantage provides the capacity to handle todays and tomorrows most advanced devices, gaining you the ability to leverage new technology as it becomes available. Embedded design data management provides the foundation of the sophisticated team environment necessary to coordinate global engineering efforts

Developing an Edge
Not all FPGAs are created equal. In fact, the variety of architectures available from the top three FPGA vendors creates a rainbow of technology and component cost alternatives that should be leveraged to optimize product profit margins. Limiting your FPGA device selection in a subtle trade-off for FPGA vendor design tools could prove to be the advantage your competitor needs. FPGA Advantage promotes FPGA vendor

Verify the design using graphical or tabular abstraction.

design projects as well as the power to understand your design elements within the complete team project.

an FPGA vendor independent HDL standard foundation integrating the complete team.

Designing My Way
Every corporation needs a common, repeatable design flow spanning their engineering organization. Every engineer needs the opportunity to leverage their talents to meet their assigned design objectives. FPGA Advantage offers local flexibility and control to the individual engineer while maintaining a consistent repeatable design flow for the entire team. In addition to local design flow flexibility, each engineer has the opportunity to select from a rich variety of design creation techniques and editors ranging from a sophisticated text entry environment to state of the art IBD to the more conventional block diagram, state machine, flow chart and truth table techniques. Each engineer can quickly incorporate design elements from ModuleWare, previous designs, external IP providers and, if needed, from the FPGA vendors macro and IP libraries. With the exception of specific FPGA vendor design elements, the design creation methods leveraged form

The Heart of Verification

FPGA Advantage delivers leading compiler/simulator performance, complete freedom to mix VHDL and Verilog, and the unmatched ability to customize the simulator. You have access to many advanced technologies such as Direct Compile for the fastest compile times, Tcl/Tk technology for a customizable user interface, and Single Kernel Simulation for mixing VHDL and Verilog. In addition, you may rapidly generate alternate graphical and tabular representations to aide in design verification.

allows you to quickly traverse design abstraction levels without recompiling to provide you with robust verification capabilities. FPGA Advantage accelerates the functional design development by focusing on optimizing the entire design creation, verification, and modification design loop. Incremental design compilation is one key feature promoting rapid design iteration. The ability to locally configure the design with or without other team members design elements is another key capability that delivers rapid design error isolation. Its your design; you choose the verification methods to match your style.

Intrinsic Device Intelligence

FPGA Advantage features advanced synthesis to implement high-complexity FPGA designs. The cornerstone of FPGA Advantages device independent design flow is the ability to transform FPGA vendor independent HDL code into a structural design that effectively leverages the specific device architecture. Leveraging Architecture Signature Extraction provides the intelligence to

Verify My Way
Dynamic animation the ability to view simulation results within the design creation editor reveals high-level design and functional behavior, enabling you to debug the design exactly as it was entered. When using tabular or graphical abstraction for verification all of the needed simulation controls are instantly available. FPGA Advantage

the implementation process to best utilize the FPGA fabric as well as the available embedded memory, DSP block, or clock management resource. The complete timing driven resource allocation process is fed using Synopsys Design Constraint (SDC) format.

architectural alternatives without the risk of jeopardizing the overall objective of the team.

Completing the Job

Every product design requires design documentation. Without it, the information of the design cannot be communicated, making product support difficult and future design reuse almost impossible. FPGA Advantage supports automated documentation leveraging Microsoft Object Linking and Embedding (OLE), and HTML export. FPGA Advantage will help you create design documentation as you create the design. Then, directly associate the documentation to the design preparing your design to be

Implement My Way
The best synthesis and optimization techniques will never resolve team synchronization issues. The FPGA Advantage solution features incremental synthesis design flows to free each engineer to optimize their productivity. The same incremental design flow features are harnessed to expedite multimillion gate designs while minimizing the complete design cycle time. Each engineer has the freedom to explore

supported for years to come including inevitable design re-use. Every FPGA must be placed on a PCB. Large pin count FPGA devices have significantly extended the FPGA <> PCB integration process. Integrating these large devices onto a PCB may result in expensive PCB respins due to the introduction of manual data entry errors. Only Mentor Graphics offers integrated FPGA <> PCB design flows. FPGA Advantage integration with Mentor Graphics PCB design processes shrinks the FPGA <> PCB physical integration process to seconds and completely eliminates all manual data entry errors.

SOLUTION

FOR

EVERY

DESIGNER Licensing
Nodelocked or Floating

Software Tools
FPGA Advantage for Personal HDL Design HDL Author ModelSim PE LeonardoSpectrum Level 2 or Precision RTL FPGA Advantage for HDL Design HDL Designer ModelSim SE Precision RTL

Language
VHDL, Verilog, or mixed-HDL

FPGA Vendor
All major FPGA vendor support including Actel, Altera, and Xilinx

Platforms Supported
Windows: 2000, XP, or NT 4.0

VHDL, Verilog, or mixed-HDL

Floating

Windows: 2000, XP, or NT 4.0 Unix: Sun Solaris 8 HP-UX 11.00 or 11.11 Linux: Red Hat 7.3

Copyright 2003 Mentor Graphics Corporation. HDL Designer Series, Interface-Based Design, IBD, LeonardoSpectrum, and Precision are trademarks and FPGA Advantage and ModelSim are registered trademarks of Mentor Graphics Corporation. All other trademarks mentioned in this document are trademarks of their respective owners.

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