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RGB Decoder
Description The CXA1585Q is an IC which converts composite video signals into RGB signals, and can be used with both NTSC and PAL systems. Features Filter for sharpness APL circuit Low carrier leak (3.58MHz components, 5mVp-p or less typ.) Compatible with both NTSC and PAL systems Low power consumption (120mV, VCC = 5V) Applications General-purpose RGB decoders, color liquid crystal viewnders, liquid crystal TVs, etc.
32 pin QFP (Plastic)
Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = +25C) Supply voltage Vcc 7 V Operating temperature Topr 20 to +75 C Storage temperature Tstg 65 to +150 C 500 mW Allowable power dissipation PD Recommended Operating Conditions Supply voltage 4.6 to 5.25 (typ. 5V)
Block Diagram
SYNC TC Y CLPTC
17 APL AMP SIG AMP
24
23
22
21
20
19 APL DET
SHARPNESS 25
APL CTL
18
SYNC IN
CLP TC
APL TC
VREG
Y IN
16
26
15 14
27
BLK
Y CLP 13
28
BURST GATE
PAL ID
29
12 DL AMP
11
31
INV 90
10
32
HUE
PS
Y/C MIX
APC 1 2 3
VXO 4 5 6 7 8
APC TC
VXO2
VXO1
SC OUT
GND2
Vcc2
Sony reserves the right to change products and specications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
HUE ADJ
B OUT
E92515B46-TE
CXA1585Q
Pin Descriptions
Pin Number Symbol Pin Voltage Equivalent Circuit Description
HUE ADJ
2.0V
30k 47k 1 1k 1k 5k
Hue adjustment. The hue can be adjusted by 10 or more by applying a voltage ranging from 0.5 to 3.5V to this pin.
5k 100A 20k
3784 02
APC TC
34V
APC (color sync) time constant and free-running frequency adjustment. The VXO free-running frequency can be adjusted by varying the DC voltage applied to this pin for no signal.
2 100k
1k
1k 3.4V 100A
VXO2
3.1 V
Crystal oscillator.
10k 3
100A
100A
3784 04
VXO1
3.2V
Crystal oscillator.
300A
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
SC OUT
1.6V
4k
Subcarrier output.
600mVP-P (typ.) 5
200A
3784 06
GND2
0V
Vcc2
5V
B OUT
2.0V
B output.
* With 75% color bar reference level input.
0.75VP-P 200
G OUT
4k 10k 8 9 10 0.5p 364A 92A
G output.
0.75VP-P
10
R OUT
R output.
0.75VP-P
11
DLA IN
129 11 5k 5k
Delay line amplier input. Connects to GND for NTSC mode; connects the 1H delay line output for PAL mode.
4k
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
12
C OUT
3.15V
Chroma output for PAL. Connects to Vcc for NTSC mode; connects to the 1H delay line input for PAL mode.
12 Approx. 45mVP-P
364A
13
ACK TC
3.1V
4k
4k
13 100k
400A
3784 16
14
DLA BIAS
30A
10k 5k 5k
NTSC/PAL mode switching and delay line amplier gain control. NTSC mode: V14 0.8V PAL mode: 2.0V V14 2.6V Variable range: 2dB or more
4k
4k
30A
3784 17
15
SYNC
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
16
BF
5k
3784 20
17
Y CLP TC
3.1V
1k 1k
17
18
APL CTL
3.0V
8k 129 18
APL sensitivity control. The control range is 3 to 5V. When APL control is not performed, connects this pin to GND.
8k
8k
3784 23
19
APL TC
2.5V
2k 19
Time constant for detecting APL (average picture level) of luminance signal. APL 0% V19 = 2.0V (typ.) APL 100% V19 = 3.2V (typ.)
256mV=100% white
164A
50A
3784 24
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
20
SYNC TC
3.1V
20 3.4V
60k
100A
60A
3784 26
21
CLP TC
3.1V
21 3.4V
60k
100A
60A
3784 27
22
VREG
4.2V
22
4.2V regulator output. Decoupling capacitance is provided. It cannot be used as an external power supply.
3784 28
23
SYNC IN
2.5V
129 23 50k
Signal input pin for sync separation. Standard sync level is 103mVp-p. Normally shorted with Y IN (Pin 24) for use.
103mVP-P 2.5V 60A 1H
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
24
Y IN
2.5V
46A 129 24 50k 2.5V
3784 31
Y signal input. Standard input level. SYNC = 103mVp-p 100% white = 256mVp-p Do not supply the burst signal.
256mVP-P 103mVP-P
25
Vcc1
5V
Vcc for Y.
26
GND 1
0V
GND for Y.
27
SHP CTL
2.5V
Sharpness gain control. Variable range: 4.5dB to +4.5dB (1.5V V27 3.5V) Adjusts the sharpness level by the voltage supplied to this pin.
28
SHP F0
2.1V
Sharpness lter frequency adjustment. Adjusts the lter f0 by varying the current took out from this pin.
129 28 4k 4k 5p 4k 2.1V 46A
3784 34
CXA1585Q
Pin Number
Symbol
Pin Voltage
Equivalent Circuit
Description
29
TPADJ
1.23V
Sets the timing of the pulses used in the IC. Connects a 27kW resistor between this pin and GND.
* Use a metal lm resistor with an accuracy of 1%.
3784 35
30
C ADJ
2.5V
10k 25k
Chroma amplier gain adjustment. Adjusts the gain of chroma amplier by the voltage (1.5 to 3V) supplied to this pin. Gain variable range: 20 to +8dB
10k
31
ACC TC
2.2V
220
31
97A
3784 37
32
C IN
2.3V
129 32 8k 2.5k 2.5k 8k
Chroma signal input. The standard input level is 143mVp-p of burst amplitude.
2.3V
100
100 10A
2.3V
143mVP-P
3784 38
CXA1585Q
Electrical Characteristics
Symbol ICC1 VO
Conditions Sum of currents owing to VCC1 and VCC2 F = 300kHz, VA = 160mVp-p, VL = 160mV Measure gain between input (= VL) and output F = 3.5MHz, VA = 160mVp-p, VL = 160mV Gain difference between 300kHz and 3.5MHz F = 1.5MHz, VA = 50mVp-p, VL = 160mV Ratio of 300kHz and 1.5MHz when SHP CTL (Pin 27) is 3.5V F = 1.5MHz, VA = 160mVp-p, VL = 160mV Ratio of 300kHz and 1.5MHz when SHP CTL (Pin 27) is 1.5V F = 300kHz, VA = 160mVp-p, VL = 256mV Measures gain between input (= VL) and output F = 300kHz, VA = 160mVp-p, VL = 128mV APL CTL (18 pin) = 3.0V Measures gain between input (= VL) and output F = 300kHz, VA = 160mVp-p, VL = 90mV APL CTL (18 pin) = 3.0V Measures gain between input (= VL) and output VL = 256mV Measures DC voltage at APL TC (Pin 19) VL = 0mV Measures DC voltage at APL TC (Pin 19) Measures pedestal voltage at Pins 8, 9 and 10 Inputs fsc + 250Hz sine wave and conrms that it is locked with SC OUT (Pin 5) Inputs fsc 250Hz sine wave and conrms that it is locked with SC OUT (Pin 5) ACC1 = C OUT (6dB: VA = 286mVp-p) C OUT (0dB: VA = 143mVp-p)
VFC
SIG2
3.0
dB
VSHP (max.)
SIG2
4.5
dB
VSHP (min.)
SIG2
4.5 dB
VAGC1
SIG2
3.6
4.9
6.2
dB
VAGC2
SIG2
3.9
5.5
7.0
dB
VAGC3
SIG2
6.3
8.0
9.7
dB
AGC OUT APL 100% AGC OUT APL 0% RGB output pedestal level APC pull-in upper range APC pull-in lower range ACC cover upper range
VAGC4
SIG3
19
3.0
3.2
3.5
VAGC5
SIG3
19
1.9
2.0
2.2
VDC
SIG1
8 9 10 5
1.4
2.0
2.4
Fpu
SIG1
250
Hz
Fpd
SIG1
250 Hz
ACC1
SIG1
12
0.5
3.0
dB
CXA1585Q
Input Signals Test Y IN C IN Point 24 pin 32 pin (pin) Min. Typ. Max. Unit SIG 1 SIG4 /SIG7 SIG1 SIG6 /SIG9
Measures B OUT level
12 8
3 0 1.5 1.0
dB V
Carrier leak
CL
Input signal: SYNC only Measures 3.58MHz component of output With VA = 143mVp-p as 0dB, measures input level (VA) when C OUT chroma signal is no longer output, and calculates the ratio of this to when the level is 143mVp-p
SIG1
20
mV
ACK
12
50
30
dB
C.SYNC High level C.SYNC Low level Burst ag High level Burst ag Low level Subcarrier output voltage
VOH VOL VOH VOH VO(SC) Amplitude when frequency at Pin 5 is adjusted to 3.579545MHz 20Hz
15 15 16 16 5
V V V V mV
NOTE: VCC1 = 5V, VCC2 = 5V, Ta = +25C. * Default conditions for pin settings SHP F0 = 39k, SHP CTL = 2.5V, APL CTL = 0V.
10
CXA1585Q
103mV
4.7s 1H = 63.5s
SIG2
VL
4.7s
103mV
Level VA Frequency F
SIG3
VL
4.7s
103mV
11
CXA1585Q
C input
SIG4 Level = VA
3.579545MHz
SIG5
Level = 143mVP-P
3.579545MHz 250Hz
||
fsc
SIG6
Level = 143mVP-P
180deg
180deg
90deg
0deg Level = VA
270deg
SIG7
4.433619MHz
SIG8
Level = 143mVP-P
4.433619MHz 250Hz
||
fsc
135deg 180deg
90deg 0deg
270deg 225deg
12
Y IN 0.047 C13 V19 C14 V6 0V 0.047 C15 4.7 C5 + 22 R7 510k + 1 0.047 C9 C12
23 APL AMP
22
21
20
19
18
17
CLP 16
V16 R8 3.6k V15
26 14 BLK ACK ACK DET 13 CHROMA AMP FF ADD/SUB SW INV 90 32 HUE PS 0 DEM B-Y R-Y Y/C MIX 12 Y CLP
C18 + 4.7 SW
V2
27
V7 2.3V
2.5V
R3
8.2H
1HDL
DAT
39k
L1
390
V12
R2
29
13
30 ACC DL AMP 31 ACC DET APC VXO 3 4 5
1.5k
27k
C19 0.01
R10
390
C1 0.01
11
SW
V1 2.5V
R1
C3 0.47
10
V10
C IN
180k
C2
V9
0.47
1
C7 1 470 C4 V3 R5 0.01 R4 2V C5 100k V4 0.1 3.4V SW C8 10p
7 A
V5 R6 5V
C16 0.01
C17 4.7
3784 43
CXA1585Q
V8
V8
CXA1585Q
Description of Operation (1) Luminance signal regeneration system <1> Sharpness lter The video (luminance and sync) signals input from Pin 24 (VIDEO IN) are boosted near 1.5MHz by the sharpness lter. The 1.5MHz component can be varied from 4.5 to +4.5dB (as compared to the 300kHz) according to the voltage of Pin 27 (SHP CTL). Approximately 0dB (as compared to the 300kHz) when Pin 27 (SHP CTL) is 2.5 V. Keep Pin 27 open when sharpness is not operated. Since the DC bias in the IC is 2.5V, the frequency response characteristics are almost the same as the characteristics applied 2.5V to Pin 27 externally. <2> APL circuit The Y AMP gain is controlled by the APL (average picture level) function, and the gain is reduced as the APL increases. The APL circuit is operated when the voltage at Pin 18 (APL CTL) is between 3.0V and 5.0V. It is OFF when APL CTL is 0V. (2) Chrominance signal regeneration system <1> ACC circuit The chroma signal input from Pin 32 (C IN) is controlled so that the burst signal is detected by ACC DET, feedback is applied to ACC AMP in accordance with the detective output, and the burst level is controlled to be constant. The chroma signal level (Pin 12) is approximately 45mVp-p for ACC operations. <2> APC circuit Only the burst signal among the signals whose level has been made constant by ACC AMP enters the APC circuit at the burst gate circuit. 0, +90 and +180 signals are generated in the phase circuit for the VXO Output, and their Composite waves (+90 carrier) enter the APC Circuit passing through the hue circuit. Here their phase is compared with that of the burst signal and feedback is applied to VXO to obtain a phase difference of +90. The 0 and +90 carriers created in this way are supplied to B-Y, R-Y and DEM. This means
that the demodulation axis can be changed by rotating the phase of the composite waves by the DC voltage at Pin 1 (HUE ADJ). <3> DEM circuit (NTSC) The chroma signal whose level has been made constant by ACC AMP is amplified by CHROMA AMP, demodulated by B-Y DEM and R-Y DEM, applied to the Y/C MIX circuit with G-Y created by the resistance rnatrix, mixed with the luminance signal and then output as the R, G, and B primary colors. <4> DEM circuit (PAL) The processing is the same as for NTSC until CHROMA AMP. The chroma signal output to Pin 12 (C OUT) enters DL AMP from Pin 11 (DLA IN) via 1HDL (1H delay line), its level is controlled, and the signal is applied to the ADD/SUB circuit. The original signal is added or subtracted in this circuit: the addition signal is applied to B-Y DEM and the subtraction signal to R-Y DEM, and they are demodulated by the +90 carrier whose phase is inverted every 1 H and the 0 carrier. The signals are then mixed with the luminance signal and output as the R, G, and B primary colors. <5> PAL ID In PAL mode, the phase of the +90 carrier is inverted in synchronization with H.SYNC. Sync detection is conducted to establish whether this matches the input burst. When there is an error, it is corrected by applying feedback to FF (ip-op). (3) Sync separation system The sync tip of the video signals input from Pin 23 (SYNC IN) is clamped and the sync signals are separated. On the basis of the SYNC pulse created here, BF (burst ag), BLK pulse and other timing pulses are generated and supplied to the circuits. The SYNC and BF (burst flag) pulses are output to Pins 15 and 16 via a buffer.
14
Y IN C12
R31
0.047
C5 C9 C11 50k 0.047 R21 4.7 0.047 510k C13 C14 + 1 103mV + 22
24 APL DET SHARPNESS 25 SYNC SEP 15 14 BLK ACK DET CHROMA AMP FF ADD/SUB SW INV 90 32 HUE PS 0 DEM B-Y R-Y Y/C MIX ACK YCLP 13
C17 + 4.7
22
21
20
19
18
17
SYNC SLICE
BF OUT
26
R8 50k
SYNC OUT
27
R10
28
39k R9*
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other rights due to same.
BURST GATE PAL ID
15
29
27k
12
C OUT
C1 0.01
30 ACC
R4
R6 R11
DL AMP
11
10k
31
ACC DET
10
R OUT
180k
C2
G OUT
C IN
0.47
APC 1
C7 1 R17 R30 R15 6k 1k C4 C6 0.01 R14 100k 0.1 C8 R18
VXO 3 4 5 6 7 8
Standard special parts Crystal HC-49/U by KINSEKI, LIMITED * Metal film resistor with an accuracy of 1%
C10
C15 0.01
C16 4.7
CXA1585Q
B OUT
Y IN
0.047 C12
50k
C5 + 22
103mV
23 APL AMP
22
21
20
19
18
17
CLP 16
BF OUT
PULSE GEN
R8
50k
27 YCLP
R10
28 BURST GATE CHROMA AMP 12 FF ADD/SUB SW INV 90 R-Y 0 DEM B-Y 32 HUE PS Y/C MIX 11 PAL ID
8.2H
1HDL
DAT
39k
R9*
29
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other rights due to same.
C19 0.01 R26 390
DAT: Delay Adjusting Transformer
16
30 ACC DL AMP 31 ACC DET 10 9 APC VXO 3 4 5 6 7 8 1
C7 1 1.8k R19 R17 R30 R15 6k C4 C6 0.01 R14 1k 0.1 R19 100k C8 C10
27k
C1 0.01
R4
R6 R11
10k
R OUT
180k
C2
G OUT
0.47
Standard special parts 1HDL ADL-CS346-A02 by Asahi Glass Co., Ltd. DAT BTK ANS-18267DTY by TOKO INC. Crystal HC-49/U by KINSEKI, LIMITED * Metal film resistor with an accuracy of 1%
470 3.9k
10p
R20
V1 5V
C15 0.01
C16 4.7
B OUT
CXA1585Q
CXA1585Q
Adjustment Procedure NTSC mode Input signal: 75% color bar 1) Free-running f0 adjustment Adjust (R30) the DC voltage at Pin 2 (APC TC) so that the oscillation frequency (subcarrier) f SC = 3.579545MHz at Pin 5 (SC OUT) is within 20Hz under inputting sync condition. 2) Input level adjustment Adjust (R13) the input level so that the white peak (75% white) is set to 0.75Vp-p at the B output. Connect Pin 18 (APL CTL) to GND at this time.
3) HUE ADJ, C ADJ adjustment Adjust (R15, R6) HUE ADJ (Pin 1) and C ADJ (Pin 30) so that the colors (A, B, C and D in the figure below) of the B output amplitude are set to the same amplitude.
SYNC OUT
B OUT 0.75VP-P A B C D
PAL mode Input signal: 75% color bar 1) Free-running f0 adjustment Adjust (R30) the DC voltage at Pin 2 (APC TC) so that the oscillation frequency (subcarrier) fSC = 4.433619MHz at Pin 5 (SC OUT) is within 20Hz under inputting sync condition. 2) Input level adjustment (same as for NTSC).
3) DL AMP and DAT (delay adjusting transformer) adjustment Adjust (R24, DAT) Pin 14 (DLA BIAS) and DAT alternately so that the R output amplitudes (A1 and A2) are equal for the H periods before and after. 4) C ADJ adjustment Adjust (R6) C ADJ so that the colors of the R output amplitude are set to 0.75Vp-p.
SYNC OUT
A1 B OUT
A2
3784 47
17
CXA1585Q
Applications 1) The input dynamic range is 0.36Vp-p (max.). The breakdown is given as follows: Y IN (Pin 24) Sync signal: 0.103Vp-p Luminance signal: 0.256Vp-p (100% white) Burst signal: 0.143Vp-p
5) The amount of delay for luminance and chroma signals in the IC is the same. 6) Demodulation axis and detective output ratio The standard values are given below as referenced in the B-Y axis. 7) Notes on Operation
Demodulation Axis +88 +235 Detective Output Ratio 0.57 0.37
C IN (Pin 32)
Note that when the input signal exceeds the value of 0.36Vp-p from sync tip to white peak, the output may be clipped and attened. This applies the case for the APL circuit OFF (Pin 18 APL CTL = 0V). 2) The center frequency for the sharpness varies according to the resistor connected to Pin 28. The variation is 40kHz/kW, and the standard value is approximately 1.5MHz for 39kW. 3) The voltage of Pin 19 (APL TC) has the following values according to the APL (average picture level): APL 0% (all black): 2.0V APL 100% (all white): 3.2V 4) Pin 23 (SYNC IN) is normally connected to Pin 24 (Y IN) for use. To cope with weak electric elds, however, its level can be increased or a low-pass lter inserted to provide a separate input.
Be sure to wire X-tal (crystal oscillator) as close to the IC in as short a distance as possible since F0 varies depending on floating capacitance and other factors. Also, take particular care with the routing of the VCC and GND leads. Use a decoupling capacitor for VCC and others with superior performance, and attach it as close to the IC as possible.
18
CXA1585Q
(dB) 2 C OUT (output) (assumed to be 0dB output level for burst level 143mV is input)
ACC Characteristics
(dB) 40 30
0 20 PHASE 10 (dB) 2 10 0 10 6 20 8 40 30 10 0 INPUT (Burst level 143mVP-P = 0dB) 20 30 0 1 2 3 HUE ADJ (1 pin) 4 5 (V)
Free-running Frequency
3.5800 3.5798 3.5796 3.5794 3.5792 3.5790 3.5788 3.30 3.35 3.40 APC TC (2 pin) 3.45 3.50 (V)
25 1.0
1.5
2.0
2.5
3.0
3.5 (V)
APL Characteristics
APL CTL voltage (18 pin voltage) 1.5V 3.5V 4.0V
(dB) 8 6 4 B OUT 2 0 -2
7 6
-4 5 4 -6 -8 20 30 60 70 80 90 100 (%) APL (Assumed to be 100% when input Y level is 256mVP-P (100% white) 40 50 10k 100k Frequency 1M 10M (Hz)
19
CXA1585Q
Package Outline
0.15
25
16
32
0.3 0.8
+0.15 0.10
0.12
PACKAGE STRUCTURE
SONY CODE EIAJ CODE JEDEC CODE QFP-32P-L01 *QFP032-P-0707-A PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING 42ALLOY 0.2g
20
0.50
(8.0)