A Very Fast and Low Power Carry Select Adder Circuit

AIM: The main aim of the project is to design and implement A Very Fast and Low Power Carry Select Adder Circuit. ABSTRACT: Carry Select Adder (CSA) is known to be the fastest adder among the conventional adder structures. t is used in many data processing units for reali!ing faster arithmetic operations. n this paper" we present an innovative CSA architecture. t employs a novel incrementer circuit in the interim stages of the CSA. #alidation of the proposed design is done through design and implementation of $%" &' and %()bit adder circuits. Comparisons with e*isting conventional fast adder architectures have been made to prove its efficiency. The performance analysis shows that the proposed architecture achieves three fold advantages in terms of delay)area)power. Pro osed !et"od: n this paper we can replace the adder with (+' and &+' compressor. ,hich will reduce the area " power and delay.

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BL#C$ %IA&RAM:

-ig+ Conventional $%).it Carry Select Adder

T##LS: /ilin* 0.' S1" 2odelsim %.(c. APPLICATI#' A%VA'TA&(S: The proposed structure proves to be a easier solution for improving the speed of carry select adder. The conventional CSA suffers from the disadvantage of occupying more chip area" which has been overcome using the proposed ()bit incrementer unit.
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 The proposed carry select adder can be used to speed up the final addition in parallel multiplier circuits and other architectures which uses adder circuits. The proposed unit is also found to consume less power.

R(F(R('C(S: 3.4..edrij" 5Carry)Select Adder6" 71 Transactions on 1lectronic

Computers" 8p. &(9)&((" $0%'. A.:.,. ;eung and 7.:. ;u" 5A self)timed multiplier with optimi!ed final adder6" <niv. California .erkeley" -inal 7ep." CS '0'$" -all $0=0. C.S. ,allace" 5A suggestion for a fast multiplier6" Computers" #ol.$&" 8p" $()$>. 4. Skansky" 5Conditional)Sum Addition ?ogic6" 71 Trans. 3n 1lectronic Computers" 1C)0" 8p. ''%)'&$. #.@. 3klobd!ija" 5Aigh)Speed #?S Arithmetic <nits+ Adders and 111 Trans. on

2ultipliers6" in 5Besign of Aigh)8erformance 2icroprocessor Circuits6" .ook edited by A.Chandrakasan" 111 press.

V.Mallikarjuna (Project manager)

ISO: 9001- 2008 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &