Utilization of SDH analyzer

Portable analyzer Victoria SDH/SONET/PDH by Trend Communications is equipped with

colour touch screen LCD display for representation of results and for direct selection of all parameters.
Display represents graphically block-by-block function of equipment, that is used for transmission of
selected dataflow (from the right side to the left side) and for receiving of signal (from the left side to
the right side). Typical example is shown at next picture (see fig.1). Required parameters are possible to
adjust at display by pressing relevant parts of transmission system.

1 - Operating mode/hierarchy
2 - Bit rate & Rx code
3 - Number (K-L-M) of tributary
4 - Number of Rx tributary (163)
5 - Number of Tx tributary
6 - Rx pattern
7 - Coupled/Uncoupled
8 - Tx pattern
9 - OH channel selection for BER
10 - Rx/Tx indication
11 - Structure: C-x or PDH map
12 - Scrambler enable/disable
13 - Mapping type
14 - Background pattern
15 - Navigation buttons
16 - Tx frequency offset
17 - Tx clock source
18 - Enable/disable the laser
19 - Bit rate & Tx code
Fig. 1 Display adjustment - typical example
SDH/SONET multiplexer and demultiplexer tests
PDH/ANSI T_Carrier signals are carried in synchronous networks as the payload of
SDH/SONET signals. This makes for synchronous multiplexing and demultiplexing in the
transmitting and receiving ends of the circuit. These two operations have to be checked, if we wish to
guarantee proper operation. In other words, the correct mapping of the signal in the container/actual
payload capacity should be tested in the multiplexing process, while in the demultiplexing operation;
the payload must be correctly recovered.
Mapping can be easily tested by simply generating the correct payload with a frequency offset.
Victoria SDH/SONET/PDH provide two specific modes: the SDH/SONET multiplexer test (Mux)
and the SDH/SONET demultiplexer test (Demux), which are especially designed to perform such tests
and are widely accepted in the installation and bringing-into-service of SDH/SONET network
elements.

Fig. 2 Multiplexer and demultiplexer with SDH ADMs muldex
Monitoring of multiplexer function
1. Select at touch screen menu Setup/Configuration at the right side. You will see some block scheme.
Press the button in block Mode (1

see fig.1) at the left side and after select mode of measurement
Mux at bottom list.
2. Adjust structure of receiving signal STM-1 (Rx) at bottom side (Structure: PDH (11

see fig.1),
Mapping: C-12/AU-4 (13

see fig.1)). Display in detail multiplex scheme by pressing button Map
Rx at the left-bottom side.
3. Generate dataflow in the form PRBS 2
11
-1 (8

see fig.1) (E1

2048 kbit/s) with internal clock
source (17

see fig.1) without framing (Frame: None). Enter the time location (K-L-M) 1-1-1 of the
tributary signal in the signal STM-1 for receiving (TUG3-TUG2-TU12).
4. Connect analyzer optical input to the link port LP 2.1 of muldex and connect analyzer output
(OUT) to the muldex tributary port E1 by the help of balancing reduction (see fig.2a). Select
instead of link code CMI external optical module (External (2

see fig.1)).
5. Display and record status of indicators (red alarm) in menu LEDs current at the right side and
check the correct receiving.
6. Select twice menu Results at the right side and select item SOH POH. Record signification and
concrete capacity main bytes of overhead (RS-OH, MS-OH, LO-POH).
Monitoring of demultiplexer function
1. Select at touch screen menu Setup/Configuration at the right side. You will see some block scheme.
Press the button in block Mode (1

see fig.1) at the left side and after select mode of measurement
Demux at bottom list.
2. Adjust structure of sending signal STM-1 (Tx) at bottom side (Structure: PDH (11

see fig.1),
Mapping: C-12/AU-4 (13

see fig.1)).
3. Restore dataflow in the form PRBS 2
11
-1 (6

see fig.1) (E1

2048 kbit/s) with internal clock
source (17

see fig.1) without framing (Frame: None). Enter the time location (K-L-M) 1-1-1 of the
tributary signal in the signal STM-1 for sending (TUG3-TUG2-TU12).
4. Connect analyzer optical output to the link port LP 2.1 of muldex and connect analyzer input (IN)
to the muldex tributary port E1 by the help of balancing reduction (see fig.2b). Select instead of
link code CMI external optical module (External (2

see fig.1)) and switch on the laser (ON).
5. Display and record status of indicators (red alarm) in menu LEDs current at the right side and
check the correct receiving.

Fig. 3 Scheme for analyzing pointers function
Function analysis of pointer
1. Select at touch screen menu Setup/Configuration at the right side. You will see some block scheme.
Press the button in block Mode (1

see fig.1) at the left side and after select mode of measurement
SDH/SONET Path at bottom list. Generate dataflow at structure PDH E1 to VC-12 (Structure:
PDH, Mapping: VC-12, Tx

Rx) with internal clock source (17

see fig.1) and with initial
frequency deviation 0

ppm (16

see fig.1).
2. Scheme is shown at fig.3. The optical analyzer output of STM-1 (transmission part presents
muldex A) is connected to the link port LP 1.1 of add-drop muldex B and link output is connected
to the optical analyzer input of STM-1 (receiving part presents muldex C). Muldex B is adjusted to
the internal clock source with frequency f
2
(Free Running Mode).
3. Analyze stuffing at container VC-12, which is switched from the time location 1-2-2 to the time
location 1-2-3 in terms of transmission system. Check the correct receiving.
4. Select twice menu Results at the right side and find out pointer value (Pointer values). Adjust pointer
values 0 for AU-4 and TU-12 at transmission side (Transmitted), then record pointer values AU-4
and TU-12 at the receiving side (Received).
5. Select twice menu Results at the right side and find out stuffing in dependence on frequency
deviation of generated signal STM-1 with frequency f
1
(Pointer events). Measure at 10 seconds
intervals by the help of button Start/Stop for frequency deviation 0, 1, 5, 10, 20, 50, 100 and
200

ppm. Make graph from recognized values.
6. Find out frequency variation for clock source of analyzer that is derived from receiving signal (Rec).
Monitoring of bit error rate (BER)
1. Select at touch screen menu Setup/Configuration at the right side. You will see some block scheme.
Press the button in block Mode (1

see fig.1) at the left side and after select mode of measurement
SDH/SONET Path at bottom list. Generate dataflow at structure PDH E1 to VC-12 (Structure:
PDH, Mapping: VC-12, Tx

Rx) with internal clock source (17

see fig.1) and with initial
frequency deviation 400

ppm (16

see fig.1).
2. Press Start button and display error events in menu Results/Error and results of monitoring of bit
error rate (BER) in menu Results/Performance. Introduce meaning of all error parameters and
measured values over 20

seconds.