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D M 04%"sol te Maxim m )atings*&ote +, August 1986 74 &ote +: !-e .%"sol te Maxim m )atings/ are t-ose val es "e0ond 1-ic-t-e Revised March 2000 LS sa2et0 o2 t-e device cannot "e g aranteed3 !-e device s-o ld not "e LS Supply Voltage7V 74 Input Voltage7V operated at these limits. The parametric values defined in the ElectricalCharacteristics 04 tables are not guaranteed at the absolute maximum ratings. M The Recommended Operating D Operating Free Air Temperature Range0C to +70C H Conditions table will define the DM74LS04 Storage Temperature Range65C to +150C ex conditionsfor actual device operation. In Hex Inverting Gates ve )ecommended Operating Conditions General Description rt in This device contains six independent gates each of which S0m"ol'arameterMin&omMax;nits g performs the logic INVERT function. VCCSupply Voltage4.7555.25V G VIHHIGH Level Input Voltage2V at VILLOW Level Input Voltage0.8V es Ordering Code:
IOHHIGH Level Output Current0.4mA Order & m"er'ac(age & m"er'ac(age Description IOLLOW Level Output Current8mA DM74LS04MM14A14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow TAFree Air Operating Temperature070C DM74LS04SJM14D14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
4lectrical C-aracteristics DM74LS04NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices over also recommended available in Tape operating and Reel. free air Specify temperature by appending range (unless the suffix otherwise letter Xnoted) to the ordering code.
S0m"ol'arameterConditionsMin!0pMax;nits*&ote 5,
#$% Inp tO tp t %# LH HL
S1itc-ing C-aracteristics
at VCC = 5V and TA = 25C )L $ 5 (< S0m"ol'arameterCL $ +7 pFCL $ 70 pF;nits MinMaxMinMax tPLHPropagation Delay Time310415ns LOW-to-HIGH Level Output tPHLPropagation Delay Time310415ns HIGH-to-LOW Level Output
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D M 74 LS 04
+4=Lead Small O tline Integrated Circ it *SOIC,8 >4D4C MS=+508 03+70 &arro1 'ac(age & m"er M+4%
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+4=Lead Small O tline 'ac(age *SO',8 4I%> !#'4 II8 73:mm ?ide 'ac(age & m"er M+4D
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D M 74 LS 04 H ex In ve rt in g G at es
+4=Lead 'lastic D al=In=Line 'ac(age *'DI',8 >4D4C MS=00+8 03:00 ?ide 'ac(age & m"er &+4%
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIF4 S;''O)! 'OLIC# FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2.A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 11132airc-ildsemi3com
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!-is datas-eet -as "een do1nloaded 2rom: 1113Datas-eetCatalog3com Datas-eets 2or electronic components3