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The following formulas are meant as a reminder of the fundamentals given in most standard electronics text books. Notation for the formulas have the traditional meanings. Depletion capacitances are all given with a negative sign in the denominator as in C = C0 /(1 V /) . Consequently, when the junction is reverse biased, the minus sign turns into a positive sign. Figure F.1 presents the basic FET features and symbols. Bipolar Transistor Parameters (BJT)
Description Collector current Transconductance Input resistance Output resistance Base charging capacitance Emitter base junction Input capacitance Collector base
Formula IC = IS exp qIC kT 0 r = gm VA ro = IC CD = F gm gm = q NB Cje = AE Vj C = CD + Cje Co C = 1/3 1 VBC oc Ccso Ccs = 1/2 1 Vsc os gm 1 fT = 2 (C + C ) kT VT = = 0.259V q
1/3
qVBE kT
Collector substrate
Formula VGS VDS ID = IDSS 1 1 VP VA VDS VGS VP 3 (0 + VGS VDS )3/2 (0 + VGS )3/2 ID = Go VDS + 2 (0 + VP )1/2 VDS < VGS VP 2aW G0 = c L 2 ID K 2(VGS VP )VDS VDS gm =
2
Cgss0 1
VGSS 0 1/2
Metal Oxide Semiconductor Field Eect Transistor Parameters (MOSFET) Description Saturation region drain current Formula Cox W VDS ID = (VGS Vt )2 1 2L VA VDS VGS Vt Cox W 2 ID = 2(VGS Vt )VDS VDS 2L VDS < VGS Vt Cox =
ox
VDS VA
Oxide capacitance Transconductance Output resistance Input capacitance Transition frequency Surface mobility Holes Surface mobility Electrons N Channel JFET IDSS > 0 VP < 0 IDSS gmo = 2V P
K = IDSS >0 V2
P
tox W (VGS Vt ) L
gm = Cox ro =
|VA | ID 0 Cin = CGS + CGD = Cox LW gm s (VGS Vt ) fc = = 2Cin 2L2 s = 200 cm2 /(V sec) s = 450 cm2 /(V sec) P Channel JFET IDSS < 0 VP > 0 2IDSS gmo = VP IDSS K= 2 < 0 VP VGS < VP for |IDS | > 0 PMOS Enhancement Vt < 0
VP < VGS
VGS < Vt p Cox W <0 K= 2L PMOS Depletion Vt > 0 VGS < Vt for |IDS | p Cox W <0 K= 2L 3
n Cox W >0 2L