USN

10EC020 M.Tech. Degree Examination, December 2011

Max. Marks: 100

CMOS RF Circuit Design

Time: 3 hrs.

Note: Answer any FIVEfull questions.

1 a. b. c. When is a system considered to be linear? What are the effects of non-linearity in a communication system? (09 Marks) What causes inter-symbol interference in communication channels? Explain its effect and methods for reducing. (05 Marks) Two carriers of 200 MHz and 210 MHz frequency are fed to a non-linear amplifier. Show the output of the amplifier in 150 MHz to 300 MHz frequency range indicating the frequencies of the components. (06 Marks) Define noise figure (NF) of an amplifier and find the relation between noise figure and loss of a passive circuit. (10 Marks) In the system shown in Fig. Q 2(b), 10 meter coaxial cable is used to connect LNA output to pre-amp. Input. RF loss of the cable is 0.3 dB/meter. Calculate the overall noise figure of the system. (10 Marks) Coo.~t.cJ c.o..b1t

a. b.

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a. b. c.

Explain the pre - emphasis and de-emphasis. Where and what for they are used? (08 Marks) Justify why FM signals are more suitable to high efficiency power amplifiers compared to AM signals. (04 Marks) A 10KHz sinusoid signal frequency modulates a carrier of 500 MHz with a deviation of 200 KHz. Calculate the band width required for transmitting this FM signal. (08 Marks) Explain the OQPSK modulation with a schematic diagram and its advantages over QPSK modulation. (10 Marks) Show the phase transitions in QPSK and OQPSK waveforms. (05 Marks) Represent a carrier of 100 MHz, QPSK modulated with 2 MBPS PRBS data in frequency domain. (show minimum two sidebands). (05 Marks) What is CDMA? Explain the methods used in CDMA. Write a critical issue of each method.
(10 Marks)

a. b. c.

a. b.

What is GSM? What are its features? Show the air interface schematic. Find out the total capacity of GSM system. (10 Marks) What is homo dyne receiver? What are its disadvantages? (08 Marks) A wireless receiver down converts a 900 MHz RF signal to an IF frequency of 70 MHz. Find the image frequency. (04 Marks) Where Hartley architecture is used? Explain with schematic diagram how its function is achieved. (08 Marks) lof2

a. b. c.

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a. b.

What are phase - frequency detectors? Explain the operation and advantages. possible implementation scheme. Explain a simple direct digital synthesis technique? What are its advantages and compared to PLL architecture?

Describe a
(10 Marks)

drawbacks
(10 Marks)

a. b. c.

Write short notes on BSIM3 SPICE model. (05 Marks) What causes change in the value of resistors in a CMOS process? Write the expression used by SPICE to model the temperature dependence of a resistor. (07 Marks) Estimate the minimum and maximum resistance of an n-well resistor of length 100 um and width of 1a urn over a temperature range of a to 100C. (Assume: TCR of the resistor 10,000 ppmJ degC; TCR2 = 0, To = 27C and n-well resistor sheet resistance at To = 2500 Of square). (08 Marks)

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