MAGMA DESIGN AUTOMATION

Titan ADX

Titan ADX takes the guesswork out of analog design, shortening the analog design process from weeks to days and reducing power and area up to 50 percent. Because it makes analog design modular, predictable and re-usable, Titan ADX allows rapid design exploration, design spec retargeting and process migration for both the schematic and layout. Provides orders of magnitude higher design capacity that enables for the first time design optimization of entire system-level analog designs and multiple-objective, multipleprocess corner design closure.

Titan Analog Design Accelerator (ADX), an integral part of Magmas Titan mixed-signal design platform, focuses on solving analog/mixed-signal design, optimization and porting challenges. Its new, model-based approach allows circuit optimization and porting in a fraction of the time required by traditional simulation-based techniques.

Titan ADX is used for optimizing analog circuit performance for a given process technology and a specification such as minimum area or power, and for porting a design efficiently from one process technology to another. Titan ADX models analog circuits in process-independent equations and optimizes them for a target process technology in matter of minutes over many process-voltage-temperature (PVT) corners and operating conditions. Titan ADX presents a new design methodology that dramatically increases the efficiency of current SPICE-based flows. Titan ADX is customer-silicon proven in process technologies ranging from 350 nanometer (nm) to 40 nm. To meet the target specification in a given process node today, designers must perform many SPICE runs to analyze, design, verify and optimize the schematic. This iterative, trial-and-error learning process is used for all the building blocks of the design and is very time consuming. It takes almost the same amount of time to port/reuse an analog circuit as it did to design it. Titan ADX provides an automated, easy-to-use, equation-based design environment capable of handling large mixed-signal designs. Designers can describe the behavior of their system, circuit topologies and layout directives in equation models. Parts of the models are generated automatically from the schematic. These circuit models are linked to a specific foundry process and then optimized using the Titan ADX global optimization engine to generate optimum device sizes. Sized schematics can be input directly into industry-standard schematic editors. Titan ADX results correlate within the accuracy range of SPICE.

MAGMA DESIGN AUTOMATION

TitanADX
Advanced Capabilities
High Performance Designs Performance is optimized across many design scenarios and levels of hierarchy simultaneously. A power reduction of approximately 2X has been observed in customer designs. Efficient Porting/Reuse Methodology Infrastructure and template library eases portability across process nodes. Accelerates design porting time by up to 50X. Design Insight Capture Sensitivity analysis of the design identifies the toughest constraints for the topology. Easily determines critical corner per circuit and per specification. Significantly reduces the simulation time by reducing the number of SPICE simulations required. System Design/Tradeoffs High capacity optimization allows true system-level design. This enables the design of large mixed-signal blocks such as PLLs, ADCs, HSIOs, PCI-X and DDR-PHY. Formalize Design Titan ADX provides a flexible, rich user environment allowing designers to represent circuits and relationships in their own terms.

Results of analog-to-digital converter (ADC) circuit designed using Titan ADX. Power vs. area tradeoffs by varying input voltages.

Designers can vary the specification parameters and PVT corners to center the design using Titan ADX. Optimization provides sensitivity information per constraint, highlighting which constraints limit design objectives the most. Tradeoff analysis helps designers understand the limits of performance. Since critical corners are found during optimization, designers can drive simulations efficiently. Titan ADX also provides floorplan and related layout constraints to drive industry-standard layout editors.

Technology Features
Optimizes system and circuit, while including layout parasitic effects Includes many sample circuit templates with comprehensive documentation Provides device-level, easy-to-use floorplanning that incorporates physical constraints in the electrical design phase and reduces the number of post-layout simulations Automates process model generation (350 nm to 40 nm) Enables tradeoff analysis for system/architecture comparison Allows exploration of design boundaries, topologies and infeasible specs Handles large device counts very efficiently compared to simulation-based methods, i.e. PLLs can be optimized in hours Detects critical corners where performance is closest to specs Provides easy-to-use user interface Includes design repository management tools Produces optimization results in MATLAB-ready and ASCII format Integrates with the Titan platform and third-party industry-standard analog design environment

Sample results using Titan ADX

Titan ADX Design Methodology

Circuit Modeling and Capture Start with un-sized schematics from industry-standard analog design environment Add circuit constraints without leaving industry-standard analog design environment Export to Titan ADX, automatically obtain initial equations from schematics Include additional equations and design requirements in Titan ADX Library templates for primitive circuit equations are available as a start Enter circuit layout information using Titan Analog Virtual Prototype (AVP) tool Circuit Analysis and Exploration Optimize the design for specific specification objectives Run tradeoff analyses for various scenarios across many PVT corners Explore design boundaries of topology for a target foundry process Incorporate parasitic effects and layout directives into the design analysis Analyze effects of various physical floorplans on the circuit performance

Circuit Validation Titan ADX writes device sizes directly into industrystandard analog design verification environment Titan ADX allows use of optimization results to drive simulation test benches more efficiently, focusing on critical corners Circuit Porting Create device models for target foundry process and variant using Titan Process Compiler, a fully automated process modeling tool Optimize design for specified foundry process in minutes Perform initial device placement using Titan AVP Complete full-custom or automated routing in industry-standard analog design environment

Supported Platforms Linux, Sun Solaris

MAGMA DESIGN AUTOMATION

TitanADX

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2009 Magma Design Automation,Inc.All rights reserved. Magma is a registered trademark and Titan is a trademark of Magma Design Automation. All other product and comp any names are trademarks or registered trademarks of their respective companies. 07/09