Introduction

Boolean functions may be practically implemented by using electronic gates. The following points are important to understand.

Electronic gates require a power supply. Gate INPUTS are driven by voltages having two nominal values, e.g. 0V and V representing logic 0 and logic ! respectively. The OUTPUT of a gate provides two nominal values of voltage only, e.g. 0V and V representing logic 0 and logic ! respectively. "n general, there is only one output to a logic gate e#cept in some special cases. There is always a time delay between an input being applied and the output responding.

Truth Tables
Understanding Truth Tables Truth tables help understand the behaviour of logic gates.

They show how the input(s) of a logic gate relate to its output(s). The gate input(s) are shown in the left column(s) of the table with all the different possible input combinations. This is normally done by making the inputs count up in binary. The gate output(s) are shown in the right hand side column.

Truth Table Diagram

Drawing Truth Tables for Combined Gates Truth tables can also help understand the behaviour of combinations of logic gates linked together.

They are drawn in the same way as before but this time adding more columns in between the input and output columns. Each of the new columns show the outputs of stages in the logic circuit.

The following example shows the steps for drawing up a truth table for a combined gate configuration.

Logic gates
$igital systems are said to be constructed by using logic gates. These gates are the %&$, '(, &'T, &%&$, &'(, E)'( and E)&'( gates. The basic operations are described below with the aid of truth tables. AND gate

The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. AB

OR gate

The O gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high. A plus (!) is used to show the O operation.

NOT gate

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. "t is also #nown as an inverter. "f the input varia$le is A% the inverted output is #nown as NOT A. This is also shown as A&% or A with a $ar over the top% as shown at the outputs. The diagrams $elow show two ways that the NAND logic gate can $e configured to produce a NOT gate. "t can also $e done using NO logic gates in the same way.

NAND gate

This is a NOT'AND gate which is e(ual to an AND gate followed $y a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The sym$ol is an AND gate with a small circle on the output. The small circle represents inversion.

NOR gate

This is a NOT'O gate which is e(ual to an O gate followed $y a NOT gate. The outputs of all NO gates are low if any of the inputs are high. The sym$ol is an O gate with a small circle on the output. The small circle represents inversion.

EXOR gate

The &Exclusive-OR& gate is a circuit which will give a high output if either, but not both% of its two inputs are high. An encircled plus sign ( ) is used to show the )O operation.

EXNOR gate

The *Exclusive NOR! gate circuit does the opposite to the E'( gate. "t will give a low output if either" but not both, of its two inputs are high. The symbol is an E)'( gate with a small circle on the output. The small circle represents inversion.

The &%&$ and &'( gates are called universal functions since with either one the %&$ and '( functions and &'T can be generated. &ote+ % function in sum of products form can be implemented using &%&$ gates by replacing all %&$ and '( gates by &%&$ gates.
A function in product of sums form can $e implemented using NO replacing all AND and O gates $y NO gates. gates $y

Table #$ Logic gate s%&bols

Table , is a summary truth table of the input-output combinations for the &'T gate together with all possible input-output combinations for the other gate functions. %lso note that a truth table with *n* inputs has ,n rows. .ou can compare the outputs of different gates. Table '$ Logic gates re(resentation using the Truth table

Exa&(le
% &%&$ gate can be used as a &'T gate using either of the following wiring configurations.

/.ou can chec0 this out using a truth table.1

2ultiple "nput Gates twtruth table for this gate can be seen to the
right of it.

Three Input AND Gate

Here is an example of a three input A ! gate. otice that the truth table for the three input gate is similar to the truth table for the two input gate. "t works on the same principle# this time all three inputs need to be high ($) to get a high output.

Four Input AND Gate Here is an example of a four input A ! gate. "t also works on the same principle# all four inputs need to be high ($) to get a high output. The same principles apply to %# &#...# n input gates.

Ma ing Multi Input Gates

'ulti input gates can be made by (oining gates of the same type with less inputs. The diagrams below shows how a three input A ! gate and and a four input A ! gate can be made out of two input A ! gates.

Designing Logic Circuits - Minterms

The design process of a logic circuit can be bro0en down in the following steps+
1. *tart with the purpose or function of the circuit. +. ,hoose logic

varia$les that can $e used to descri$e the function of the circuit. -. .rite the function as a truth ta$le% showing how the circuit should respond to all possi$le com$inations of inputs. /. .rite a $oolean e0pression that represents the truth ta$le. 1. *implify the $oolean e0pression. 2. ,onstruct the circuit and test it to ensure it performs the desired function.

Minterms
2interms is one approach to writing the boolean e#pression that represents a truth table, to accomplish step 3 above. 2interms are made by %&$ing the input variables or their complements. 4onsider the following table with , inputs+
A B 3inter m

1 1 A4B 1 5 A4 5 1 4B

5 5

5hen writing the minterm, the variable % or B is used when its value is !. The complements and are used when the value is 0. Because of this, the minterm is equal to !. 6or e#ample, 7 !. when % 7 ! and B 7 !, then %8B 7 !. 9owever, when % 7 ! and B 7 0, then % 8

The boolean e#pression is made by '(ing the minterms for rows where the output is desired to be !. 4onsider the following e#ample, if we want to create a circuit that would give the following truth table+
A B 6 1 1 1 1 5 5 5 1 5 5 5 1

Then the rows where the output is !, have the following minterms+
A B 6 3inter m

1 1 1 A4B 1 5 5 5 1 5 5 5 1 4

5e write the minterms on those lines which have an output of ! only. 5e write the boolean e#pression by writing the sum /'(s1 of these minterms. Therefore, the required e#pression is+

. 7 %8B :

The minterm method always e#presses the output as a sum of products of the input variables. "t is not necessarily the simplest e#pression, however, it is a straightforward method that always wor0s.

&ow consider a ; input situation. The table of minterms is as follows+

A B , 3interm 1 1 1 A4B4, 1 1 5 A4B4 1 5 1 A4 1 5 5 A4 5 1 1 5 1 5 5 5 1 5 5 5 4, 4

4B4, 4B4 4 4 4, 4

4onsider the following e#ample, if we wanted a circuit that had the following truth table+
A B , 6 1 1 1 5 1 1 5 1 1 5 1 1

1 5 5 5 5 1 1 5 5 1 5 5 5 5 1 1 5 5 5 5

Then the rows that have an output of !, have the following minterms+
A B , 6 3interm 1 1 1 5 1 1 5 1 A4B4

1 5 1 1 A4 1 5 5 5 5 1 1 5 5 1 5 5 5 5 1 1 5 5 5 5 4

4,

4,

'nce again, we write the minterms on those lines which have an output of ! only. 5e write the boolean e#pression by writing the sum /'(s1 of these minterms. Therefore, the required e#pression is+ .7%8B8 :%8 84: 8 84

Give the e#pressions represented by the following truth tables+ /a1 %B. 00! 0!! !00 !!! /b1 %B4. 000! 00!! 0!0! 0!!! !000 !0!0 !!00 !!!0 /c1 %B4. 0000 00!! 0!0! 0!!! !000 !0!0 !!0! !!!0 /d1 %B4. 000! 00!! 0!00 0!!! !000 !0!! !!00 !!!!
1. 7or each e0pression a$ove% draw the circuit diagram. +. 7or each e0pression a$ove% construct your circuit using the logic gate simulator and test it to ensure it gives the re(uired truth ta$le. -. 8sing the $oolean alge$ra laws% simplify any e0pressions possi$le.

Design Problems
E#ample <roblem+ "n some countries, traffic lights have only a red and green signal, they do not have a yellow. To replace the yellow light, the light that was green turns to red while the light pointing at the other road stays red. Therefore, the lights are red in all directions for a short period of time. "f the corner has a 5al0-$on*t 5al0 signal, it is on only when the green light is showing. 4reate the logic circuit that can control the 5al0-$on*t 5al0 signal for the traffic light in one direction. =olution+ 6rom the design process steps above.

Ste( #$
$raw a diagram of the intersection with the 5al0-$on*t 5al0 signal for one corner. Thin0 about how the red and green lights wor0 together for one traffic light.

Ste( '$
>et % represent the red light where ! 7 on >et B represent the green light where ! 7 on >et . represent the 5al0 signal where ! 7 on

Ste( )$
A B 3eaning 5 5 caution% don&t wal# cars stop% don&t wal# cars go% safe to wal# 6 5

1 5

5 1

1 1 error% don&t wal#9 5

Ste( *$
A B 6 3inter m

5 5 5 1 5 5 5 1 1 1 1 5 4B

Therefore, the e#pression is+ . 7

8B

Ste( +$
The simplest form of the e#pression is+ . 7 8B

Ste( ,$

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