Darlington transistor

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Circuit diagram of a Darlington pair using NPN transistors In electronics, the Darlington transistor (often called a Darlington pair) is a compound structure consisting of two ipolar transistors (either integrated or separated de!ices) connected in such a way that the current amplified y the first transistor is amplified further y the second one"#$% &his configuration gi!es a much higher current gain than each transistor taken separately and, in the case of integrated de!ices, can take less space than two indi!idual transistors ecause they can use a shared collector" Integrated Darlington pairs come packaged singly in transistor'like packages or as an array of de!ices (usually eight) in an integrated circuit" &he Darlington configuration was in!ented y (ell )a oratories engineer *idney Darlington in $+,-" .e patented the idea of ha!ing two or three transistors on a single chip sharing a collector"#/% 0 similar configuration ut with transistors of opposite type (NPN and PNP) is the *1iklai pair, sometimes called the 2complementary Darlington"2

Contents

$ (eha!iour / Disad!antages - *ee also 3 4eferences , 56ternal links

Behaviour
0 Darlington pair eha!es like a single transistor with a high current gain (appro6imately the product of the gains of the two transistors)" In fact, integrated de!ices ha!e three leads ((, C and 5), roadly e7ui!alent to those of a standard transistor" 0 general relation etween the compound current gain and the indi!idual gains is gi!en y8

If 1 and 2 are high enough (hundreds), this relation can e appro6imated with8

0 typical modern de!ice has a current gain of $999 or more, so that only a small ase current is needed to make the pair switch on" .owe!er, this high current gain comes with se!eral draw acks"

[edit] Disadvantages
:ne draw ack is an appro6imate dou ling of ase'emitter !oltage" *ince there are two ;unctions etween the ase and emitter of the Darlington transistor, the e7ui!alent ase' emitter !oltage is the sum of oth ase'emitter !oltages8

For silicon' ased technology, where each <(5i is a out 9"=, < when the de!ice is operating in the acti!e or saturated region, the necessary ase'emitter !oltage of the pair is $"- <" 0nother draw ack of the Darlington pair is its increased 2saturation2 !oltage" &he output transistor is not allowed to saturate (i"e" its ase'collector ;unction must remain re!erse' iased) ecause the first transistor, when saturated, esta lishes full ($99>) parallel negati!e feed ack etween the collector and the ase of the second transistor#-%" *ince collector'emitter !oltage is e7ual to the sum of its own ase'emitter !oltage and the collector'emitter !oltage of the first transistor, oth positi!e 7uantities in normal operation, it always e6ceeds the ase'emitter !oltage" (In sym ols, <C5/ ? <(5/ @ <C5$, so <C/ A <(/ always") &hus the 2saturation2 !oltage of a Darlington transistor is one <(5 (a out 9"=, < in silicon) higher than a single transistor saturation !oltage, which is typically 9"$ ' 9"/ < in silicon" For e7ual collector currents, this draw ack translates to an increase in the dissipated power for the Darlington transistor o!er a single transistor" &he increased low output le!el can cause trou les when &&) logic circuits are dri!en"

0nother pro lem is a reduction in switching speed, ecause the first transistor cannot acti!ely inhi it the ase current of the second one, making the de!ice slow to switch off" &o alle!iate this, the second transistor often has a resistor of a few hundred ohms connected etween its ase and emitter terminals"#$% &his resistor pro!ides a low impedance discharge path for the charge accumulated on the ase'emitter ;unction, allowing a faster transistor turn'off" &he Darlington pair has more phase shift at high fre7uencies than a single transistor and hence can more easily ecome unsta le with negati!e feed ack (i"e", systems that use this configuration can ha!e poor phase margin due to the e6tra transistor delay)" Darlington pairs are a!aila le as integrated packages or can e made from two discrete transistorsB C$ (the left'hand transistor in the diagram) can e a low power type, ut normally C/ (on the right) will need to e high power" &he ma6imum collector current IC(ma6) of the pair is that of C/" 0 typical integrated power de!ice is the /N=/D/, which includes a switch'off resistor and has a current gain of /399 at IC?$90" 0 Darlington pair can e sensiti!e enough to respond to the current passed y skin contact e!en at safe !oltages" &hus it can form the input stage of a touch'sensiti!e switch"