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UNIVERSITY OF MORATUWA Faculty of Engineering Department of Electrical Engineering M.Sc. Engineering Assignment EE 5071 Microprocessor Based Sys e!

!s February 2013 INSTRU"TIONS 1. This assignment accounts for 30 of the mo!ule assessment. 2. Ans"er A## #uestions. 3. $f you ha%e any !oubt as to the interpretation of the "or!ing of a #uestion& ma'e your o"n !ecision& but clearly state it on the script. (ame $n!e- (o 1atch ) *aya"eera +.,.(. ) 11.10/0 )$n!ustrial Automation 22011320134

5age 1 of 6

EE6071 $%es io& 1 a4 Discuss the benefits of using a multiple8bus architecture compare! to single8bus architecture. 9sing a multi8bus architecture "ill really impro%e the spee! an! also increase the performance of processor in e-ecution of !ifferent instructions& because using a multi8 bus architecture "ill help in such a "ay that one !e%ice "oul! be connecte! to one bus or less !e%ices "oul! be connecte! to one bus rather than in single bus architecture more !e%ices "oul! be attache! to single bus. :ence& the !elay in e-ecution of instructions of the !e%ices "oul! be really less& because in case of single bus architecture the !elay is greater. Actually& "hen an instruction is transferre! by the bus to the processor from a specific !e%ice& the other !e%ices "ait for the bus to be free an! transfer their instructions "hen the bus becomes free. :ence each !e%ice has to "ait for the bus to be free an! hence a !elay comes in the e-ecution of the instructions. (o"& in multi bus architecture less !e%ices are connecte! to a single bus hence the !elay in the e-ecution of instructions is less& Therefore& impro%ing the spee! of the e-ecution of the program. b4 1riefly !escribe follo"ing interfaces. 2i4 5;$ E-press 5;$ E-press 25eripheral ;omponent $nterconnect E-press4& officially abbre%iate! as 5;$e& is a high8spee! serial computer e-pansion bus stan!ar! !esigne! to replace the ol!er 5;$& 5;$8<& an! A,5 bus stan!ar!s. 5;$e has numerous impro%ements o%er the aforementione! bus stan!ar!s& inclu!ing higher ma-imum system bus throughput& lo"er $3= pin count an! smaller physical footprint& better performance8scaling for bus !e%ices& a more !etaile! error !etection an! reporting mechanism 2A!%ance! Error >eporting 2AE>4& an! nati%e hot8plug functionality. More recent re%isions of the 5;$e stan!ar! support har!"are $3= %irtuali?ation. 2ii4 SATA SATA host a!apters an! !e%ices communicate %ia a high8spee! serial cable o%er t"o pairs of con!uctors. $n contrast& parallel ATA 2the !esignation for the legacy ATA specifications4 use! a 1/8bit "i!e !ata bus "ith many a!!itional support an! control signals& all operating at much lo"er fre#uency. To ensure bac'"ar! compatibility "ith legacy ATA soft"are an! applications& SATA uses the same basic ATA an! ATA5$ comman!8set as legacy ATA !e%ices. 2iii4 9S1 9S1 %ersion 1.1 supporte! t"o spee!s& a full spee! mo!e of 12Mbits3s an! a lo" spee! mo!e of 1.6Mbits3s. The 1.6Mbits3s mo!e is slo"er an! less susceptible to EM$& thus re!ucing the cost of ferrite bea!s an! #uality components. For e-ample& crystals can be replace! by cheaper resonators. 9S1 2.0 "hich is still yet to see !ay light on mainstream !es'top computers has uppe! the sta'es to @A0Mbits3s. The @A0Mbits3s is 'no"n as :igh Spee! mo!e an! "as a tac' on to compete "ith the Fire"ire Serial 1us.

5age 2 of 6

EE6071
USB Speeds High Speed - 480Mbits/s Full Speed - 12Mbits/s Low Speed - 1.5Mbits/s

2i%4

$EEE 13.@ 2Fire+ire4 De%ices attache! to the $EEE 13.@ serial bus support to the automatic configuration. 9nli'e 9S1 !e%ices& each 13.@ no!e that attache! to the bus automatically participates in the configuration process "ithout inter%ention from the host system. 0i'e any bus that supports bus mastering the 13.@ bus has the ability to increase o%erall system performance. $n the 5; en%ironment the 13.@ bus can re!uce traffic across 5;$ an! re!uce access to the memory sub systems. Many peripheral !e%ices such as har! !ri%es an! %i!eo cameras re#uire high throughput. The 13.@ bus accommo!ates these types of !e%ices "ith the @00 Mb3s transfer rate.

2%4

>S8232 2serial port4 >S8232 2>ecommen!e! Stan!ar! 8 2324 is a telecommunications stan!ar! for binary serial communications bet"een !e%ices. $t supplies the roa!map for the "ay !e%ices spea' to each other using serial ports. The !e%ices are commonly referre! to as a DTE 2!ata terminal e#uipment4 an! D;E 2!ata communications e#uipment4& an! coul! inclu!e items li'e a computer an! mo!em& respecti%ely. 9p!ate! !esignations for this protocol ha%e inclu!e! E$A8232 2Electronic $n!ustries Alliance4 an! the more current E$A3T$A8232 2Telecommunications $n!ustry Association4. These organi?ations ha%e %oluntarily ta'en on the protocol an! the tas' of impro%ing it. Though it is sponsore! by organi?ations in the 9nite! States& the most current %ariety is compatible "ith a stan!ar! 'no"n as $T9 %.2@ 2$nternational Telecommunication 9nion4. ;ompliance "ith the international stan!ar! helps manufacturers turn out pro!ucts that "ill "or' in a global mar'etplace.

5age 3 of 6

EE6071 $%es io& ' a4 ;alculate 783 using four bit numbers an! 1oothBs Algorithm. M 0111 0111 0111 0111 0111 0111 0111 0111 A 0000 1001 1100 0011 0001 1010 1101 1110 C 1101 1101 1110 1110 1111 1111 0111 1011 C81 0 0 1 1 0 0 1 1 start& n D @ A D A8M AS>& n D 3 A D AEM AS>& nD2 A D A8M AS>& nD1 AS>& nD0

M-CD;DACD101011 b4 1riefly !escribe har!"are implementation of 1ooth Algorithm.

The har!"are comprises of n8bit Multiplican! 214& n8bit Multiplier 2C4& an! controller mo!ule& Arithmetic 0ogic 9nit 2A094 an! pro!uct 2A4 unit. As the inputs to the System multiplican! an! multiplier are gi%en an! accor!ing to the booth algorithm ;ontroller mo!ule gi%es the instruction to a!!ition& shifting right an! "rite. The =peration is iterate! up to nD0.

5age @ of 6

EE6071

$%es io& ( a4 0ist an! briefly !escribe the 'ey ser%ices pro%i!e! by an operating system. 1. ;onte-t S"itching F Sche!uling& "hich allocate a process ;59 time to e-ecute its instructions. 2. Memory Management& "hich !eals "ith allocating memory to processes. 3. $nter process ;ommunication& "hich !eals "ith facilities to allo" concurrently running processes to communicate "ith each other. @. File Systems& "hich pro%i!e higher le%el files out of lo" le%el unstructure! !ata on a !is'. 6. :igh le%el $3= facilities& "hich free a process from the lo"8le%el !etails of interrupt han!ling. b4 Discus importance of %irtual memory. The term G%irtual memoryG refers to space allocate! on a har! !ri%e "here !ata can be store! for rapi! access. Hirtual memory is slo"er than soli!8state memory chips so it is typically use! as bac'up memory in certain situations. Multitas'ing =ne important use of %irtual memory is multitas'ing. +hen a computer user opens multiple programs at once& the !ata for these programs must be store! in memory for #uic' access. The more programs are open& the more memory is nee!e!. +hen the computerIs physical memory is full& the e-cess !ata is store! in %irtual memory. 0arge 5rograms $n a!!ition to multitas'ing& %irtual memory allo"s programmers to create larger an! more comple- applications. +hen these programs are running& they occupy physical memory as "ell as %irtual memory

En! of assignment

5age 6 of 6

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