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Session 2

Session Name: Silicon Wafer Fabrication Author Name: V.Navaneethakrishnan Department: Electronics an !ommunication En"ineerin" Sub#ect$!ourse: V%S& !ell Number: ''(()2)*)+

Session ,b#ectives
At the end of this session, the learner will be able to: Introduction to history of ICs Preparation of the Silicon Wafer Crystal Growth and Wafer Slicing Process Lapping !tching

Photolithography "as#ing Steps $inal %i&ensional of wafer

-eachin" %earnin" .aterial


White 'oard and "ar#ers

PP( LC% pro)ector and Screen

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Finite State V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!,

Session /lan
i$e (in min) Content %earning &id and Methodology Faculty Approach Typical Student Activity %earning '#tco$es ()loo$s * +ardeners,

Recap of 05 history of I !s "ame

Monitors onducts

#istens $articipates Ans%ers

Analy&ing Intrapersonal Interpersonal 'er(al) #inguistic

$reparation of *0 the Silicon +afer

hal, and Tal, -emonstration

./plains Facilitates

$articipates 0(serves

1nderstanding Intrapersonal Interpersonal 'isual

rystal "ro%th *5 and +afer Slicing $rocess

hal, and Tal, Analogy mapping video -emonstration

./plains

#istens 0(serves Identifies

1nderstanding Intrapersonal Interpersonal

#apping 2 *5 .tching3 $hotolithography 2 Mas,ing Steps hal, and Tal, Analogy mapping ./plains

$articipates 0(serves omprehends #istens

Applying Intrapersonal Interpersonal 4inesthetic 'er(al)#inguistic

*0

Final -imensional of %afer

'ideo -emonstration

Facilitates ./plains

0(serves #istens Analyses

1nderstanding Applying Intrapersonal Interpersonal

05

onclusion

5ui&

Facilitates Monitors

$articipates Analyses Ans%ers

Applying Intrapersonal Interpersonal

Finite State Machine V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!, "ar#r

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Session &nputs
&ntro uction to histor0 of &!1s
'efore we start the session, it would be better to refresh the learners #nowledge of the history of ICs, we can conduct a si&ple ga&e to re*ise the concepts in detail+

Su""este

Activit0: 5uestioning

We can di*ide the learners into two groups+ We can start fro& any learner of one group+ !*eryone according to their turn has to as# a ,uestion to the other group+ (he correct ,uestion shall be awarded - &ar#+ $or wrong ,uestions, the group shall loose one &ar#+ (he counter part fro& the other group shall answer this ,uestion+ If he.she fails to gi*e the correct answer, the group shall lose / &ar#s and if he.she answers after referring the noteboo#, the group shall lose - &ar#+ After one round, the groups can switch their roles+ (he group which answered can now as# ,uestions and the group which as#ed ,uestions can now answer+ (he processing of Silicon wafers to produce integrated circuits in*ol*es a good deal of che&istry and physics+ Starting with thin, round wafers of silicon crystal, in dia&eters of -01, /11, and 211&&, the processes described here build up a succession of layers of &aterials and geo&etries to produce thousands of electronic de*ices at tiny si3es, which together function as integrated circuits 4ICs5+ (he de*ices which now occupy the surface of a one6inch s,uare IC would ha*e
Page . Ver : 1.01 Machine "ar#r Finite State V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!,

occupied the better part of a &ediu&6si3ed roo& /1 years ago

-0pes of FS.
Generally $S"s are broadly classified into / types+ 7a&ely -+ "oore &achine /+ "ealy &achine Su""este Activit0: 5uestioning

(he ,uestions could be as follows: -+ What do you &ean by "oore "ealy state &achine8 /+ Why feed forward techni,ue re,uired in "ealy state &achine8 2+ What are all the states a*ailable in both the state &achines8 (he response of the learners can be written on the board+ Co&pare the learners #eyword with the facilitator already ha*ing so&e #eywords and &a#e the& to understand the #eywords properly

2. .oore machine
A state &achine which uses only !ntry Actions, so that its output depends on the state, is called a "oore &odel

Finite State Machine / V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!, "ar#r

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(he outputs are properties of states the&sel*es+++ which &eans that you get the output after the &achine reaches a particular state, or to get so&e output your &achine has to be ta#en to a state which pro*ides you the output

2. .eal0 machine
A state &achine which uses only Input Actions, so that the output depends on the state and also on inputs, is called a "ealy &odel

"ealy &achines gi*e you outputs instantly, that is i&&ediately upon recei*ing input, but the output is not held after that cloc# cycle
machine 's Mealy machine

.oore

7ow that the learners ha*e a clear idea about types of $S"s, it would be the ti&e to ha*e a loo# at the difference between "oore &achine and "ealy &achine with the help of an acti*ity+ Su""este Activit0: Fill in the blanks

We can as# the learners to answer the following ,uestions+ "a#e two colu&ns in the blac# board, one for "oore &achine and one for "ealy &achine+ After getting the answers for 9uestion no+ - write the answers on the corresponding colu&n+ Stri#e out the irrele*ant answers+

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Finite State V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!,

As learners are fa&iliar with "oore &achine, lets as# the& to fill up the Answers -+ "oore &achine output depends on :::::::::: only 4After answering, sa&e ,uestion is repeated for "ealy $S"+ 4;eplace "oore by "ealy5 (he ,uestion will be li#e this "ealy &achine output depends on :::::::::: and :::::::::: also 4"ealy5 /+ "oore state &achine can be i&ple&ented as a :::::::::: &achine 2+ "oore &achines gi*e the output after the &achine reaches a :::::::::: <+ (he nu&ber of states is :::::::::: co&pare to "ealy &achines

.oore machine -+ "oore &achine output depends on present state only /+ 7o possibility of glitches

.eal0 machine -+ "ealy &achine output depends on present state and present input also /+ there are possibilities of glitches appearing in the output *ariables 2+ "ealy &achines are not i&ple&ented as "oore &achines

2+ "oore state &achine can be i&ple&ented as a "ealy state &achine

<+ "oore &achines gi*e the output <+ "ealy &achines gi*e the outputs instantly, that is i&&ediately after the &achine reaches a upon recei*ing input particular state 0+ (he nu&ber of states is &ore co&pare to "ealy &achines 0+ (he nu&ber of states is less co&pare to "oore &achines

Finite State Machine 1 V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!, "ar#r

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-ra%ing a FSM for a se6uence detector

There are 5 steps followed in the FSM sequence detector procedure 1. Define states 2. Describe states 3. Draw transition 4. Define transition trigger 5. Define uard condition To e!plain this concept we will "a#e a role pal$ Su""este Activit0: 3ole /la0

As we need = learners to participate this role play (he facilitator needs to e>plain the role of each participants+ (he < learners are arranged in a straight line, each learners position )ust li#e a state+ (he =th

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Finite State Machine 3 V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!, "ar#r

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Su""ar$

In this session, we learnt to: What is $S" and what are the types of $S" Identify the needs of $S" to design a controller

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Finite State V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!,

Assi"nment
-+ ,w,wwe

Finite State Machine 11 V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!, "ar#r

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3eferences

http:..www+nobelpri3e+org.educational.physics.integrated:circuit .history.

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Finite State V.Navaneethakrishnan, Chettinad College of Engineering and echnolog!,

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