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Chapter 2
Combinational Logic Circuits
Dr. I. Damaj
1
Overview
n
Part 1 – Gate Circuits and Boolean Equations
n
Binary Logic and Gates
n
Boolean Algebra
n
Standard Forms
n
Part 2 – Circuit Optimization
n
Two-Level Optimization
n
Map Manipulation
n
Multi-Level Circuit Optimization
n
Part 3 – Additional Gates and Circuits
n
Other Gate Types
n
Exclusive-OR Operator and Gates
n
High-Impedance Outputs
Dr. I. Damaj
2
Binary Logic and Gates
n
Binary variables take on one of two values.
n
Logical operators operate on binary values and binary variables.
n
Basic logical operators are the
NOT.
logic functions AND, OR and
n
Logic gates implement logic functions.
n
Boolean Algebra: a useful mathematical system for specifying
and transforming logic functions.
n
We study Boolean algebra as foundation for designing and
analyzing digital systems!
Dr. I. Damaj
3
Binary Variables
n
Recall that the two binary values have
different names:
n
True/False
n
On/Off
n
Yes/No
n
1/0
n
We use 1 and 0 to denote the two values.
n
Variable identifier examples:
n
A, B, y, z, or X 1 for now
n
Dr. I. Damaj
4
Logical Operations
n
The three basic logical operations are:
n
AND
n
OR
n
NOT
n
AND is denoted by a dot (·).
n
OR is denoted by a plus (+).
n
NOT is denoted by an overbar ( ¯ ), a single
quote mark (') after, or (~) before the variable.
Dr. I. Damaj
5
Notation Examples
n Examples:
n
Y = A.B is read “Y is equal to A AND B.”
n
z = x + y is read “z is equal to x OR y.”
n
X = ~A is read “X is equal to NOT A.”
Note: The statement:
1 + 1 = 2 (read “one plus one equals two”)
is not the same as
1 + 1 = 1 (read “1 or 1 equals 1”).
Dr. I. Damaj
6
 Operator Definitions Operations are defined on the values "0" and "1" for each operator: AND OR 0 · 0 = 0 0 + 0 = 0 NOT 0 1 · 1 = 0 · 0 = 0 0 1 + 1 = 1 + 0 = 1 0 1 = 1 0 = 1 · 1 = 1 1 + 1 = 1 Dr. I. Damaj 7

Truth Tables

n
n
Example: Truth tables for the basic logic operations:
AND
OR
NOT
X
Y
Z = X+Y
X
Y
Z = X·Y
X
Z = X
0
0
0
0
0
0
0
1
0
1
1
0
1
0
1
0
1 1
0
1
0
0
1 1
1
1
1
1
Dr. I. Damaj
8

Truth table - a tabular listing of the values of a function for all possible combinations of values on its arguments.

Logic Function Implementation
n
Using Switches
Switches in parallel => OR
n
For inputs:
logic 1 is switch closed
n
logic 0 is switch open
n
n
For outputs:
Switches in series => AND
logic 1 is light on
n
logic 0 is light off.
n
n
NOT uses a switch such
that:
Normally-closed switch => NOT
C
logic 1 is switch open
n
logic 0 is switch closed
n
Dr. I. Damaj
9
Logic Gates
n
In the earliest computers, switches were opened and
closed by magnetic fields produced by energizing
coils in relays. The switches in turn opened and
closed the current paths.
n
Later, vacuum tubes that open and close current
paths electronically replaced relays.
n
Today, transistors are used as electronic switches
that open and close current paths.
Dr. I. Damaj
10
 Logic Gate Symbols and Behavior n Logic gates have special symbols: X X Z 5 X Z 5 X · Y Z 5 X 1 Y X Y Y AND gate OR gate NOT gate or inverter n And waveform behavior: (a) Graphic symbols X 0 0 1 1 Y 0 1 0 1 (AND) X · Y 0 0 0 1 (OR) X 1 Y 0 1 1 1 Dr. I. Damaj (NOT) X 1 1 0 0 11 (b) Timing diagram
 Truth Table X Y Z F = X + Y’ . Z 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1

Equation

X

Y

Z

n

n

F =X +YZ

F

Logic Diagrams and Expressions

Logic Diagram

Dr. I. Damaj

Boolean equations, truth tables and logic diagrams describe thesame function!

12

Truth tables are unique; expressions and logic diagrams are not. This gives flexibility in implementing functions.

 Boolean Algebra An algebraic structure defined on a set of at least two elements, B, together with three binary operators (denoted +, · and ~ satisfies the following basic identities: ) that 1. X + 0 = X 2. X . 1 = X 3. X + 1 = 1 4. X . 0 = 0 5. X + X = X 6. X . X = X 7. X + X = 1 8. X . X = 0 9. X = X 10. X + Y = Y + X 11. XY = YX Commutative 12. (X + Y) + Z = X + (Y + Z) 13. (XY) Z = X(Y Z) Associative 14. X(Y + Z) = XY + XZ 15. X + YZ = (X + Y) (X + Z) Distributive 16. X + Y = X . Y 17. X . Y = X + Y DeMorgan’s Dr. I. Damaj 13
 Some Properties of Identities & the Algebra n The identities above are organized into pairs. These pairs have names as follows: n 1-4 Existence of 0 and 1 n 5-6 Idempotence n 7-8 Existence of complement n 9 Involution n 10-11 Commutative Laws n 12-13 Associative Laws n 14-15 Distributive Laws n 16-17 DeMorgan ’s Laws n The dual of an algebraic expression is obtained by interchanging + and · and interchanging 0’s and 1’s. n Example: F = (A + C) · B + 0 dual F = (A · C + B) · 1 = A · C + B Dr. I. Damaj 14
Boolean Operator Precedence
n The
order
of
evaluation
in
a
Boolean
expression is:
1.
Parentheses
2.
NOT
3.
AND
4.
OR
n Consequence:
Parentheses
appear
around OR expressions
n
Example: F = A(B + C)(C + D)
Dr. I. Damaj
15
 Example 1: Boolean Algebraic Proof n A + A ·B = A (Absorption Theorem) Proof Steps Justification (identity or theorem) A + A·B = A · 1 + A · B X = X · 1 = A · ( 1 + B) X · Y + X · Z = X ·(Y + Z)(Distributive Law) = A · 1 1 + X = 1 = A X · 1 = X n Our primary reason for doing proofs is to learn: n Careful and efficient use of the identities and theorems of Boolean algebra, and n How to choose the appropriate identity or theorem to apply to make forward progress, irrespective of the application. Dr. I. Damaj 16
 Example 2: Boolean Algebraic Proofs AB + AC + BC = AB + AC (Consensus Theorem) Proof: AB + AC + BC = AB + AC + 1 · BC = AB +AC + (A + A) · BC = AB +AC + ABC + ABC = AB(1 + C) +AC (1 + B) = AB + AC The dual of the consensus theorem AB + AC + BC = (A + B)(A+C)(B+C) AB + AC = (A + B)(A+C) Dr. I. Damaj 17
Truth Tables to Verify DeMorgan’s
Theorem
Dr. I. Damaj
18
Complementing Functions
n Use DeMorgan's Theorem to complement a
function:
n Interchange AND and OR operators
n Complement each constant value and literal
n Example: Complement F
n F = (x’yz’) + (xy’z’)
n F’ = (x + y’ + z)(x’ + y + z)
Dr. I. Damaj
19

Boolean Function Evaluation

x
y
z
F1
F2
F3
F4
0
0
0
0
0
F1
= xy z
0
0
1
0
1
F2
= yz
x
+
0
1
0
0
0
F3
= xyz
+
x y z
+
x y
0
1
1
0
0
F4
= xy
+
x z
1
0
0
0
1
1 0
0 1
1
1 1
1 0
1
1 0
1 1
1
Dr. I. Damaj
20
 Overview – Canonical Forms n What are Canonical Forms? n Minterms and Maxterms n Index Representation of Minterms and Maxterms n Sum-of-Minterm (SOM) Representations n Product-of-Maxterm (POM) Representations n Representation of Complements of Functions n Conversions between Representations Dr. I. Damaj 21
 Canonical Forms n It is useful to specify Boolean functions in a form that: n Allows comparison for equality. n Has a correspondence to the truth tables n Canonical Forms in common usage: n Sum of Minterms (SOM) n Product of Maxterms (POM) Dr. I. Damaj 22
 Minterms n Minterms are AND terms with every variable present in either true or complemented form. n Given that each binary variable may appear normal (e.g., x) or complemented (e.g., x’), there are 2 n minterms for n variables. n Example: Two variables (X and Y) produce 2 x 2 = 4 combinations: n XY (both normal) n XY’ (X normal, Y complemented) X’Y (X complemented, Y normal) n n X’Y’ (both complemented) n Thus there are four minterms of two variables. Dr. I. Damaj 23
 Maxterms n Maxterms are OR terms with every variable in true or complemented form. n Given that each binary variable may appear normal (e.g., x) or complemented (e.g., x), there are 2 n maxterms for n variables. n Example: Two variables (X and Y) produce 2 x 2 = 4 combinations: n X + Y (both normal) n X + Y’ (X normal, Y complemented) n X’+ Y (X complemented, Y normal) n X’+ Y’ (both complemented) Dr. I. Damaj 24

Maxterms and Minterms

n Examples:
Two
variable
minterms
and
maxterms.
Index
Minterm
Maxterm
0
x’ y’
x
+ y
1
x’y
x
+ y’
2
x
y’
x’ + y
3
x
y
x’
+ y’

variables

complemented.

in

the

Dr. I. Damaj

terms

are

true

and

n The index above is important for describing which

which

are

25

 Purpose of the Index n The index for the minterm or maxterm, expressed as a binary number, is used to determine whether the variable is shown in the true form or complemented form. n For Minterms: n “1” means the variable is “Not Complemented” and n “0” means the variable is “Complemented”. n For Maxterms: n “0” means the variable is “Not Complemented” and n “1” means the variable is “Complemented”. Dr. I. Damaj 26
Index Example in Three Variables
Dr. I. Damaj
27
Index Example in Three Variables
Dr. I. Damaj
28
 Index Examples – Four Variables Index Binary Minterm Maxterm i Pattern m i M i 0 0000 abcd a+ b + c +d 1 0001 abcd ? 3 0011 ? a + b + c + d 5 0101 abcd a + b + c + d 7 0111 ? a + b + c + d 10 1010 abcd a + b + c + d 13 1101 ab c d ? 15 1111 abcd a + b + c + d Dr. I. Damaj 29
 Minterm and Maxterm Relationship n Two-variable example: M 2 = x + y and m 2 = x·y Thus M 2 is the complement of m 2 and vice-versa. n giving: M i = m i and m i = M i Thus M i is the complement of m i . Dr. I. Damaj 30

Minterm Function Example

Dr. I. Damaj

31

 Maxterm Function Example n Example: Implement F1 in maxterms: F 1 = M 0 · M 2 · M 3 · M 5 · M 6 F 1 = (x + y + z) ·(x + y + z)·(x + y + z) ·(x + y + z)·(x + y + z) x y z i M 0 × M 2 × M 3 × M 5 × M 6 = F1 0 0 0 0 1 0 × 1 × × 1 × 1 = 0 0 0 1 1 1 1 × × 1 × 1 × 1 = 1 0 1 0 2 1 0 × × 1 × 1 × 1 = 0 0 1 1 3 1 1 × × 0 × 1 × 1 = 0 1 0 0 4 1 1 × × 1 × 1 × 1 = 1 1 0 1 5 1 1 × × 1 × 0 × 1 = 0 Dr. I. Damaj 1 1 0 6 1 1 × × 1 × 1 × 0 = 0 32 1 1 1 7 1 × 1 × 1 × 1 × 1 = 1
SOP and POS
A
B
C
F
= ABC + A’B’C’
A
B
C
F
F= (A+C’) . (B’+C) . (A’+B)
Dr. I. Damaj
33
Canonical Sum of Minterms
n
Any Boolean function can be expressed as a Sum of
Minterms.
f
=
x
+
x
y
n
Example:
Implement
as a sum of
minterms.
First expand terms:
f
=
x(y
+
y)
+
x
y
Then distribute terms:
f
=
xy
+
xy
+
x y
Express as sum of minterms: f = m 3 + m 2 +m 0
Dr. I. Damaj
34
Shorthand SOP and POS Forms
n
F = m 1 +m 4 +m 5 +m 6 +m 7
n
This can be denoted in the formal shorthand:
F(A,B,C)=Sm(1,4,5,6,7)
n
F = M 1 .M 4 .M 5 .M 6 .M 7
n
This can be denoted in the formal shorthand:
F(A,B,C)= ’
(1,4,5,6,7)
M
Dr. I. Damaj
35
 Reading Assignment Circuit Optimization n Goal: To obtain the simplest implementation for a given function. n Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm n Optimization requires a cost criterion to measure the simplicity of a circuit n Two distinct cost criteria we will use: n Literal cost (L) n Gate input cost (G) n Gate input cost with NOTs (GN) Dr. I. Damaj 36
 Literal Cost Reading Assignment n Literal – a variable or its complement. n Literal cost – the number of literal appearances in a Boolean expression corresponding to the logic circuit diagram. n Examples: n F = BD + AB’C + AC’D’ n L = 8 Dr. I. Damaj 37
 Gate Input Cost Reading Assignment n Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations. (G - inverters not counted, GN - inverters counted) n For SOP and POS equations, it can be found from the equation(s) by finding the sum of: n all literal appearances n the number of terms excluding terms consisting only of a single literal,(G) and n optionally, the number of distinct complemented single literals (GN). Dr. I. Damaj 38
Cost Criteria (continued)
F = A + B C + B’C’
L = 5
G= L + 2 = 7
B
GN = G + 2 = 9
C
A
F
n
L (literal count) counts the AND inputs and the single literal OR
input.
n
G (gate input count) adds the remaining OR gate inputs
n
GN(gate input count with NOTs ) adds the inverter inputs
Dr. I. Damaj
39
Cost Criteria (continued)
A
B
n
F = ABC + A’B’D’
C
n
L =
6
G = 8 GN = 11
F
n
F = (A+ C’)(B’+C)(A’+B)
n
L = 6
G = 9 GN = 12
n
Same function and same
literal cost
A
B
n
But first circuit has better
gate input count and better
gate input count with NOTs
C
F
n
Select it!
Dr. I. Damaj
40
 Boolean Function Optimization n Minimizing the gate input (or literal) cost of a (a set of) Boolean equation(s) reduces circuit cost. n We choose gate input cost. n Boolean Algebra and graphical techniques are tools to minimize cost criteria values. n Some important questions: n When do we stop trying to reduce the cost? n Do we know when we have a minimum cost? n Treat optimum or near-optimum cost functions for two-level (SOP and POS) circuits first. n Introduce a graphical technique using Karnaugh maps (K-maps, for short) Dr. I. Damaj 41 Karnaugh Maps (K-map) n A K-map is a collection of squares n Each square represents a minterm n The collection of squares is a graphical representation of a Boolean function n Adjacent squares differ in the value of one variable n Alternative algebraic expressions for the same function are derived by recognizing patterns of squares n The K-map can be viewed as n A reorganized version of the truth table n A topologically-warped Venn diagram as used to visualize sets in algebra of sets Dr. I. Damaj 42
 Some Uses of K-Maps n Provide a means for: n Finding optimum or near optimum n SOP and POS standard forms, and n two-level AND/OR and OR/AND circuit implementations n for functions with small numbers of variables n Visualizing concepts related to manipulating Boolean expressions, and n Demonstrating concepts used by computer-aided design programs to simplify large circuits Dr. I. Damaj 43

Two Variable Maps

n A 2-variable Karnaugh Map:
n Note
that
minterm
m0
and
and
differ
in
the
value
of
the
variable y.
n Similarly,
minterm
m0
and
x = 0
minterm m2 differ in the x variable.
x = 1
n Also,
m1
and
m3
differ in
the
x
= 0
y = 1
0 =
m 1 =
x y
2 =
m 3 =
x
y

x y

44

x y

variable as well.

n Finally,

m2

and m3 differ

in

value of the variable y.

Dr. I. Damaj

the

y

m

m

K-Map and Truth Tables

n
The K-Map is just a different form of the truth table.
n
Example – Two variable function:
n
We choose a,b,c and d from the set {0,1} to implement a particular
function, F(x,y).
Function Table
K-Map
Input
Function
Values
Value
y = 0
y = 1
(x,y)
F(x,y)
x
= 0
a
b
0
0
a
0 1
b
x
= 1
c
d
1 0
c
1 1
d
Dr. I. Damaj
45
 K-Map Function Representation n Example: F(x,y) = x F = x y = 0 y = 1 x = 0 0 0 x = 1 1 1 n For function F(x,y), the two adjacent cells containing 1’s can be combined using the Minimization Theorem: F(x, y) = x y + xy = x Dr. I. Damaj 46

K-Map Function Representation

 n Example: G(x,y) = x + y G = x+y x = 0 x = 1 n

0

1

y = 1

1

1

+

y

47

y = 0

For G(x,y), two pairs of adjacent cells containing 1’s can be combined using the Minimization Theorem:

(

)

(

)

G(x, y )
=
x y
+
x y
+
xy
+
x y
=
x
Dr. I. Damaj

Duplicate xy

K-Map Function Representation

Dr. I. Damaj

48

Three Variable Maps

n
A three-variable K-map:
yz=00
yz=01
yz=11
yz=10
x=0
m
m
m
m
0
1
3
2
x=1
m
m
m
m
4
5
7
6
n
Where each minterm corresponds to the product terms:
yz=00
yz=01
yz=11
yz=10
x=0
x
y z
x
y z
x
y z
x
y z
x=1
x
y z
x
y z
x
y z
x
y z
n
Note that if the binary value for an index differs in one bit position,
the minterms are adjacent on the K-Map
Dr. I. Damaj
49

Alternative Map Labeling

n
Map use largely involves:
n Entering values into the map, and
n Reading off product terms from the map.
n
Alternate labelings are useful:
y
y z
y
y
x
00
01
11
10
x
0
1
3
2
0
0
1
3
2
x
4
5
7
6
1
4
5
7
6
x
z
z
z
z
Dr. I. Damaj
50

Example Functions

n
By convention, we represent the minterms of F by a "1“
n
Example:
y
F(x,y,z) = Sm(2,3,4,5)
0
1
3
2
1
1
n
Example:
x
4
5
7
6
1
1
G(a,b,c) = Sm(3,4,6,7)
z
y
n
Learn the locations of the 8
indices based on the variable
order shown (x, most significant
0
1
3
2
1
and z, least significant) on the
map boundaries
x
4
5
7
6
1
1
1
z
Dr. I. Damaj
51
 Combining Squares n By combining squares, we reduce number of literals in a product term, reducing the literal cost, thereby reducing the other two cost criteria. n On a 3-variable K-Map: n One square represents a minterm with three variables n Two adjacent squares represent a product term with two variables n Four “adjacent” terms represent a product term with one variable n Eight “adjacent” terms is the function of all ones (no variables) = 1. Dr. I. Damaj 52
Example: Combining Squares
y
n Example: Let
y z
x
00
01
11
10
F = Sm(2,3,6,7)
0
0
1
3
2
1
1
1
4
5
7
7
6
x
1
1
z
n Applying the Minimization Theorem three times:
F(x, y, z ) = x y z + x y z + x y z + x y z
= yz + y z
= y
n Thus
the
four
terms
that
form
a
2
×
2 square
correspond to the term "y".
Dr. I. Damaj
53
 Three-Variable Maps n Reduced literal product terms for SOP standard forms correspond to rectangles on K-maps containing cell counts that are powers of 2. n Rectangles of 2 cells represent 2 adjacent minterms; of 4 cells represent 4 minterms that form a “pairwise adjacent” ring. n Rectangles can contain non-adjacent cells as illustrated by the “pairwise adjacent” ring above. Dr. I. Damaj 54
Three-Variable Maps
n
Topological warps of 3 -variable K-maps that
ß Venn Diagram
¢ Cylinder
0
4
X
6
5
7
Y
3
Z
2
1
Dr. I. Damaj
55
Three-Variable Maps
n
Example Shapes of 2-cell Rectangles:
y
0
1
3
2
4
5
7
6
x
z
n
Read off the product terms for the rectangles
shown
Dr. I. Damaj
56
Three-Variable Maps
n
Example Shapes of 4-cell Rectangles:
y
0
1
3
2
4
5
7
6
x
z
n
Read off the product terms for the rectangles
shown
Dr. I. Damaj
57
Three Variable Maps
ß K-Maps can be used to simplify Boolean functions by
systematic methods.
“1s”in the map.
Terms are selected to cover the
F(x,
y,
z)
= S m (1,2,3,5,7
)
ß Example: Simplify
z
x y
y
1
1
1
x
1
1
z
F(X,Y,Z) = Z + X’Y
Dr. I. Damaj
58
Example
Dr. I. Damaj
59
Example
Dr. I. Damaj
60

Three-Variable Map Simplification

n Use a K-map to find an optimum SOP equation for

F(X, Y, Z) = S m(0,1,2,4,6,7)

Dr. I. Damaj

61

Four Variable Maps

n Map and location of minterms:
yz
wx
00
01
11
Y
10
0
1
3
2
00
01
4
5
7
6
X
12
13
15
14
11
W
11
10
8
9
10
Z
Dr. I. Damaj
62
Four Variable Terms
ß Four variable maps can have rectangles
corresponding to:
ß A single 1 = 4 variables, (i.e. Minterm)
ß Two 1s = 3 variables,
ß Four 1s = 2 variables
ß Eight 1s = 1 variable,
ß Sixteen 1s = zero variables (i.e. Constant
"1")
Dr. I. Damaj
63
Four-Variable Maps
n Example Shapes of Rectangles:
Y
0
1
3
2
4
5
7
6
X
12
13
15
14
W
8
9
11
10
Dr. I. Damaj
Z
64
Four-Variable Maps
n Example Shapes of Rectangles:
Y
0
1
3
2
4
5
7
6
X
12
13
15
14
W
8
9
11
10
Dr. I. Damaj
65
Z
Four-Variable Maps
n Example Shapes of Rectangles:
Dr. I. Damaj
66
Four-Variable Maps
Dr. I. Damaj
67

Four-Variable Map Simplification

n F(W, X, Y, Z) = S m(0, 2,4,5,6,7,8,10,13,15)

Dr. I. Damaj

68

Four-Variable Map Simplification

)

n F(W, X, Y, Z) = S m(3,4,5,7,9,1

3,14,15

Dr. I. Damaj

69

 Don't Cares in K-Maps n Sometimes a function table or map contains entries for which it known: is n the input values for the minterm will never occur, or n The output value for the minterm is not used. n In these cases, the output value need not be defined n Instead, the output value is defined as a “don't care” n By placing “don't cares ” ( an “x” entry) in the function table or map, the cost of the logic circuit may be lowered. n Example 1: A logic function having the binary codes for the BCD digits as its inputs. Only the codes for 0 through 9 are used. The six codes, 1010 through 1111 never occur, so the output values for these codes are “x” to represent “don’t cares.” Dr. I. Damaj 70
Example
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71

Multiple-Level Optimization

Multiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost

Dr. I. Damaj

72

 Transformations Reading Assignment n Factoring - finding a factored form from SOP or POS expression n Algebraic - No use of axioms specific to Boolean algebra such as complements or idempotence n Boolean - Uses axioms unique to Boolean algebra n Decomposition - expression of a function as a set of new functions Dr. I. Damaj 73
 Reading Assignment Transformations (continued) n Substitution of G into F - expression function F as a function of G and some or all of its original variables n Elimination - Inverse of substitution n Extraction - decomposition applied to multiple functions simultaneously Dr. I. Damaj 74
 Reading Assignment Transformation Examples n Algebraic Factoring F = A’C’D’ + A’BC’ + ABC + ACD’ -- G = 16 n Factoring: n F = A’(C’D’ + BC’) + A (BC + CD’) -- G = 16 n Factoring again: n F = A’C’(B + D’) + AC (B + D’) -- G = 12 n Factoring again: F = (A’C’ + AC) (B + D’) -- G = 10 Dr. I. Damaj 75
 Reading Assignment Transformation Examples n Decomposition n The terms B + D’ and A’C’+ AC can be defined as new functions E and H respectively, decomposing F: F = E H, E = B + D’, and H = A’C’ + AC G = 10 n This series of transformations has reduced G from 16 to 10, a substantial savings. The resulting circuit has three levels plus input inverters. Dr. I. Damaj 76
Transformation Examples
n Substitution of E into F
n Returning to F just before the final factoring step:
nF = A’C’(B + D’) + AC (B + D’) -- G = 12
n Defining E = B + D’, and substituting in F:
nF = A’C’E + ACE -- G = 10
n This substitution has resulted in the same cost as the
decomposition
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77
 Reading Assignment Transformation Examples n Elimination n Beginning with a new set of functions: n X = B + C n Y = A + B n Z = A ’X + C Y G = 10 n Eliminating X and Y from Z: n Z = A’(B + C) + C (A + B) G = 10 n “Flattening” (Converting to SOP expression): n Z = A ’B + A’C + AC + BC G = 12 n This has increased the cost, but has provided a new SOP expression for two-level optimization. Dr. I. Damaj 78
 Reading Assignment Transformation Examples n Two-level Optimization n The result of 2-level optimization is: Z = A’B + C G = 4 n This example illustrates that: n Optimization can begin with any set of equations, not just with minterms or a truth table n Increasing gate input count G temporarily during a series of transformations can result in a final solution with a smaller G Dr. I. Damaj 79
 Reading Assignment Transformation Examples n Extraction n Beginning with two functions: E = A’B’D’ + A’BD H = B’CD’ + BCD G = 16 n Finding a common factor and defining it as a function: F = B’D’ + BD n We perform extraction by expressing E and H as the three functions: F = B’D’ + BD, E = A’F, H = CF G = 10 n The reduced cost G results from the sharing of logic between the two output functions Dr. I. Damaj 80
 Other Gate Types n Why? n Implementation feasibility and low cost n Power in implementing Boolean functions n Convenient conceptual representation n Gate classifications n Primitive gate - a gate that can be described using a single primitive operation type (AND or OR) plus an optional inversion(s). n Complex gate - a gate that requires more than one primitive operation type for its description n Primitive gates will be covered first Dr. I. Damaj 81
Buffer
n
A buffer is a gate with the function F = X:
X
F
n
In terms of Boolean function, a buffer is the
same as a connection!
n
So why use it?
n A buffer is an electronic amplifier used to
improve circuit voltage levels and increase the
speed of circuit operation.
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NAND Gate
n
The basic NAND gate has the following symbol,
illustrated for three inputs:
n
AND-Invert (NAND)
X
Y
F(X, Y,Z)
=
X
× Y
× Z
Z
n
NAND represents NOT AND, i. e., the AND function
with a NOT applied. The symbol shown is an AND-
Invert. The small circle (“bubble ”) represents the
invert function.
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NOR Gate
n
The basic NOR gate has the following symbol,
illustrated for three inputs:
n
OR-Invert (NOR)
X
F(X,Y,Z) = X+Y+Z
Y
Z
n
NOR represents NOT - OR, i. e., the OR function with
a NOT applied. The symbol shown is an OR-Invert.
The small circle (“bubble”) represents the invert
function.
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Exclusive OR/ Exclusive NOR
n
The eXclusive OR (XOR) function is an important Boolean
function used extensively in logic circuits.
n
The XOR function may be;
n
implemented directly as an electronic circuit (truly a gate) or
n
implemented by
interconnecting other gate types (used as a
convenient representation)
n
The eXclusive NOR function is the complement of the XOR
function.
n
By our definition, XOR and XNOR gates are complex gates.
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Exclusive OR/ Exclusive NOR
n
Uses for the XOR and XNORs gate include:
n
n
Counters/incrementers/decrementers
n
Parity generators/checkers
n
Definitions
n
The XOR function is:
X
Å
Y
=
X Y
+
XY
n
The eXclusive NOR (XNOR) function, otherwise
known as equivalence is:
X
Å
Y
=
X Y
+
XY
n
Strictly speaking, XOR and XNOR gates do no exist
for more that two inputs. Instead, they are replaced
by odd and even functions.
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Truth Tables for XOR/XNOR
n
Operator Rules:
XOR
XNOR
X
Y
XÅY
X
Y
(X Å Y)
or X
º Y
0
0
0
0
0
1
0
1
1
0
1
0
1
0
1
1
1
0
1
0
0
1
1
1
n
The XOR function means:
X OR Y, but NOT BOTH
n
Why is the XNOR function also known as the
equivalence function, denoted by the operator ?
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XOR/XNOR (Continued)
n
The XOR function can be extended to 3 or more variables. For
more than 2 variables, it is called an odd function or modulo 2
sum (Mod 2 sum), not an XOR:
X
Å
Y
Å
Z
=
XYZ
+
XYZ
+
X YZ
+
X YZ
n
The complement of the odd function is the even function.
n
The XOR identities:
X Å 0
=
X
X Å1
=
X
X
Å
X
=
0
X
Å
X
=
1
X Å Y = YÅ X
(X Å Y
)
Å
Z
=
X
Å
(Y
Å
Z)
=
X
Å
Y
Å
Z
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Symbols For XOR and XNOR
n
XOR symbol:
n
XNOR symbol:
n
Symbols exist only for two inputs
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XOR Implementations
n
The simple SOP implementation uses the following
X
structure:
X
Y
Y
n
A NAND only implementation is:
X
X
Y
Y
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 Reading Assignment Odd and Even Functions n The odd and even functions on a K-map form “checkerboard” patterns. n The 1s of an odd function correspond to minterms having an index with an odd number of 1s. n The 1s of an even function correspond to minterms having an index with an even number of 1s. n Implementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult, so we use “trees” made up of : n 2-input XOR or XNORs n 3- or 4-input odd or even functions Dr. I. Damaj 91
Odd and Even Functions
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Odd and Even Functions

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93

 Reading Assignment Parity Generators and Checkers n In Chapter 1, a parity bit added to n-bit code to produce an n + 1 bit code: n Add odd parity bit to generate code words with even parity n Add even parity bit to generate code words with odd parity n Use odd parity circuit to check code words with even parity n Use even parity circuit to check code words with odd parity n Example: n = 3. Generate even parity code words of length 4 with odd parity generator: n Check even parity code words of length 4 with odd parity checker: X Y Z P n X Operation: (X,Y,Z) = (0,0,1) gives (X,Y,Z,P) = (0,0,1,1) and E = 0. If Y changes from 0 to 1 between generator and checker, then E = 1 indicates an error. Y E Z P Dr. I. Damaj 94
 Hi-Impedance Outputs n Logic gates introduced thus far n have 1 and 0 output values, n cannot have their outputs connected together, and n transmit signals on connections in only one direction. n Three-state logic adds a third logic value, Hi-Impedance (Hi-Z), giving three states: 0, 1, and Hi-Z on the outputs. n What is a Hi-Z value? n The Hi-Z value behaves as an open circuit n This means that, looking back into the circuit, the output appears to be disconnected. n It is as if a switch between the internal circuitry and the output has been opened. Dr. I. Damaj 95

The 3-State Buffer

Symbol
n
For the symbol and truth table, IN is the
data input, and EN, the control input.
IN
OUT
n
For EN = 0, regardless of the value on IN
(denoted by X), the output value is Hi -Z.
EN
Truth Table
n
For EN = 1, the output value follows the
input value.
EN
IN
OUT
n
Variations:
0
X
Hi-Z
n
Data input, IN, can be inverted
Control input, EN, can be inverted
by addition of “bubbles ” to signals.
n
1
0
0
1
1
1
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Transmission Gates
n
The transmission gate is one of the designs for an
electronic switch for connecting and disconnecting
two points in a circuit.
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Circuit Example Using TG
n
Exclusive OR F = A
+
C
A
TG0
A
C
TG1
TG0
F
C
0
F
0
No path
Path
0
0
1
Path
No path
1
1
0
No path
Path
1
TG1
1
1
Path
No path
0
(a)
(b)
n
The basis for the function implementation is TG-
controlled paths to the output
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 Problems n No. 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.10, 2.12, 2.14, 2.15, 2.16, 2.17, 2.18, 2.19, 2.20, 2.21, 2.22, 2.23, 2.24, 2.27, 2.31, 2.32, 2.34. Dr. I. Damaj 99